345 lines
13 KiB
C
345 lines
13 KiB
C
#ifndef _ASM_E2K_H_
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#define _ASM_E2K_H_
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#include <linux/types.h>
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#include <linux/init.h>
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#include <asm/cpu_regs_types.h> /* E2K_VA_MSB */
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#include <asm/e2k_api.h>
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#include <asm/sections.h>
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#include <asm/e2s.h>
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#include <asm/e8c.h>
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#include <asm/e1cp.h>
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#include <asm/e8c2.h>
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/* CPU model numbers */
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#define IDR_E2K_VIRT_MDL 0x00 /* machine is virtual, so CPUs also */
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#define MACHINE_ID_NONE 0x0000
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#define MACHINE_ID_CPU_TYPE_MASK 0x000f
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#define MACHINE_ID_SIMUL 0x0010
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#define MACHINE_ID_E2K_FULL_SIC 0x0020
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#define MACHINE_ID_L_IOMMU 0x0040
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#define MACHINE_ID_E2K_LEGACY_SIC 0x0080 /* host bridge & legacy NBSR */
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#define MACHINE_ID_E2K_VIRT_IO 0x0100 /* machine is virtual and */
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/* IO simulates on user level */
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/* (for example by QEMU) */
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#define MACHINE_ID_HW_VIRT 0x0200 /* hardware virtualized VM */
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#define MACHINE_ID_VIRT 0x0400 /* soft paravirtualized VM */
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#define MACHINE_ID_E2K_IOMMU 0x0800
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#define MACHINE_ID_E2S (IDR_E2S_MDL | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_L_IOMMU)
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#define MACHINE_ID_E8C (IDR_E8C_MDL | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_L_IOMMU)
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#define MACHINE_ID_E1CP (IDR_E1CP_MDL | \
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MACHINE_ID_E2K_LEGACY_SIC | \
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MACHINE_ID_L_IOMMU)
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#define MACHINE_ID_E8C2 (IDR_E8C2_MDL | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_L_IOMMU)
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/*
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* IO_* NBSRs are absent in models with EIOHub. Using LEGACY_SIC with FULL_SIC
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* helps to avoid reading those NBSRs while still using IO_AREA_PHYS_BASE
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* defined for FULL_SIC
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*/
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#define MACHINE_ID_E12C (IDR_E12C_MDL | \
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MACHINE_ID_E2K_LEGACY_SIC | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_E2K_IOMMU)
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#define MACHINE_ID_E16C (IDR_E16C_MDL | \
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MACHINE_ID_E2K_LEGACY_SIC | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_E2K_IOMMU)
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#define MACHINE_ID_E2C3 (IDR_E2C3_MDL | \
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MACHINE_ID_E2K_LEGACY_SIC | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_E2K_IOMMU)
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#define MACHINE_ID_E2K_VIRT (IDR_E2K_VIRT_MDL | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_E2K_VIRT_IO)
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#define MACHINE_ID_E2K_HW_VIRT (IDR_E2K_VIRT_MDL | \
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MACHINE_ID_HW_VIRT | \
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MACHINE_ID_E2K_LEGACY_SIC | \
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MACHINE_ID_E2K_FULL_SIC | \
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MACHINE_ID_E2K_IOMMU | \
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MACHINE_ID_E2K_VIRT_IO)
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#define MACHINE_ID_E2S_LMS (MACHINE_ID_E2S | MACHINE_ID_SIMUL)
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#define MACHINE_ID_E8C_LMS (MACHINE_ID_E8C | MACHINE_ID_SIMUL)
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#define MACHINE_ID_E1CP_LMS (MACHINE_ID_E1CP | MACHINE_ID_SIMUL)
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#define MACHINE_ID_E8C2_LMS (MACHINE_ID_E8C2 | MACHINE_ID_SIMUL)
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#define MACHINE_ID_E12C_LMS (MACHINE_ID_E12C | MACHINE_ID_SIMUL)
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#define MACHINE_ID_E16C_LMS (MACHINE_ID_E16C | MACHINE_ID_SIMUL)
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#define MACHINE_ID_E2C3_LMS (MACHINE_ID_E2C3 | MACHINE_ID_SIMUL)
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#define MACHINE_ID_VIRT_E2S (MACHINE_ID_E2S | MACHINE_ID_VIRT)
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#define MACHINE_ID_VIRT_E8C (MACHINE_ID_E8C | MACHINE_ID_VIRT)
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#define MACHINE_ID_VIRT_E1CP (MACHINE_ID_E1CP | MACHINE_ID_VIRT)
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#define MACHINE_ID_VIRT_E8C2 (MACHINE_ID_E8C2 | MACHINE_ID_VIRT)
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#define MACHINE_ID_VIRT_E12C (MACHINE_ID_E12C | MACHINE_ID_VIRT)
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#define MACHINE_ID_VIRT_E16C (MACHINE_ID_E16C | MACHINE_ID_VIRT)
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#define MACHINE_ID_VIRT_E2C3 (MACHINE_ID_E2C3 | MACHINE_ID_VIRT)
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#ifdef CONFIG_E2K_SIMULATOR
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# define MACHINE_SIMUL_FLAG MACHINE_ID_SIMUL
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#else
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# define MACHINE_SIMUL_FLAG 0
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#endif
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#ifdef CONFIG_E2K_MACHINE
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#if defined(CONFIG_E2K_E2S)
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#define native_machine_id (MACHINE_ID_E2S | MACHINE_SIMUL_FLAG)
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#elif defined(CONFIG_E2K_E8C)
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#define native_machine_id (MACHINE_ID_E8C | MACHINE_SIMUL_FLAG)
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#elif defined(CONFIG_E2K_E1CP)
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#define native_machine_id (MACHINE_ID_E1CP | MACHINE_SIMUL_FLAG)
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#elif defined(CONFIG_E2K_E8C2)
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#define native_machine_id (MACHINE_ID_E8C2 | MACHINE_SIMUL_FLAG)
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#elif defined(CONFIG_E2K_E12C)
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#define native_machine_id (MACHINE_ID_E12C | MACHINE_SIMUL_FLAG)
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#elif defined(CONFIG_E2K_E16C)
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#define native_machine_id (MACHINE_ID_E16C | MACHINE_SIMUL_FLAG)
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#elif defined(CONFIG_E2K_E2C3)
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#define native_machine_id (MACHINE_ID_E2C3 | MACHINE_SIMUL_FLAG)
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#else
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# error "E2K MACHINE type does not defined"
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#endif
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#elif defined(CONFIG_E2S) /* can be defined only for tiny boot on lms */
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#define native_machine_id MACHINE_ID_E2S_LMS
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#elif defined(CONFIG_E8C) /* can be defined only for tiny boot on lms */
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#define native_machine_id MACHINE_ID_E8C_LMS
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#elif defined(CONFIG_E1CP) /* can be defined only for tiny boot on lms */
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#define native_machine_id MACHINE_ID_E1CP_LMS
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#elif defined(CONFIG_E8C2) /* can be defined only for tiny boot on lms */
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#define native_machine_id MACHINE_ID_E8C2_LMS
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#elif defined(CONFIG_E12C) /* can be defined only for tiny boot on lms */
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#define native_machine_id MACHINE_ID_E12C_LMS
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#elif defined(CONFIG_E16C) /* can be defined only for tiny boot on lms */
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#define native_machine_id MACHINE_ID_E16C_LMS
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#elif defined(CONFIG_E2C3) /* can be defined only for tiny boot on lms */
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#define native_machine_id MACHINE_ID_E2C3_LMS
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#else /* ! CONFIG_E2K_MACHINE && ! our boot on lms */
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extern unsigned int __nodedata native_machine_id;
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#endif /* CONFIG_E2K_MACHINE */
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extern const char *e2k_get_cpu_type_name(int mach_type_id);
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extern const char *e2k_get_mach_type_name(int mach_type_id);
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extern int e2k_get_machine_type_name(int mach_id);
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extern void __init native_setup_machine(void);
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extern void native_set_mach_type_id(void);
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extern const char *native_get_mach_type_name(void);
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extern void e2k_init_IRQ(void);
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#define IS_THE_MACHINE_E2S(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E2S_MDL)
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#define IS_THE_MACHINE_E8C(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E8C_MDL)
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#define IS_THE_MACHINE_E1CP(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E1CP_MDL)
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#define IS_THE_MACHINE_E8C2(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E8C2_MDL)
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#define IS_THE_MACHINE_E12C(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E12C_MDL)
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#define IS_THE_MACHINE_E16C(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E16C_MDL)
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#define IS_THE_MACHINE_E2C3(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E2C3_MDL)
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#define IS_THE_MACHINE_E2K_VIRT(mach_id) \
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(((mach_id) & MACHINE_ID_CPU_TYPE_MASK) == IDR_E2K_VIRT_MDL)
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#define IS_THE_MACHINE_SIM(mach_id) \
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(((mach_id) & MACHINE_ID_SIMUL) != 0)
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#define HAS_THE_MACHINE_E2K_FULL_SIC(mach_id) \
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(((mach_id) & MACHINE_ID_E2K_FULL_SIC) != 0)
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#define HAS_THE_MACHINE_L_IOMMU(mach_id) \
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(((mach_id) & MACHINE_ID_L_IOMMU) != 0)
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#define HAS_THE_MACHINE_E2K_IOMMU(mach_id) \
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(((mach_id) & MACHINE_ID_E2K_IOMMU) != 0)
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#define HAS_THE_MACHINE_E2K_LEGACY_SIC(mach_id) \
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(((mach_id) & MACHINE_ID_E2K_LEGACY_SIC) != 0)
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#define HAS_THE_MACHINE_L_SIC(mach_id) \
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(HAS_THE_MACHINE_E2K_FULL_SIC(mach_id) || \
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HAS_THE_MACHINE_E2K_LEGACY_SIC(mach_id))
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#define NATIVE_IS_MACHINE_E2S \
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IS_THE_MACHINE_E2S(native_machine_id)
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#define NATIVE_IS_MACHINE_E8C \
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IS_THE_MACHINE_E8C(native_machine_id)
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#define NATIVE_IS_MACHINE_E1CP \
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IS_THE_MACHINE_E1CP(native_machine_id)
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#define NATIVE_IS_MACHINE_E8C2 \
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IS_THE_MACHINE_E8C2(native_machine_id)
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#define NATIVE_IS_MACHINE_E12C \
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IS_THE_MACHINE_E12C(native_machine_id)
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#define NATIVE_IS_MACHINE_E16C \
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IS_THE_MACHINE_E16C(native_machine_id)
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#define NATIVE_IS_MACHINE_E2C3 \
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IS_THE_MACHINE_E2C3(native_machine_id)
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#define NATIVE_IS_MACHINE_E2K_VIRT (false)
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#define BOOT_NATIVE_IS_MACHINE_E2S \
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IS_THE_MACHINE_E2S(boot_native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_E8C \
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IS_THE_MACHINE_E8C(boot_native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_E1CP \
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IS_THE_MACHINE_E1CP(boot_native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_E8C2 \
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IS_THE_MACHINE_E8C2(boot_native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_E12C \
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IS_THE_MACHINE_E12C(boot_native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_E16C \
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IS_THE_MACHINE_E16C(boot_native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_E2C3 \
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IS_THE_MACHINE_E2C2(boot_native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_E2K_VIRT false
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#define NATIVE_IS_MACHINE_SIM \
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IS_THE_MACHINE_SIM(native_machine_id)
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#define NATIVE_HAS_MACHINE_E2K_FULL_SIC \
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HAS_THE_MACHINE_E2K_FULL_SIC(native_machine_id)
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#define NATIVE_HAS_MACHINE_E2K_IOMMU \
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HAS_THE_MACHINE_E2K_IOMMU(native_machine_id)
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#define NATIVE_HAS_MACHINE_E2K_LEGACY_SIC \
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HAS_THE_MACHINE_E2K_LEGACY_SIC(native_machine_id)
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#define NATIVE_HAS_MACHINE_L_SIC \
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HAS_THE_MACHINE_L_SIC(native_machine_id)
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#define BOOT_NATIVE_IS_MACHINE_SIM \
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IS_THE_MACHINE_SIM(boot_native_machine_id)
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#define BOOT_NATIVE_HAS_MACHINE_E2K_FULL_SIC \
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HAS_THE_MACHINE_E2K_FULL_SIC(boot_native_machine_id)
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#define BOOT_NATIVE_HAS_MACHINE_E2K_LEGACY_SIC \
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HAS_THE_MACHINE_E2K_LEGACY_SIC(boot_native_machine_id)
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#define BOOT_NATIVE_HAS_MACHINE_L_SIC \
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HAS_THE_MACHINE_L_SIC(boot_native_machine_id)
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#ifdef CONFIG_KVM_GUEST_KERNEL
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/* it is native guest kernel */
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#include <asm/kvm/guest/e2k.h>
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#elif defined(CONFIG_PARAVIRT_GUEST)
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/* it is paravirtualized host and guest kernel */
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#include <asm/paravirt/e2k.h>
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#else /* ! CONFIG_KVM_GUEST_KERNEL && ! CONFIG_PARAVIRT_GUEST */
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/* it is native kernel without any virtualization */
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/* or host kernel with virtualization support */
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/* only native machine is exists and should be examined */
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#define machine_id native_machine_id
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#define boot_machine_id boot_native_machine_id
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#define get_machine_id() machine_id
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#define boot_get_machine_id() boot_machine_id
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#define set_machine_id(mach_id) (machine_id = (mach_id))
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#define boot_set_machine_id(mach_id) (boot_machine_id = (mach_id))
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static inline void set_mach_type_id(void)
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{
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native_set_mach_type_id();
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}
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#define boot_panic(fmt, args...) boot_native_panic(fmt, ##args)
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#endif /* ! CONFIG_KVM_GUEST_KERNEL */
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#define IS_MACHINE_E2S \
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IS_THE_MACHINE_E2S(get_machine_id())
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#define IS_MACHINE_E8C \
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IS_THE_MACHINE_E8C(get_machine_id())
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#define IS_MACHINE_E1CP \
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IS_THE_MACHINE_E1CP(get_machine_id())
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#define IS_MACHINE_E8C2 \
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IS_THE_MACHINE_E8C2(get_machine_id())
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#define IS_MACHINE_E12C \
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IS_THE_MACHINE_E12C(get_machine_id())
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#define IS_MACHINE_E16C \
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IS_THE_MACHINE_E16C(get_machine_id())
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#define IS_MACHINE_E2C3 \
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IS_THE_MACHINE_E2C3(get_machine_id())
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#define IS_MACHINE_E2K_VIRT \
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IS_THE_MACHINE_E2K_VIRT(get_machine_id())
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#define HAS_MACHINE_E2K_FULL_SIC \
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HAS_THE_MACHINE_E2K_FULL_SIC(get_machine_id())
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#define HAS_MACHINE_L_IOMMU \
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HAS_THE_MACHINE_L_IOMMU(get_machine_id())
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#define HAS_MACHINE_E2K_IOMMU \
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HAS_THE_MACHINE_E2K_IOMMU(get_machine_id())
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#define HAS_MACHINE_E2K_LEGACY_SIC \
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HAS_THE_MACHINE_E2K_LEGACY_SIC(get_machine_id())
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#define HAS_MACHINE_L_SIC \
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HAS_THE_MACHINE_L_SIC(get_machine_id())
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#define BOOT_IS_MACHINE_E2S \
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IS_THE_MACHINE_E2S(boot_get_machine_id())
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#define BOOT_IS_MACHINE_E8C \
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IS_THE_MACHINE_E8C(boot_get_machine_id())
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#define BOOT_IS_MACHINE_E1CP \
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IS_THE_MACHINE_E1CP(boot_get_machine_id())
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#define BOOT_IS_MACHINE_E8C2 \
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IS_THE_MACHINE_E8C2(boot_get_machine_id())
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#define BOOT_IS_MACHINE_E12C \
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IS_THE_MACHINE_E12C(boot_get_machine_id())
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#define BOOT_IS_MACHINE_E16C \
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IS_THE_MACHINE_E16C(boot_get_machine_id())
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#define BOOT_IS_MACHINE_E2C3 \
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IS_THE_MACHINE_E2C3(boot_get_machine_id())
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#define BOOT_IS_MACHINE_VIRT \
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IS_THE_MACHINE_VIRT(boot_get_machine_id())
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#define BOOT_HAS_MACHINE_E2K_FULL_SIC \
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HAS_THE_MACHINE_E2K_FULL_SIC(boot_get_machine_id())
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#define BOOT_HAS_MACHINE_L_IOMMU \
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HAS_THE_MACHINE_L_IOMMU(boot_get_machine_id())
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#define BOOT_HAS_MACHINE_E2K_IOMMU \
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HAS_THE_MACHINE_E2K_IOMMU(boot_get_machine_id())
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#define BOOT_HAS_MACHINE_E2K_LEGACY_SIC \
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HAS_THE_MACHINE_E2K_LEGACY_SIC(boot_get_machine_id())
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#define BOOT_HAS_MACHINE_L_SIC \
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HAS_THE_MACHINE_L_SIC(boot_get_machine_id())
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#define MAX_NODE_CPUS 16 /* all 16 CPU cores on a node */
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#define E2K_MAX_NODE_IOLINKS 2 /* each node can has max 2 IO links */
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/* connected to IOHUB or RDMA */
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#define MACH_MAX_NUMIOLINKS (E2K_MAX_NODE_IOLINKS * MAX_NUMNODES)
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#define LMS_CONS_DATA_PORT 0x300UL /* On READ - data from keyboard */
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/* On WRITE - data to debug ouput */
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/* port (console/journal) */
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#define LMS_CONS_STATUS_PORT 0x301UL /* On READ - data available on 0x300 */
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/* On WRITE - shift count for 0x304 */
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#define LMS_NSOCK_BADDR_PORT 0x302UL /* On READ - network socket base addr*/
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/* On WRITE - the same. */
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#define LMS_NSOCK_DATA_PORT 0x303UL /* On READ - data from network socket*/
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/* On WRITE - data to network socket*/
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#define LMS_TRACE_CNTL_PORT 0x304UL /* On READ - state of the instruction*/
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/* counter */
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/* On WRITE - LMS tracer control */
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/* (1 - start, 0 - stop) */
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#define LMS_RAM_ADDR_PORT 0x309UL /* On WRITE - RAM address to load */
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/* kernel image by simulator */
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#define LMS_TRACE_CNTL_OFF 0
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#define LMS_TRACE_CNTL_ON 1
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#define LMS_LOAD_IMAGE_TO_RAM 5 /* Load 'romimage' file to RAM from */
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/* address before written to */
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/* 'LMS_RAM_ADDR_PORT' port */
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extern unsigned long machine_serial_num;
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#define ELBRUS_CPU_VENDOR "Elbrus-MCST"
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#endif /* _ASM_E2K_H_ */
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