1490 lines
39 KiB
C
1490 lines
39 KiB
C
/*
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* Native hardware AAU registers access
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*
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* array access descriptors (AAD0, ... , AAD31);
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* initial indices (AIND0, ... , AAIND15);
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* indices increment values (AAINCR0, ... , AAINCR7);
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* current values of "prefetch" indices (AALDI0, ... , AALDI63);
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* array prefetch initialization mask (AALDV);
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* prefetch attributes (AALDA0, ... , AALDA63);
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* array prefetch advance mask (AALDM);
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* array access status register (AASR);
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* array access fault status register (AAFSTR);
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* current values of "store" indices (AASTI0, ... , AASTI15);
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* store attributes (AASTA0, ... , AASTA15);
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*/
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#ifndef _NATIVE_AAU_REGS_ACCESS_H_
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#define _NATIVE_AAU_REGS_ACCESS_H_
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <asm/cpu_regs_types.h>
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#include <asm/e2k_api.h>
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#include <asm/aau_regs_types.h>
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#ifdef DEBUG_AAU_REG_MODE
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#define BUG_AAU() BUG_ON(true)
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#else /* ! DEBUG_AAU_REG_MODE */
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#define BUG_AAU()
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#endif /* DEBUG_AAU_REG_MODE */
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/* macros to access to native hardware E2K AAU context */
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#define NATIVE_GET_AAU_AAD(reg_mn, mem_p) \
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NATIVE_GET_AAUQREG(&AWP(mem_p), reg_mn)
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#define NATIVE_GET_AAU_AADS(reg1, reg2, reg3, reg4, mem_p) \
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NATIVE_GET_AAUQREGS(&AWP(mem_p), reg1, reg2, reg3, reg4)
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#define NATIVE_GET_AAU_AAIND_V3(reg_mnemonic) \
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NATIVE_GET_AAUREG(reg_mnemonic, 2)
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#define NATIVE_GET_AAU_AAIND_V5(reg_mnemonic) \
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NATIVE_GET_AAUDREG(reg_mnemonic, 2)
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#define NATIVE_GET_AAU_AAINDS_V3(reg1, reg2, val1, val2) \
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NATIVE_GET_AAUREGS(reg1, reg2, val1, val2)
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#define NATIVE_GET_AAU_AAINDS_V5(reg1, reg2, val1, val2) \
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NATIVE_GET_AAUDREGS(reg1, reg2, val1, val2)
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#define NATIVE_GET_AAU_AAIND_TAG() \
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NATIVE_GET_AAUREG(aaind_tag, 2)
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#define NATIVE_GET_AAU_AAINCR_V3(reg_mnemonic) \
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NATIVE_GET_AAUREG(reg_mnemonic, 2)
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#define NATIVE_GET_AAU_AAINCR_V5(reg_mnemonic) \
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NATIVE_GET_AAUDREG(reg_mnemonic, 2)
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#define NATIVE_GET_AAU_AAINCRS_V3(reg1, reg2, val1, val2) \
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NATIVE_GET_AAUREGS(reg1, reg2, val1, val2)
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#define NATIVE_GET_AAU_AAINCRS_V5(reg1, reg2, val1, val2) \
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NATIVE_GET_AAUDREGS(reg1, reg2, val1, val2)
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#define NATIVE_GET_AAU_AAINCR_TAG() \
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NATIVE_GET_AAUREG(aaincr_tag, 2)
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#define NATIVE_GET_AAU_AASTI_V3(reg_mnemonic) \
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NATIVE_GET_AAUREG(reg_mnemonic, 2)
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#define NATIVE_GET_AAU_AASTI_V5(reg_mnemonic) \
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NATIVE_GET_AAUDREG(reg_mnemonic, 2)
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#define NATIVE_GET_AAU_AASTIS_V3(reg1, reg2, val1, val2) \
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NATIVE_GET_AAUREGS(reg1, reg2, val1, val2)
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#define NATIVE_GET_AAU_AASTIS_V5(reg1, reg2, val1, val2) \
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NATIVE_GET_AAUDREGS(reg1, reg2, val1, val2)
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#define NATIVE_GET_AAU_AASTI_TAG() \
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NATIVE_GET_AAUREG(aasti_tag, 2)
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#define NATIVE_GET_AAU_AASR() \
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NATIVE_GET_AAUREG(aasr, 2)
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#define NATIVE_GET_AAU_AAFSTR() \
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NATIVE_GET_AAUREG(aafstr, 5)
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#define NATIVE_GET_AAU_AALDI_V3(reg_mn, lval, rval) \
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NATIVE_GET_AAUREGS(reg_mn, reg_mn, lval, rval)
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#define NATIVE_GET_AAU_AALDI_V5(reg_mn, lval, rval) \
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NATIVE_GET_AAUDREGS(reg_mn, reg_mn, lval, rval)
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#define NATIVE_GET_AAU_AALDA(reg_mn, lval, rval) \
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NATIVE_GET_AAUREGS(reg_mn, reg_mn, lval, rval)
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#define NATIVE_GET_AAU_AALDV(lo, hi) \
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NATIVE_GET_AAUREGS(aaldv, aaldv, lo, hi)
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#define NATIVE_GET_AAU_AALDM(lo, hi) \
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NATIVE_GET_AAUREGS(aaldm, aaldm, lo, hi)
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#define NATIVE_SET_AAU_AAD(reg_mn, mem_p) \
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NATIVE_SET_AAUQREG(reg_mn, &AWP(mem_p))
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#define NATIVE_SET_AAU_AADS(reg1, reg2, reg3, reg4, mem_p) \
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NATIVE_SET_AAUQREGS(&AWP(mem_p), reg1, reg2, reg3, reg4)
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#define NATIVE_SET_AAU_AAIND(reg_mn, val) \
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NATIVE_SET_AAUDREG(reg_mn, val, 2)
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#define NATIVE_SET_AAU_AAINDS(reg1, reg2, val1, val2) \
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NATIVE_SET_AAUDREGS(reg1, reg2, val1, val2)
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#define NATIVE_SET_AAU_AAIND_TAG(val) \
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NATIVE_SET_AAUREG(aaind_tag, val, 2)
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#define NATIVE_SET_AAU_AAIND_REG_AND_TAGS(reg, reg_tag, val, tags_val) \
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NATIVE_SET_AAUREGS(reg, reg_tag, val, tags_val)
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#define NATIVE_SET_AAU_AAIND_AAINCR_TAGS(aaind, aaincr) \
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NATIVE_SET_AAUREGS(aaind_tag, aaincr_tag, (aaind), (aaincr))
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#define NATIVE_SET_AAU_AAINCR(reg_mn, val) \
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NATIVE_SET_AAUDREG(reg_mn, val, 5)
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#define NATIVE_SET_AAU_AAINCRS(reg1, reg2, val1, val2) \
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NATIVE_SET_AAUDREGS(reg1, reg2, val1, val2)
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#define NATIVE_SET_AAU_AAINCR_TAG(val) \
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NATIVE_SET_AAUREG(aaincr_tag, val, 5)
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#define NATIVE_SET_AAU_AAINCR_REG_AND_TAGS(reg, reg_tag, val, tags_val) \
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NATIVE_SET_AAUREGS(reg, reg_tag, val, tags_val)
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#define NATIVE_SET_AAU_AASTI(reg_mn, val) \
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NATIVE_SET_AAUDREG(reg_mn, val, 2)
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#define NATIVE_SET_AAU_AASTIS(reg1, reg2, val1, val2) \
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NATIVE_SET_AAUDREGS(reg1, reg2, val1, val2)
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#define NATIVE_SET_AAU_AASTI_TAG(val) \
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NATIVE_SET_AAUREG(aasti_tag, val, 2)
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#define NATIVE_SET_AAU_AASR(val) \
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NATIVE_SET_AAUREG(aasr, val, 2)
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#define NATIVE_SET_AAU_AAFSTR(val) \
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NATIVE_SET_AAUREG(aafstr, val, 5)
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#define NATIVE_SET_AAU_AALDI(reg_mn, lval, rval) \
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NATIVE_SET_AAUDREGS(reg_mn, reg_mn, lval, rval)
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#define NATIVE_SET_AAU_AALDA(reg_mn, lval, rval) \
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NATIVE_SET_AAUREGS(reg_mn, reg_mn, lval, rval)
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#define NATIVE_SET_AAU_AALDV(lo, hi) \
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NATIVE_SET_AAUREGS(aaldv, aaldv, lo, hi)
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#define NATIVE_SET_AAU_AALDM(lo, hi) \
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NATIVE_SET_AAUREGS(aaldm, aaldm, lo, hi)
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/*
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* Native hardware AAU registers access function (can be paravirtualized)
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* WARNING: please use only following functions to access to AAU context,
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* do not use macroses above directly, because of macroses cannot be
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* paravirtualized
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*/
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static __always_inline u32 native_read_aasr_reg_value(void)
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{
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return NATIVE_GET_AAU_AASR();
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}
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static __always_inline void native_write_aasr_reg_value(u32 reg_value)
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{
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NATIVE_SET_AAU_AASR(reg_value);
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}
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static __always_inline u32 native_read_aafstr_reg_value(void)
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{
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return NATIVE_GET_AAU_AAFSTR();
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}
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static __always_inline void native_write_aafstr_reg_value(u32 reg_value)
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{
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NATIVE_SET_AAU_AAFSTR(reg_value);
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}
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static __always_inline e2k_aasr_t native_read_aasr_reg(void)
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{
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e2k_aasr_t aasr;
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AW(aasr) = native_read_aasr_reg_value();
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return aasr;
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}
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static __always_inline void native_write_aasr_reg(e2k_aasr_t aasr)
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{
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NATIVE_SET_AAU_AASR(AW(aasr));
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}
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static inline u32 native_read_aaind_reg_value_v3(int AAIND_no)
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{
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switch (AAIND_no) {
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case 0: return NATIVE_GET_AAU_AAIND_V3(aaind0);
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case 1: return NATIVE_GET_AAU_AAIND_V3(aaind1);
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case 2: return NATIVE_GET_AAU_AAIND_V3(aaind2);
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case 3: return NATIVE_GET_AAU_AAIND_V3(aaind3);
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case 4: return NATIVE_GET_AAU_AAIND_V3(aaind4);
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case 5: return NATIVE_GET_AAU_AAIND_V3(aaind5);
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case 6: return NATIVE_GET_AAU_AAIND_V3(aaind6);
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case 7: return NATIVE_GET_AAU_AAIND_V3(aaind7);
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case 8: return NATIVE_GET_AAU_AAIND_V3(aaind8);
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case 9: return NATIVE_GET_AAU_AAIND_V3(aaind9);
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case 10: return NATIVE_GET_AAU_AAIND_V3(aaind10);
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case 11: return NATIVE_GET_AAU_AAIND_V3(aaind11);
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case 12: return NATIVE_GET_AAU_AAIND_V3(aaind12);
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case 13: return NATIVE_GET_AAU_AAIND_V3(aaind13);
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case 14: return NATIVE_GET_AAU_AAIND_V3(aaind14);
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case 15: return NATIVE_GET_AAU_AAIND_V3(aaind15);
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default:
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BUG_AAU();
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return 0;
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}
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}
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static inline u64 native_read_aaind_reg_value_v5(int AAIND_no)
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{
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switch (AAIND_no) {
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case 0: return NATIVE_GET_AAU_AAIND_V5(aaind0);
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case 1: return NATIVE_GET_AAU_AAIND_V5(aaind1);
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case 2: return NATIVE_GET_AAU_AAIND_V5(aaind2);
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case 3: return NATIVE_GET_AAU_AAIND_V5(aaind3);
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case 4: return NATIVE_GET_AAU_AAIND_V5(aaind4);
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case 5: return NATIVE_GET_AAU_AAIND_V5(aaind5);
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case 6: return NATIVE_GET_AAU_AAIND_V5(aaind6);
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case 7: return NATIVE_GET_AAU_AAIND_V5(aaind7);
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case 8: return NATIVE_GET_AAU_AAIND_V5(aaind8);
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case 9: return NATIVE_GET_AAU_AAIND_V5(aaind9);
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case 10: return NATIVE_GET_AAU_AAIND_V5(aaind10);
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case 11: return NATIVE_GET_AAU_AAIND_V5(aaind11);
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case 12: return NATIVE_GET_AAU_AAIND_V5(aaind12);
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case 13: return NATIVE_GET_AAU_AAIND_V5(aaind13);
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case 14: return NATIVE_GET_AAU_AAIND_V5(aaind14);
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case 15: return NATIVE_GET_AAU_AAIND_V5(aaind15);
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default:
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BUG_AAU();
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return 0;
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}
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}
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static inline void native_write_aaind_reg_value(int AAIND_no, u64 reg_value)
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{
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switch (AAIND_no) {
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case 0:
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NATIVE_SET_AAU_AAIND(aaind0, reg_value);
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break;
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case 1:
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NATIVE_SET_AAU_AAIND(aaind1, reg_value);
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break;
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case 2:
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NATIVE_SET_AAU_AAIND(aaind2, reg_value);
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break;
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case 3:
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NATIVE_SET_AAU_AAIND(aaind3, reg_value);
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break;
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case 4:
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NATIVE_SET_AAU_AAIND(aaind4, reg_value);
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break;
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case 5:
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NATIVE_SET_AAU_AAIND(aaind5, reg_value);
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break;
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case 6:
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NATIVE_SET_AAU_AAIND(aaind6, reg_value);
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break;
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case 7:
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NATIVE_SET_AAU_AAIND(aaind7, reg_value);
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break;
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case 8:
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NATIVE_SET_AAU_AAIND(aaind8, reg_value);
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break;
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case 9:
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NATIVE_SET_AAU_AAIND(aaind9, reg_value);
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break;
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case 10:
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NATIVE_SET_AAU_AAIND(aaind10, reg_value);
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break;
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case 11:
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NATIVE_SET_AAU_AAIND(aaind11, reg_value);
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break;
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case 12:
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NATIVE_SET_AAU_AAIND(aaind12, reg_value);
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break;
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case 13:
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NATIVE_SET_AAU_AAIND(aaind13, reg_value);
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break;
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case 14:
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NATIVE_SET_AAU_AAIND(aaind14, reg_value);
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break;
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case 15:
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NATIVE_SET_AAU_AAIND(aaind15, reg_value);
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break;
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default:
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BUG_AAU();
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}
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}
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#define PREFIX_READ_AAINDS_PAIR_VALUE(PV_TYPE, pv_type, ISET, iset, \
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AAINDs_pair, value1, value2) \
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({ \
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switch (AAINDs_pair) { \
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case 0: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind0, aaind1, \
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value1, value2); \
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break; \
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case 1: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind1, aaind2, \
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value1, value2); \
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break; \
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case 2: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind2, aaind3, \
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value1, value2); \
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break; \
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case 3: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind3, aaind4, \
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value1, value2); \
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break; \
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case 4: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind4, aaind5, \
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value1, value2); \
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break; \
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case 5: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind5, aaind6, \
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value1, value2); \
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break; \
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case 6: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind6, aaind7, \
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value1, value2); \
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break; \
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case 7: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind7, aaind8, \
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value1, value2); \
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break; \
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case 8: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind8, aaind9, \
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value1, value2); \
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break; \
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case 9: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind9, aaind10, \
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value1, value2); \
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break; \
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case 10: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind10, aaind11, \
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value1, value2); \
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break; \
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case 11: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind11, aaind12, \
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value1, value2); \
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break; \
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case 12: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind12, aaind13, \
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value1, value2); \
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break; \
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case 13: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind13, aaind14, \
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value1, value2); \
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break; \
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case 14: \
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PV_TYPE##_GET_AAU_AAINDS_##ISET(aaind14, aaind15, \
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value1, value2); \
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break; \
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case 15: \
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value1 = PV_TYPE##_GET_AAU_AAIND_##ISET(aaind15); \
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value2 = PV_TYPE##_GET_AAU_AAIND_TAG(); \
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break; \
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default: \
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BUG_AAU(); \
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value1 = 0; \
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value2 = 0; \
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} \
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})
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#define NATIVE_READ_AAINDS_PAIR_VALUE_V3(AAINDs_pair, lo_value, hi_value) \
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PREFIX_READ_AAINDS_PAIR_VALUE(NATIVE, native, V3, v3, \
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AAINDs_pair, lo_value, hi_value)
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#define NATIVE_READ_AAINDS_PAIR_VALUE_V5(AAINDs_pair, lo_value, hi_value) \
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PREFIX_READ_AAINDS_PAIR_VALUE(NATIVE, native, V5, v5, \
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AAINDs_pair, lo_value, hi_value)
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#define PREFIX_READ_AAIND_REG15_AND_TAGS_VALUE_V3(PV_TYPE, pv_type, \
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reg_value, tags_value) \
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({ \
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PV_TYPE##_GET_AAU_AAINDS_V3(aaind15, aaind_tag, \
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reg_value, tags_value); \
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})
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#define NATIVE_READ_AAIND_REG15_AND_TAGS_VALUE_V3(reg_value, tags_value) \
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PREFIX_READ_AAIND_REG15_AND_TAGS_VALUE_V3(NATIVE, native, \
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reg_value, tags_value)
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#define PREFIX_READ_AAIND_REG15_AND_TAGS_VALUE_V5(PV_TYPE, pv_type, \
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reg_value, tags_value) \
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({ \
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reg_value = PV_TYPE##_GET_AAU_AAIND_V5(aaind15); \
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tags_value = PV_TYPE##_GET_AAU_AAIND_TAG(); \
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})
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#define NATIVE_READ_AAIND_REG15_AND_TAGS_VALUE_V5(reg_value, tags_value) \
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PREFIX_READ_AAIND_REG15_AND_TAGS_VALUE_V5(NATIVE, native, \
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reg_value, tags_value)
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static __always_inline void
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native_write_aainds_pair_value(int AAINDs_pair, u64 lo_value, u64 hi_value)
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{
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switch (AAINDs_pair) {
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case 0:
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NATIVE_SET_AAU_AAINDS(aaind0, aaind1, lo_value, hi_value);
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break;
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case 1:
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NATIVE_SET_AAU_AAINDS(aaind1, aaind2, lo_value, hi_value);
|
|
break;
|
|
case 2:
|
|
NATIVE_SET_AAU_AAINDS(aaind2, aaind3, lo_value, hi_value);
|
|
break;
|
|
case 3:
|
|
NATIVE_SET_AAU_AAINDS(aaind3, aaind4, lo_value, hi_value);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AAINDS(aaind4, aaind5, lo_value, hi_value);
|
|
break;
|
|
case 5:
|
|
NATIVE_SET_AAU_AAINDS(aaind5, aaind6, lo_value, hi_value);
|
|
break;
|
|
case 6:
|
|
NATIVE_SET_AAU_AAINDS(aaind6, aaind7, lo_value, hi_value);
|
|
break;
|
|
case 7:
|
|
NATIVE_SET_AAU_AAINDS(aaind7, aaind8, lo_value, hi_value);
|
|
break;
|
|
case 8:
|
|
NATIVE_SET_AAU_AAINDS(aaind8, aaind9, lo_value, hi_value);
|
|
break;
|
|
case 9:
|
|
NATIVE_SET_AAU_AAINDS(aaind9, aaind10, lo_value, hi_value);
|
|
break;
|
|
case 10:
|
|
NATIVE_SET_AAU_AAINDS(aaind10, aaind11, lo_value, hi_value);
|
|
break;
|
|
case 11:
|
|
NATIVE_SET_AAU_AAINDS(aaind11, aaind12, lo_value, hi_value);
|
|
break;
|
|
case 12:
|
|
NATIVE_SET_AAU_AAINDS(aaind12, aaind13, lo_value, hi_value);
|
|
break;
|
|
case 13:
|
|
NATIVE_SET_AAU_AAINDS(aaind13, aaind14, lo_value, hi_value);
|
|
break;
|
|
case 14:
|
|
NATIVE_SET_AAU_AAINDS(aaind14, aaind15, lo_value, hi_value);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
|
|
static inline u32 native_read_aaind_tags_reg_value(void)
|
|
{
|
|
return NATIVE_GET_AAU_AAIND_TAG();
|
|
}
|
|
static inline void native_write_aaind_tags_reg_value(u32 reg_value)
|
|
{
|
|
NATIVE_SET_AAU_AAIND_TAG(reg_value);
|
|
}
|
|
static inline u32 native_read_aaincr_reg_value_v3(int AAINCR_no)
|
|
{
|
|
switch (AAINCR_no) {
|
|
case 0: return NATIVE_GET_AAU_AAINCR_V3(aaincr0);
|
|
case 1: return NATIVE_GET_AAU_AAINCR_V3(aaincr1);
|
|
case 2: return NATIVE_GET_AAU_AAINCR_V3(aaincr2);
|
|
case 3: return NATIVE_GET_AAU_AAINCR_V3(aaincr3);
|
|
case 4: return NATIVE_GET_AAU_AAINCR_V3(aaincr4);
|
|
case 5: return NATIVE_GET_AAU_AAINCR_V3(aaincr5);
|
|
case 6: return NATIVE_GET_AAU_AAINCR_V3(aaincr6);
|
|
case 7: return NATIVE_GET_AAU_AAINCR_V3(aaincr7);
|
|
default:
|
|
BUG_AAU();
|
|
return 0;
|
|
}
|
|
}
|
|
static inline u64 native_read_aaincr_reg_value_v5(int AAINCR_no)
|
|
{
|
|
switch (AAINCR_no) {
|
|
case 0: return NATIVE_GET_AAU_AAINCR_V5(aaincr0);
|
|
case 1: return NATIVE_GET_AAU_AAINCR_V5(aaincr1);
|
|
case 2: return NATIVE_GET_AAU_AAINCR_V5(aaincr2);
|
|
case 3: return NATIVE_GET_AAU_AAINCR_V5(aaincr3);
|
|
case 4: return NATIVE_GET_AAU_AAINCR_V5(aaincr4);
|
|
case 5: return NATIVE_GET_AAU_AAINCR_V5(aaincr5);
|
|
case 6: return NATIVE_GET_AAU_AAINCR_V5(aaincr6);
|
|
case 7: return NATIVE_GET_AAU_AAINCR_V5(aaincr7);
|
|
default:
|
|
BUG_AAU();
|
|
return 0;
|
|
}
|
|
}
|
|
static inline void native_write_aaincr_reg_value(int AAINCR_no, u64 reg_value)
|
|
{
|
|
switch (AAINCR_no) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AAINCR(aaincr0, reg_value);
|
|
break;
|
|
case 1:
|
|
NATIVE_SET_AAU_AAINCR(aaincr1, reg_value);
|
|
break;
|
|
case 2:
|
|
NATIVE_SET_AAU_AAINCR(aaincr2, reg_value);
|
|
break;
|
|
case 3:
|
|
NATIVE_SET_AAU_AAINCR(aaincr3, reg_value);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AAINCR(aaincr4, reg_value);
|
|
break;
|
|
case 5:
|
|
NATIVE_SET_AAU_AAINCR(aaincr5, reg_value);
|
|
break;
|
|
case 6:
|
|
NATIVE_SET_AAU_AAINCR(aaincr6, reg_value);
|
|
break;
|
|
case 7:
|
|
NATIVE_SET_AAU_AAINCR(aaincr7, reg_value);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
static inline u32 native_read_aaincr_tags_reg_value(void)
|
|
{
|
|
return NATIVE_GET_AAU_AAINCR_TAG();
|
|
}
|
|
static inline void native_write_aaincr_tags_reg_value(u32 reg_value)
|
|
{
|
|
NATIVE_SET_AAU_AAINCR_TAG(reg_value);
|
|
}
|
|
|
|
#define PREFIX_READ_AAINCRS_PAIR_VALUE(PV_TYPE, pv_type, ISET, iset, \
|
|
AAINCRs_pair, value1, value2) \
|
|
({ \
|
|
switch (AAINCRs_pair) { \
|
|
case 0: \
|
|
PV_TYPE##_GET_AAU_AAINCRS_##ISET(aaincr0, aaincr1, \
|
|
value1, value2); \
|
|
break; \
|
|
case 1: \
|
|
PV_TYPE##_GET_AAU_AAINCRS_##ISET(aaincr1, aaincr2, \
|
|
value1, value2); \
|
|
break; \
|
|
case 2: \
|
|
PV_TYPE##_GET_AAU_AAINCRS_##ISET(aaincr2, aaincr3, \
|
|
value1, value2); \
|
|
break; \
|
|
case 3: \
|
|
PV_TYPE##_GET_AAU_AAINCRS_##ISET(aaincr3, aaincr4, \
|
|
value1, value2); \
|
|
break; \
|
|
case 4: \
|
|
PV_TYPE##_GET_AAU_AAINCRS_##ISET(aaincr4, aaincr5, \
|
|
value1, value2); \
|
|
break; \
|
|
case 5: \
|
|
PV_TYPE##_GET_AAU_AAINCRS_##ISET(aaincr5, aaincr6, \
|
|
value1, value2); \
|
|
break; \
|
|
case 6: \
|
|
PV_TYPE##_GET_AAU_AAINCRS_##ISET(aaincr6, aaincr7, \
|
|
value1, value2); \
|
|
break; \
|
|
case 7: \
|
|
value1 = PV_TYPE##_GET_AAU_AAINCR_##ISET(aaind15); \
|
|
value2 = PV_TYPE##_GET_AAU_AAINCR_TAG(); \
|
|
break; \
|
|
default: \
|
|
BUG_AAU(); \
|
|
value1 = 0; \
|
|
value2 = 0; \
|
|
} \
|
|
})
|
|
#define NATIVE_READ_AAINCRS_PAIR_VALUE_V3(AAINCRs_pair, lo_value, hi_value) \
|
|
PREFIX_READ_AAINCRS_PAIR_VALUE(NATIVE, native, V3, v3, \
|
|
AAINCRs_pair, lo_value, hi_value)
|
|
#define NATIVE_READ_AAINCRS_PAIR_VALUE_V5(AAINCRs_pair, lo_value, hi_value) \
|
|
PREFIX_READ_AAINCRS_PAIR_VALUE(NATIVE, native, V5, v5, \
|
|
AAINCRs_pair, lo_value, hi_value)
|
|
#define PREFIX_READ_AAINCR_REG7_AND_TAGS_VALUE_V3(PV_TYPE, pv_type, \
|
|
reg_value, tags_value) \
|
|
({ \
|
|
PV_TYPE##_GET_AAU_AAINCRS_V3(aaincr7, aaincr_tag, \
|
|
reg_value, tags_value); \
|
|
})
|
|
#define NATIVE_READ_AAINCR_REG7_AND_TAGS_VALUE_V3(reg_value, tags_value) \
|
|
PREFIX_READ_AAINCR_REG7_AND_TAGS_VALUE_V3(NATIVE, native, \
|
|
reg_value, tags_value)
|
|
#define PREFIX_READ_AAINCR_REG7_AND_TAGS_VALUE_V5(PV_TYPE, pv_type, \
|
|
reg_value, tags_value) \
|
|
({ \
|
|
reg_value = PV_TYPE##_GET_AAU_AAINCR_V5(aaincr7); \
|
|
tags_value = PV_TYPE##_GET_AAU_AAINCR_TAG(); \
|
|
})
|
|
#define NATIVE_READ_AAINCR_REG7_AND_TAGS_VALUE_V5(reg_value, tags_value) \
|
|
PREFIX_READ_AAINCR_REG7_AND_TAGS_VALUE_V5(NATIVE, native, \
|
|
reg_value, tags_value)
|
|
|
|
static __always_inline void
|
|
native_write_aaincrs_pair_value(int AAINCRs_pair, u64 lo_value, u64 hi_value)
|
|
{
|
|
switch (AAINCRs_pair) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AAINCRS(aaincr0, aaincr1, lo_value, hi_value);
|
|
break;
|
|
case 1:
|
|
NATIVE_SET_AAU_AAINCRS(aaincr1, aaincr2, lo_value, hi_value);
|
|
break;
|
|
case 2:
|
|
NATIVE_SET_AAU_AAINCRS(aaincr2, aaincr3, lo_value, hi_value);
|
|
break;
|
|
case 3:
|
|
NATIVE_SET_AAU_AAINCRS(aaincr3, aaincr4, lo_value, hi_value);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AAINCRS(aaincr4, aaincr5, lo_value, hi_value);
|
|
break;
|
|
case 5:
|
|
NATIVE_SET_AAU_AAINCRS(aaincr5, aaincr6, lo_value, hi_value);
|
|
break;
|
|
case 6:
|
|
NATIVE_SET_AAU_AAINCRS(aaincr6, aaincr7, lo_value, hi_value);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
|
|
static inline u32 native_read_aasti_reg_value_v3(int AASTI_no)
|
|
{
|
|
switch (AASTI_no) {
|
|
case 0: return NATIVE_GET_AAU_AASTI_V3(aasti0);
|
|
case 1: return NATIVE_GET_AAU_AASTI_V3(aasti1);
|
|
case 2: return NATIVE_GET_AAU_AASTI_V3(aasti2);
|
|
case 3: return NATIVE_GET_AAU_AASTI_V3(aasti3);
|
|
case 4: return NATIVE_GET_AAU_AASTI_V3(aasti4);
|
|
case 5: return NATIVE_GET_AAU_AASTI_V3(aasti5);
|
|
case 6: return NATIVE_GET_AAU_AASTI_V3(aasti6);
|
|
case 7: return NATIVE_GET_AAU_AASTI_V3(aasti7);
|
|
case 8: return NATIVE_GET_AAU_AASTI_V3(aasti8);
|
|
case 9: return NATIVE_GET_AAU_AASTI_V3(aasti9);
|
|
case 10: return NATIVE_GET_AAU_AASTI_V3(aasti10);
|
|
case 11: return NATIVE_GET_AAU_AASTI_V3(aasti11);
|
|
case 12: return NATIVE_GET_AAU_AASTI_V3(aasti12);
|
|
case 13: return NATIVE_GET_AAU_AASTI_V3(aasti13);
|
|
case 14: return NATIVE_GET_AAU_AASTI_V3(aasti14);
|
|
case 15: return NATIVE_GET_AAU_AASTI_V3(aasti15);
|
|
default:
|
|
BUG_AAU();
|
|
return 0;
|
|
}
|
|
}
|
|
static inline u64 native_read_aasti_reg_value_v5(int AASTI_no)
|
|
{
|
|
switch (AASTI_no) {
|
|
case 0: return NATIVE_GET_AAU_AASTI_V5(aasti0);
|
|
case 1: return NATIVE_GET_AAU_AASTI_V5(aasti1);
|
|
case 2: return NATIVE_GET_AAU_AASTI_V5(aasti2);
|
|
case 3: return NATIVE_GET_AAU_AASTI_V5(aasti3);
|
|
case 4: return NATIVE_GET_AAU_AASTI_V5(aasti4);
|
|
case 5: return NATIVE_GET_AAU_AASTI_V5(aasti5);
|
|
case 6: return NATIVE_GET_AAU_AASTI_V5(aasti6);
|
|
case 7: return NATIVE_GET_AAU_AASTI_V5(aasti7);
|
|
case 8: return NATIVE_GET_AAU_AASTI_V5(aasti8);
|
|
case 9: return NATIVE_GET_AAU_AASTI_V5(aasti9);
|
|
case 10: return NATIVE_GET_AAU_AASTI_V5(aasti10);
|
|
case 11: return NATIVE_GET_AAU_AASTI_V5(aasti11);
|
|
case 12: return NATIVE_GET_AAU_AASTI_V5(aasti12);
|
|
case 13: return NATIVE_GET_AAU_AASTI_V5(aasti13);
|
|
case 14: return NATIVE_GET_AAU_AASTI_V5(aasti14);
|
|
case 15: return NATIVE_GET_AAU_AASTI_V5(aasti15);
|
|
default:
|
|
BUG_AAU();
|
|
return 0;
|
|
}
|
|
}
|
|
static inline void native_write_aasti_reg_value(int AASTI_no, u64 reg_value)
|
|
{
|
|
switch (AASTI_no) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AASTI(aasti0, reg_value);
|
|
break;
|
|
case 1:
|
|
NATIVE_SET_AAU_AASTI(aasti1, reg_value);
|
|
break;
|
|
case 2:
|
|
NATIVE_SET_AAU_AASTI(aasti2, reg_value);
|
|
break;
|
|
case 3:
|
|
NATIVE_SET_AAU_AASTI(aasti3, reg_value);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AASTI(aasti4, reg_value);
|
|
break;
|
|
case 5:
|
|
NATIVE_SET_AAU_AASTI(aasti5, reg_value);
|
|
break;
|
|
case 6:
|
|
NATIVE_SET_AAU_AASTI(aasti6, reg_value);
|
|
break;
|
|
case 7:
|
|
NATIVE_SET_AAU_AASTI(aasti7, reg_value);
|
|
break;
|
|
case 8:
|
|
NATIVE_SET_AAU_AASTI(aasti8, reg_value);
|
|
break;
|
|
case 9:
|
|
NATIVE_SET_AAU_AASTI(aasti9, reg_value);
|
|
break;
|
|
case 10:
|
|
NATIVE_SET_AAU_AASTI(aasti10, reg_value);
|
|
break;
|
|
case 11:
|
|
NATIVE_SET_AAU_AASTI(aasti11, reg_value);
|
|
break;
|
|
case 12:
|
|
NATIVE_SET_AAU_AASTI(aasti12, reg_value);
|
|
break;
|
|
case 13:
|
|
NATIVE_SET_AAU_AASTI(aasti13, reg_value);
|
|
break;
|
|
case 14:
|
|
NATIVE_SET_AAU_AASTI(aasti14, reg_value);
|
|
break;
|
|
case 15:
|
|
NATIVE_SET_AAU_AASTI(aasti15, reg_value);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
static inline u32 native_read_aasti_tags_reg_value(void)
|
|
{
|
|
return NATIVE_GET_AAU_AASTI_TAG();
|
|
}
|
|
static inline void native_write_aasti_tags_reg_value(u32 reg_value)
|
|
{
|
|
NATIVE_SET_AAU_AASTI_TAG(reg_value);
|
|
}
|
|
|
|
#define PREFIX_READ_AASTIS_PAIR_VALUE(PV_TYPE, pv_type, ISET, iset, \
|
|
AASTIs_pair, value1, value2) \
|
|
({ \
|
|
switch (AASTIs_pair) { \
|
|
case 0: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti0, aasti1, \
|
|
value1, value2); \
|
|
break; \
|
|
case 1: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti1, aasti2, \
|
|
value1, value2); \
|
|
break; \
|
|
case 2: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti2, aasti3, \
|
|
value1, value2); \
|
|
break; \
|
|
case 3: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti3, aasti4, \
|
|
value1, value2);\
|
|
break; \
|
|
case 4: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti4, aasti5, \
|
|
value1, value2); \
|
|
break; \
|
|
case 5: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti5, aasti6, \
|
|
value1, value2); \
|
|
break; \
|
|
case 6: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti6, aasti7, \
|
|
value1, value2); \
|
|
break; \
|
|
case 7: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti7, aasti8, \
|
|
value1, value2); \
|
|
break; \
|
|
case 8: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti8, aasti9, \
|
|
value1, value2); \
|
|
break; \
|
|
case 9: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti9, aasti10, \
|
|
value1, value2); \
|
|
break; \
|
|
case 10: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti10, aasti11, \
|
|
value1, value2); \
|
|
break; \
|
|
case 11: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti11, aasti12, \
|
|
value1, value2); \
|
|
break; \
|
|
case 12: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti12, aasti13, \
|
|
value1, value2); \
|
|
break; \
|
|
case 13: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti13, aasti14, \
|
|
value1, value2); \
|
|
break; \
|
|
case 14: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti14, aasti15, \
|
|
value1, value2); \
|
|
break; \
|
|
case 15: \
|
|
PV_TYPE##_GET_AAU_AASTIS_##ISET(aasti15, aasti_tag, \
|
|
value1, value2); \
|
|
break; \
|
|
default: \
|
|
BUG_AAU(); \
|
|
value1 = 0; \
|
|
value2 = 0; \
|
|
} \
|
|
})
|
|
#define NATIVE_READ_AASTIS_PAIR_VALUE_V3(AASTIs_pair, lo_value, hi_value) \
|
|
PREFIX_READ_AASTIS_PAIR_VALUE(NATIVE, native, V3, v3, \
|
|
AASTIs_pair, lo_value, hi_value)
|
|
#define NATIVE_READ_AASTIS_PAIR_VALUE_V5(AASTIs_pair, lo_value, hi_value) \
|
|
PREFIX_READ_AASTIS_PAIR_VALUE(NATIVE, native, V5, v5, \
|
|
AASTIs_pair, lo_value, hi_value)
|
|
|
|
static __always_inline void
|
|
native_write_aastis_pair_value(int AASTIs_pair, u64 lo_value, u64 hi_value)
|
|
{
|
|
switch (AASTIs_pair) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AASTIS(aasti0, aasti1, lo_value, hi_value);
|
|
break;
|
|
case 1:
|
|
NATIVE_SET_AAU_AASTIS(aasti1, aasti2, lo_value, hi_value);
|
|
break;
|
|
case 2:
|
|
NATIVE_SET_AAU_AASTIS(aasti2, aasti3, lo_value, hi_value);
|
|
break;
|
|
case 3:
|
|
NATIVE_SET_AAU_AASTIS(aasti3, aasti4, lo_value, hi_value);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AASTIS(aasti4, aasti5, lo_value, hi_value);
|
|
break;
|
|
case 5:
|
|
NATIVE_SET_AAU_AASTIS(aasti5, aasti6, lo_value, hi_value);
|
|
break;
|
|
case 6:
|
|
NATIVE_SET_AAU_AASTIS(aasti6, aasti7, lo_value, hi_value);
|
|
break;
|
|
case 7:
|
|
NATIVE_SET_AAU_AASTIS(aasti7, aasti8, lo_value, hi_value);
|
|
break;
|
|
case 8:
|
|
NATIVE_SET_AAU_AASTIS(aasti8, aasti9, lo_value, hi_value);
|
|
break;
|
|
case 9:
|
|
NATIVE_SET_AAU_AASTIS(aasti9, aasti10, lo_value, hi_value);
|
|
break;
|
|
case 10:
|
|
NATIVE_SET_AAU_AASTIS(aasti10, aasti11, lo_value, hi_value);
|
|
break;
|
|
case 11:
|
|
NATIVE_SET_AAU_AASTIS(aasti11, aasti12, lo_value, hi_value);
|
|
break;
|
|
case 12:
|
|
NATIVE_SET_AAU_AASTIS(aasti12, aasti13, lo_value, hi_value);
|
|
break;
|
|
case 13:
|
|
NATIVE_SET_AAU_AASTIS(aasti13, aasti14, lo_value, hi_value);
|
|
break;
|
|
case 14:
|
|
NATIVE_SET_AAU_AASTIS(aasti14, aasti15, lo_value, hi_value);
|
|
break;
|
|
case 15:
|
|
NATIVE_SET_AAU_AASTIS(aasti15, aasti_tag, lo_value, hi_value);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
|
|
#define PREFIX_READ_AALDI_REG_VALUE(PV_TYPE, pv_type, ISET, iset, \
|
|
AALDI_no, value1, value2) \
|
|
({ \
|
|
switch (AALDI_no) { \
|
|
case 0: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi0, value1, value2); \
|
|
break; \
|
|
case 1: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi1, value1, value2); \
|
|
break; \
|
|
case 2: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi2, value1, value2); \
|
|
break; \
|
|
case 3: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi3, value1, value2); \
|
|
break; \
|
|
case 4: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi4, value1, value2); \
|
|
break; \
|
|
case 5: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi5, value1, value2); \
|
|
break; \
|
|
case 6: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi6, value1, value2); \
|
|
break; \
|
|
case 7: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi7, value1, value2); \
|
|
break; \
|
|
case 8: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi8, value1, value2); \
|
|
break; \
|
|
case 9: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi9, value1, value2); \
|
|
break; \
|
|
case 10: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi10, value1, value2); \
|
|
break; \
|
|
case 11: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi11, value1, value2); \
|
|
break; \
|
|
case 12: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi12, value1, value2); \
|
|
break; \
|
|
case 13: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi13, value1, value2); \
|
|
break; \
|
|
case 14: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi14, value1, value2); \
|
|
break; \
|
|
case 15: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi15, value1, value2); \
|
|
break; \
|
|
case 16: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi16, value1, value2); \
|
|
break; \
|
|
case 17: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi17, value1, value2); \
|
|
break; \
|
|
case 18: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi18, value1, value2); \
|
|
break; \
|
|
case 19: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi19, value1, value2); \
|
|
break; \
|
|
case 20: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi20, value1, value2); \
|
|
break; \
|
|
case 21: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi21, value1, value2); \
|
|
break; \
|
|
case 22: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi22, value1, value2); \
|
|
break; \
|
|
case 23: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi23, value1, value2); \
|
|
break; \
|
|
case 24: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi24, value1, value2); \
|
|
break; \
|
|
case 25: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi25, value1, value2); \
|
|
break; \
|
|
case 26: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi26, value1, value2); \
|
|
break; \
|
|
case 27: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi27, value1, value2); \
|
|
break; \
|
|
case 28: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi28, value1, value2); \
|
|
break; \
|
|
case 29: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi29, value1, value2); \
|
|
break; \
|
|
case 30: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi30, value1, value2); \
|
|
break; \
|
|
case 31: \
|
|
PV_TYPE##_GET_AAU_AALDI_##ISET(aaldi31, value1, value2); \
|
|
break; \
|
|
default: \
|
|
BUG_AAU(); \
|
|
value1 = 0; \
|
|
value2 = 0; \
|
|
} \
|
|
})
|
|
#define NATIVE_READ_AALDI_REG_VALUE_V3(AALDI_no, value1, value2) \
|
|
PREFIX_READ_AALDI_REG_VALUE(NATIVE, native, V3, v3, \
|
|
AALDI_no, value1, value2)
|
|
#define NATIVE_READ_AALDI_REG_VALUE_V5(AALDI_no, value1, value2) \
|
|
PREFIX_READ_AALDI_REG_VALUE(NATIVE, native, V5, v5, \
|
|
AALDI_no, value1, value2)
|
|
|
|
static inline void
|
|
native_read_aaldi_reg_value_v3(int AALDI_no, u64 *l_value, u64 *r_value)
|
|
{
|
|
u32 value1, value2;
|
|
|
|
NATIVE_READ_AALDI_REG_VALUE_V3(AALDI_no, value1, value2);
|
|
*l_value = value1;
|
|
*r_value = value2;
|
|
}
|
|
|
|
static inline void
|
|
native_read_aaldi_reg_value_v5(int AALDI_no, u64 *l_value, u64 *r_value)
|
|
{
|
|
u64 value1, value2;
|
|
|
|
NATIVE_READ_AALDI_REG_VALUE_V5(AALDI_no, value1, value2);
|
|
*l_value = value1;
|
|
*r_value = value2;
|
|
}
|
|
|
|
static inline void
|
|
native_write_aaldi_reg_value(int AALDI_no, u64 l_value, u64 r_value)
|
|
{
|
|
switch (AALDI_no) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AALDI(aaldi0, l_value, r_value);
|
|
break;
|
|
case 1:
|
|
NATIVE_SET_AAU_AALDI(aaldi1, l_value, r_value);
|
|
break;
|
|
case 2:
|
|
NATIVE_SET_AAU_AALDI(aaldi2, l_value, r_value);
|
|
break;
|
|
case 3:
|
|
NATIVE_SET_AAU_AALDI(aaldi3, l_value, r_value);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AALDI(aaldi4, l_value, r_value);
|
|
break;
|
|
case 5:
|
|
NATIVE_SET_AAU_AALDI(aaldi5, l_value, r_value);
|
|
break;
|
|
case 6:
|
|
NATIVE_SET_AAU_AALDI(aaldi6, l_value, r_value);
|
|
break;
|
|
case 7:
|
|
NATIVE_SET_AAU_AALDI(aaldi7, l_value, r_value);
|
|
break;
|
|
case 8:
|
|
NATIVE_SET_AAU_AALDI(aaldi8, l_value, r_value);
|
|
break;
|
|
case 9:
|
|
NATIVE_SET_AAU_AALDI(aaldi9, l_value, r_value);
|
|
break;
|
|
case 10:
|
|
NATIVE_SET_AAU_AALDI(aaldi10, l_value, r_value);
|
|
break;
|
|
case 11:
|
|
NATIVE_SET_AAU_AALDI(aaldi11, l_value, r_value);
|
|
break;
|
|
case 12:
|
|
NATIVE_SET_AAU_AALDI(aaldi12, l_value, r_value);
|
|
break;
|
|
case 13:
|
|
NATIVE_SET_AAU_AALDI(aaldi13, l_value, r_value);
|
|
break;
|
|
case 14:
|
|
NATIVE_SET_AAU_AALDI(aaldi14, l_value, r_value);
|
|
break;
|
|
case 15:
|
|
NATIVE_SET_AAU_AALDI(aaldi15, l_value, r_value);
|
|
break;
|
|
case 16:
|
|
NATIVE_SET_AAU_AALDI(aaldi16, l_value, r_value);
|
|
break;
|
|
case 17:
|
|
NATIVE_SET_AAU_AALDI(aaldi17, l_value, r_value);
|
|
break;
|
|
case 18:
|
|
NATIVE_SET_AAU_AALDI(aaldi18, l_value, r_value);
|
|
break;
|
|
case 19:
|
|
NATIVE_SET_AAU_AALDI(aaldi19, l_value, r_value);
|
|
break;
|
|
case 20:
|
|
NATIVE_SET_AAU_AALDI(aaldi20, l_value, r_value);
|
|
break;
|
|
case 21:
|
|
NATIVE_SET_AAU_AALDI(aaldi21, l_value, r_value);
|
|
break;
|
|
case 22:
|
|
NATIVE_SET_AAU_AALDI(aaldi22, l_value, r_value);
|
|
break;
|
|
case 23:
|
|
NATIVE_SET_AAU_AALDI(aaldi23, l_value, r_value);
|
|
break;
|
|
case 24:
|
|
NATIVE_SET_AAU_AALDI(aaldi24, l_value, r_value);
|
|
break;
|
|
case 25:
|
|
NATIVE_SET_AAU_AALDI(aaldi25, l_value, r_value);
|
|
break;
|
|
case 26:
|
|
NATIVE_SET_AAU_AALDI(aaldi26, l_value, r_value);
|
|
break;
|
|
case 27:
|
|
NATIVE_SET_AAU_AALDI(aaldi27, l_value, r_value);
|
|
break;
|
|
case 28:
|
|
NATIVE_SET_AAU_AALDI(aaldi28, l_value, r_value);
|
|
break;
|
|
case 29:
|
|
NATIVE_SET_AAU_AALDI(aaldi29, l_value, r_value);
|
|
break;
|
|
case 30:
|
|
NATIVE_SET_AAU_AALDI(aaldi30, l_value, r_value);
|
|
break;
|
|
case 31:
|
|
NATIVE_SET_AAU_AALDI(aaldi31, l_value, r_value);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
l_value = 0;
|
|
r_value = 0;
|
|
}
|
|
}
|
|
|
|
#define PREFIX_READ_AALDAS_REG_VALUE(PV_TYPE, pv_type, \
|
|
AALDAs_no, value1, value2) \
|
|
({ \
|
|
switch (AALDAs_no) { \
|
|
case 0: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda0, value1, value2); \
|
|
break; \
|
|
case 4: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda4, value1, value2); \
|
|
break; \
|
|
case 8: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda8, value1, value2); \
|
|
break; \
|
|
case 12: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda12, value1, value2); \
|
|
break; \
|
|
case 16: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda16, value1, value2); \
|
|
break; \
|
|
case 20: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda20, value1, value2); \
|
|
break; \
|
|
case 24: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda24, value1, value2); \
|
|
break; \
|
|
case 28: \
|
|
PV_TYPE##_GET_AAU_AALDA(aalda28, value1, value2); \
|
|
break; \
|
|
default: \
|
|
BUG_AAU(); \
|
|
value1 = 0; \
|
|
value2 = 0; \
|
|
} \
|
|
})
|
|
#define NATIVE_READ_AALDAS_REG_VALUE(AALDAs_no, value1, value2) \
|
|
PREFIX_READ_AALDAS_REG_VALUE(NATIVE, native, \
|
|
AALDAs_no, value1, value2)
|
|
|
|
static inline void
|
|
native_read_aaldas_reg_value(int AALDAs_no, u32 *l_value, u32 *r_value)
|
|
{
|
|
u32 value1, value2;
|
|
|
|
NATIVE_READ_AALDAS_REG_VALUE(AALDAs_no, value1, value2);
|
|
*l_value = value1;
|
|
*r_value = value2;
|
|
}
|
|
|
|
static inline void
|
|
native_write_aaldas_reg_value(int AALDAs_no, u32 l_value, u32 r_value)
|
|
{
|
|
switch (AALDAs_no) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AALDA(aalda0, l_value, r_value);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AALDA(aalda4, l_value, r_value);
|
|
break;
|
|
case 8:
|
|
NATIVE_SET_AAU_AALDA(aalda8, l_value, r_value);
|
|
break;
|
|
case 12:
|
|
NATIVE_SET_AAU_AALDA(aalda12, l_value, r_value);
|
|
break;
|
|
case 16:
|
|
NATIVE_SET_AAU_AALDA(aalda16, l_value, r_value);
|
|
break;
|
|
case 20:
|
|
NATIVE_SET_AAU_AALDA(aalda20, l_value, r_value);
|
|
break;
|
|
case 24:
|
|
NATIVE_SET_AAU_AALDA(aalda24, l_value, r_value);
|
|
break;
|
|
case 28:
|
|
NATIVE_SET_AAU_AALDA(aalda28, l_value, r_value);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
l_value = 0;
|
|
r_value = 0;
|
|
}
|
|
}
|
|
static __always_inline void native_read_aaldm_reg_value(u32 *lo_value,
|
|
u32 *hi_value)
|
|
{
|
|
u32 value1, value2;
|
|
|
|
NATIVE_GET_AAU_AALDM(value1, value2);
|
|
*lo_value = value1;
|
|
*hi_value = value2;
|
|
}
|
|
static __always_inline void native_write_aaldm_reg_value(u32 lo_value,
|
|
u32 hi_value)
|
|
{
|
|
NATIVE_SET_AAU_AALDM(lo_value, hi_value);
|
|
}
|
|
static __always_inline void native_read_aaldm_reg(e2k_aaldm_t *aaldm)
|
|
{
|
|
native_read_aaldm_reg_value(&aaldm->lo, &aaldm->hi);
|
|
}
|
|
static __always_inline void native_write_aaldm_reg(e2k_aaldm_t aaldm)
|
|
{
|
|
native_write_aaldm_reg_value(aaldm.lo, aaldm.hi);
|
|
}
|
|
static __always_inline void native_read_aaldv_reg_value(u32 *lo_value,
|
|
u32 *hi_value)
|
|
{
|
|
u32 value1, value2;
|
|
|
|
NATIVE_GET_AAU_AALDV(value1, value2);
|
|
*lo_value = value1;
|
|
*hi_value = value2;
|
|
}
|
|
static __always_inline void native_write_aaldv_reg_value(u32 lo_value,
|
|
u32 hi_value)
|
|
{
|
|
NATIVE_SET_AAU_AALDV(lo_value, hi_value);
|
|
}
|
|
static __always_inline void native_read_aaldv_reg(e2k_aaldv_t *aaldv)
|
|
{
|
|
native_read_aaldv_reg_value(&aaldv->lo, &aaldv->hi);
|
|
}
|
|
static __always_inline void native_write_aaldv_reg(e2k_aaldv_t aaldv)
|
|
{
|
|
native_write_aaldv_reg_value(aaldv.lo, aaldv.hi);
|
|
}
|
|
|
|
static inline void native_read_aad_reg(int AAD_no, e2k_aadj_t *mem_p)
|
|
{
|
|
switch (AAD_no) {
|
|
case 0:
|
|
NATIVE_GET_AAU_AAD(aadr0, mem_p);
|
|
break;
|
|
case 1:
|
|
NATIVE_GET_AAU_AAD(aadr1, mem_p);
|
|
break;
|
|
case 2:
|
|
NATIVE_GET_AAU_AAD(aadr2, mem_p);
|
|
break;
|
|
case 3:
|
|
NATIVE_GET_AAU_AAD(aadr3, mem_p);
|
|
break;
|
|
case 4:
|
|
NATIVE_GET_AAU_AAD(aadr4, mem_p);
|
|
break;
|
|
case 5:
|
|
NATIVE_GET_AAU_AAD(aadr5, mem_p);
|
|
break;
|
|
case 6:
|
|
NATIVE_GET_AAU_AAD(aadr6, mem_p);
|
|
break;
|
|
case 7:
|
|
NATIVE_GET_AAU_AAD(aadr7, mem_p);
|
|
break;
|
|
case 8:
|
|
NATIVE_GET_AAU_AAD(aadr8, mem_p);
|
|
break;
|
|
case 9:
|
|
NATIVE_GET_AAU_AAD(aadr9, mem_p);
|
|
break;
|
|
case 10:
|
|
NATIVE_GET_AAU_AAD(aadr10, mem_p);
|
|
break;
|
|
case 11:
|
|
NATIVE_GET_AAU_AAD(aadr11, mem_p);
|
|
break;
|
|
case 12:
|
|
NATIVE_GET_AAU_AAD(aadr12, mem_p);
|
|
break;
|
|
case 13:
|
|
NATIVE_GET_AAU_AAD(aadr13, mem_p);
|
|
break;
|
|
case 14:
|
|
NATIVE_GET_AAU_AAD(aadr14, mem_p);
|
|
break;
|
|
case 15:
|
|
NATIVE_GET_AAU_AAD(aadr15, mem_p);
|
|
break;
|
|
case 16:
|
|
NATIVE_GET_AAU_AAD(aadr16, mem_p);
|
|
break;
|
|
case 17:
|
|
NATIVE_GET_AAU_AAD(aadr17, mem_p);
|
|
break;
|
|
case 18:
|
|
NATIVE_GET_AAU_AAD(aadr18, mem_p);
|
|
break;
|
|
case 19:
|
|
NATIVE_GET_AAU_AAD(aadr19, mem_p);
|
|
break;
|
|
case 20:
|
|
NATIVE_GET_AAU_AAD(aadr20, mem_p);
|
|
break;
|
|
case 21:
|
|
NATIVE_GET_AAU_AAD(aadr21, mem_p);
|
|
break;
|
|
case 22:
|
|
NATIVE_GET_AAU_AAD(aadr22, mem_p);
|
|
break;
|
|
case 23:
|
|
NATIVE_GET_AAU_AAD(aadr23, mem_p);
|
|
break;
|
|
case 24:
|
|
NATIVE_GET_AAU_AAD(aadr24, mem_p);
|
|
break;
|
|
case 25:
|
|
NATIVE_GET_AAU_AAD(aadr25, mem_p);
|
|
break;
|
|
case 26:
|
|
NATIVE_GET_AAU_AAD(aadr26, mem_p);
|
|
break;
|
|
case 27:
|
|
NATIVE_GET_AAU_AAD(aadr27, mem_p);
|
|
break;
|
|
case 28:
|
|
NATIVE_GET_AAU_AAD(aadr28, mem_p);
|
|
break;
|
|
case 29:
|
|
NATIVE_GET_AAU_AAD(aadr29, mem_p);
|
|
break;
|
|
case 30:
|
|
NATIVE_GET_AAU_AAD(aadr30, mem_p);
|
|
break;
|
|
case 31:
|
|
NATIVE_GET_AAU_AAD(aadr31, mem_p);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
|
|
static inline void native_write_aad_reg(int AAD_no, e2k_aadj_t *mem_p)
|
|
{
|
|
switch (AAD_no) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AAD(aadr0, mem_p);
|
|
break;
|
|
case 1:
|
|
NATIVE_SET_AAU_AAD(aadr1, mem_p);
|
|
break;
|
|
case 2:
|
|
NATIVE_SET_AAU_AAD(aadr2, mem_p);
|
|
break;
|
|
case 3:
|
|
NATIVE_SET_AAU_AAD(aadr3, mem_p);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AAD(aadr4, mem_p);
|
|
break;
|
|
case 5:
|
|
NATIVE_SET_AAU_AAD(aadr5, mem_p);
|
|
break;
|
|
case 6:
|
|
NATIVE_SET_AAU_AAD(aadr6, mem_p);
|
|
break;
|
|
case 7:
|
|
NATIVE_SET_AAU_AAD(aadr7, mem_p);
|
|
break;
|
|
case 8:
|
|
NATIVE_SET_AAU_AAD(aadr8, mem_p);
|
|
break;
|
|
case 9:
|
|
NATIVE_SET_AAU_AAD(aadr9, mem_p);
|
|
break;
|
|
case 10:
|
|
NATIVE_SET_AAU_AAD(aadr10, mem_p);
|
|
break;
|
|
case 11:
|
|
NATIVE_SET_AAU_AAD(aadr11, mem_p);
|
|
break;
|
|
case 12:
|
|
NATIVE_SET_AAU_AAD(aadr12, mem_p);
|
|
break;
|
|
case 13:
|
|
NATIVE_SET_AAU_AAD(aadr13, mem_p);
|
|
break;
|
|
case 14:
|
|
NATIVE_SET_AAU_AAD(aadr14, mem_p);
|
|
break;
|
|
case 15:
|
|
NATIVE_SET_AAU_AAD(aadr15, mem_p);
|
|
break;
|
|
case 16:
|
|
NATIVE_SET_AAU_AAD(aadr16, mem_p);
|
|
break;
|
|
case 17:
|
|
NATIVE_SET_AAU_AAD(aadr17, mem_p);
|
|
break;
|
|
case 18:
|
|
NATIVE_SET_AAU_AAD(aadr18, mem_p);
|
|
break;
|
|
case 19:
|
|
NATIVE_SET_AAU_AAD(aadr19, mem_p);
|
|
break;
|
|
case 20:
|
|
NATIVE_SET_AAU_AAD(aadr20, mem_p);
|
|
break;
|
|
case 21:
|
|
NATIVE_SET_AAU_AAD(aadr21, mem_p);
|
|
break;
|
|
case 22:
|
|
NATIVE_SET_AAU_AAD(aadr22, mem_p);
|
|
break;
|
|
case 23:
|
|
NATIVE_SET_AAU_AAD(aadr23, mem_p);
|
|
break;
|
|
case 24:
|
|
NATIVE_SET_AAU_AAD(aadr24, mem_p);
|
|
break;
|
|
case 25:
|
|
NATIVE_SET_AAU_AAD(aadr25, mem_p);
|
|
break;
|
|
case 26:
|
|
NATIVE_SET_AAU_AAD(aadr26, mem_p);
|
|
break;
|
|
case 27:
|
|
NATIVE_SET_AAU_AAD(aadr27, mem_p);
|
|
break;
|
|
case 28:
|
|
NATIVE_SET_AAU_AAD(aadr28, mem_p);
|
|
break;
|
|
case 29:
|
|
NATIVE_SET_AAU_AAD(aadr29, mem_p);
|
|
break;
|
|
case 30:
|
|
NATIVE_SET_AAU_AAD(aadr30, mem_p);
|
|
break;
|
|
case 31:
|
|
NATIVE_SET_AAU_AAD(aadr31, mem_p);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
|
|
static __always_inline void native_read_aads_4_reg(int AADs_no, e2k_aadj_t *mem_p)
|
|
{
|
|
switch (AADs_no) {
|
|
case 0:
|
|
NATIVE_GET_AAU_AADS(aadr0, aadr1, aadr2, aadr3, mem_p);
|
|
break;
|
|
case 4:
|
|
NATIVE_GET_AAU_AADS(aadr4, aadr5, aadr6, aadr7, mem_p);
|
|
break;
|
|
case 8:
|
|
NATIVE_GET_AAU_AADS(aadr8, aadr9, aadr10, aadr11, mem_p);
|
|
break;
|
|
case 12:
|
|
NATIVE_GET_AAU_AADS(aadr12, aadr13, aadr14, aadr15, mem_p);
|
|
break;
|
|
case 16:
|
|
NATIVE_GET_AAU_AADS(aadr16, aadr17, aadr18, aadr19, mem_p);
|
|
break;
|
|
case 20:
|
|
NATIVE_GET_AAU_AADS(aadr20, aadr21, aadr22, aadr23, mem_p);
|
|
break;
|
|
case 24:
|
|
NATIVE_GET_AAU_AADS(aadr24, aadr25, aadr26, aadr27, mem_p);
|
|
break;
|
|
case 28:
|
|
NATIVE_GET_AAU_AADS(aadr28, aadr29, aadr30, aadr31, mem_p);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
|
|
static __always_inline void native_write_aads_4_reg(int AADs_no,
|
|
e2k_aadj_t *mem_p)
|
|
{
|
|
switch (AADs_no) {
|
|
case 0:
|
|
NATIVE_SET_AAU_AADS(aadr0, aadr1, aadr2, aadr3, mem_p);
|
|
break;
|
|
case 4:
|
|
NATIVE_SET_AAU_AADS(aadr4, aadr5, aadr6, aadr7, mem_p);
|
|
break;
|
|
case 8:
|
|
NATIVE_SET_AAU_AADS(aadr8, aadr9, aadr10, aadr11, mem_p);
|
|
break;
|
|
case 12:
|
|
NATIVE_SET_AAU_AADS(aadr12, aadr13, aadr14, aadr15, mem_p);
|
|
break;
|
|
case 16:
|
|
NATIVE_SET_AAU_AADS(aadr16, aadr17, aadr18, aadr19, mem_p);
|
|
break;
|
|
case 20:
|
|
NATIVE_SET_AAU_AADS(aadr20, aadr21, aadr22, aadr23, mem_p);
|
|
break;
|
|
case 24:
|
|
NATIVE_SET_AAU_AADS(aadr24, aadr25, aadr26, aadr27, mem_p);
|
|
break;
|
|
case 28:
|
|
NATIVE_SET_AAU_AADS(aadr28, aadr29, aadr30, aadr31, mem_p);
|
|
break;
|
|
default:
|
|
BUG_AAU();
|
|
}
|
|
}
|
|
|
|
/* Clear AAU to prepare it for restoring.
|
|
* Make this a macro to avoid include hell - it uses cpu_has() inside... */
|
|
#define native_clear_apb() NATIVE_CLEAR_APB()
|
|
|
|
#endif /* _NATIVE_AAU_REGS_ACCESS_H_ */
|