344 lines
8.0 KiB
C
344 lines
8.0 KiB
C
#ifndef __ASM_L_PIC_H
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#define __ASM_L_PIC_H
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/*
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* Choose between PICs in arch/l. If CONFIG_EPIC=n, APIC is chosen statically
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* If CONFIG_EPIC=y (only on e2k), choose dynamically based on CPU_FEAT_EPIC
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*/
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extern int first_system_vector;
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extern int apic_get_vector(void);
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#ifdef CONFIG_EPIC
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#include <asm/apic.h>
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#include <asm/epic.h>
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#include <asm/machdep.h>
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static inline unsigned int read_pic_id(void)
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{
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if (cpu_has_epic())
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return read_epic_id();
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else
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return read_apic_id();
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}
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extern void epic_processor_info(int epicid, int version,
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unsigned int cepic_freq);
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extern int generic_processor_info(int apicid, int version);
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static inline void pic_processor_info(int picid, int picver, unsigned int freq)
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{
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if (cpu_has_epic())
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epic_processor_info(picid, picver, freq);
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else
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generic_processor_info(picid, picver);
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}
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extern int get_cepic_timer_frequency(void);
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static inline int get_pic_timer_frequency(void)
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{
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if (cpu_has_epic())
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return get_cepic_timer_frequency();
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else
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return -1; /* standard constant value */
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}
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/* IO-APIC definitions */
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struct irq_data;
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extern void ioapic_ack_epic_edge(struct irq_data *data);
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extern void ack_apic_edge(struct irq_data *data);
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static inline void ioapic_ack_pic_edge(struct irq_data *data)
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{
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if (cpu_has_epic())
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ioapic_ack_epic_edge(data);
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else
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ack_apic_edge(data);
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}
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extern void ioapic_ack_epic_level(struct irq_data *data);
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extern void ack_apic_level(struct irq_data *data);
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static inline void ioapic_ack_pic_level(struct irq_data *data)
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{
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if (cpu_has_epic())
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ioapic_ack_epic_level(data);
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else
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ack_apic_level(data);
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}
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struct irq_chip;
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extern struct irq_chip ioepic_to_apic_chip;
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static inline bool irqchip_is_ioepic_to_apic(struct irq_chip *chip)
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{
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return chip == &ioepic_to_apic_chip;
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}
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/* IRQ definitions */
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#ifdef CONFIG_IRQ_WORK
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extern void epic_irq_work_raise(void);
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extern void apic_irq_work_raise(void);
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static inline void pic_irq_work_raise(void)
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{
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if (cpu_has_epic())
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epic_irq_work_raise();
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else
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apic_irq_work_raise();
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}
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#endif
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#ifdef CONFIG_SMP
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extern void epic_send_call_function_ipi_mask(const struct cpumask *mask);
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extern void apic_send_call_function_ipi_mask(const struct cpumask *mask);
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static inline void pic_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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if (cpu_has_epic())
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epic_send_call_function_ipi_mask(mask);
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else
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apic_send_call_function_ipi_mask(mask);
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}
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extern void epic_send_call_function_single_ipi(int cpu);
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extern void apic_send_call_function_single_ipi(int cpu);
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static inline void pic_send_call_function_single_ipi(int cpu)
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{
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if (cpu_has_epic())
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epic_send_call_function_single_ipi(cpu);
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else
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apic_send_call_function_single_ipi(cpu);
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}
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extern void epic_smp_send_reschedule(int cpu);
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extern void apic_smp_send_reschedule(int cpu);
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static inline void pic_send_reschedule(int cpu)
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{
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if (cpu_has_epic())
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epic_smp_send_reschedule(cpu);
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else
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apic_smp_send_reschedule(cpu);
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}
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#endif
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struct pt_regs;
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extern noinline notrace void epic_do_nmi(struct pt_regs *regs);
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extern noinline notrace void apic_do_nmi(struct pt_regs *regs);
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static inline void pic_do_nmi(struct pt_regs *regs)
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{
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if (cpu_has_epic())
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epic_do_nmi(regs);
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else
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apic_do_nmi(regs);
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}
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static inline void ack_pic_irq(void)
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{
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if (cpu_has_epic())
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ack_epic_irq();
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else
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ack_APIC_irq();
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}
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/* For do_postpone_tick() */
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extern void cepic_timer_interrupt(void);
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extern void local_apic_timer_interrupt(void);
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static inline void local_pic_timer_interrupt(void)
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{
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if (cpu_has_epic())
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cepic_timer_interrupt();
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else
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local_apic_timer_interrupt();
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}
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extern int print_local_APICs(bool force);
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extern int print_epics(bool force);
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static inline int print_local_pics(bool force)
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{
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if (cpu_has_epic())
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return print_epics(force);
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else
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return print_local_APICs(force);
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}
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struct pci_dev;
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extern int native_setup_msi_irqs_epic(struct pci_dev *dev, int nvec, int type);
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extern int native_setup_msi_irqs_apic(struct pci_dev *dev, int nvec, int type);
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static inline int setup_msi_irqs_pic(struct pci_dev *dev, int nvec, int type)
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{
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if (cpu_has_epic())
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return native_setup_msi_irqs_epic(dev, nvec, type);
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else
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return native_setup_msi_irqs_apic(dev, nvec, type);
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}
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extern void native_teardown_msi_irq_epic(unsigned int irq);
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extern void native_teardown_msi_irq_apic(unsigned int irq);
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static inline void teardown_msi_irq_pic(unsigned int irq)
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{
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if (cpu_has_epic())
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native_teardown_msi_irq_epic(irq);
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else
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native_teardown_msi_irq_apic(irq);
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}
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extern void __init_recv setup_secondary_epic_clock(void);
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extern void setup_secondary_APIC_clock(void);
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static inline void __init_recv setup_secondary_pic_clock(void)
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{
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if (cpu_has_epic())
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setup_secondary_epic_clock();
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else
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setup_secondary_APIC_clock();
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}
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extern int epic_get_vector(void);
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static inline int pic_get_vector(void)
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{
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if (cpu_has_epic())
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return epic_get_vector();
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else
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return apic_get_vector();
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}
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extern int ioepic_pin_to_irq_num(unsigned int pin, struct pci_dev *dev);
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extern int ioepic_pin_to_msi_ioapic_irq(unsigned int pin, struct pci_dev *dev);
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static inline int ioepic_pin_to_irq_pic(unsigned int pin, struct pci_dev *dev)
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{
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if (cpu_has_epic())
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return ioepic_pin_to_irq_num(pin, dev);
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else
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return ioepic_pin_to_msi_ioapic_irq(pin, dev);
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}
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static inline void __init setup_boot_pic_clock(void)
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{
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if (cpu_has_epic())
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setup_boot_epic_clock();
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else
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setup_boot_APIC_clock();
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}
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extern void __init init_apic_mappings(void);
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static inline void __init init_pic_mappings(void)
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{
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if (!cpu_has_epic())
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return init_apic_mappings();
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}
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extern void setup_cepic(void);
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#else /* !(CONFIG_EPIC) */
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#include <asm/apic.h>
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static inline unsigned int read_pic_id(void)
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{
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return read_apic_id();
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}
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extern int generic_processor_info(int apicid, int version);
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static inline void pic_processor_info(int picid, int picver, unsigned int freq)
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{
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generic_processor_info(picid, picver);
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}
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static inline int get_pic_timer_frequency(void)
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{
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return -1; /* standard constant value */
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}
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/* IO-APIC definitions */
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struct irq_data;
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extern void ack_apic_edge(struct irq_data *data);
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static inline void ioapic_ack_pic_edge(struct irq_data *data)
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{
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ack_apic_edge(data);
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}
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extern void ack_apic_level(struct irq_data *data);
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static inline void ioapic_ack_pic_level(struct irq_data *data)
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{
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ack_apic_level(data);
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}
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struct irq_chip;
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static inline bool irqchip_is_ioepic_to_apic(struct irq_chip *chip)
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{
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return 0;
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}
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/* IRQ definitions */
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extern void apic_irq_work_raise(void);
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static inline void pic_irq_work_raise(void)
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{
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apic_irq_work_raise();
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}
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extern void apic_send_call_function_ipi_mask(const struct cpumask *mask);
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static inline void pic_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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apic_send_call_function_ipi_mask(mask);
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}
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extern void apic_send_call_function_single_ipi(int cpu);
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static inline void pic_send_call_function_single_ipi(int cpu)
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{
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apic_send_call_function_single_ipi(cpu);
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}
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extern void apic_smp_send_reschedule(int cpu);
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static inline void pic_send_reschedule(int cpu)
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{
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apic_smp_send_reschedule(cpu);
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}
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struct pt_regs;
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extern noinline notrace void apic_do_nmi(struct pt_regs *regs);
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static inline void pic_do_nmi(struct pt_regs *regs)
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{
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apic_do_nmi(regs);
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}
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static inline void ack_pic_irq(void)
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{
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ack_APIC_irq();
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}
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/* For do_postpone_tick() */
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extern void local_apic_timer_interrupt(void);
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static inline void local_pic_timer_interrupt(void)
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{
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local_apic_timer_interrupt();
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}
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extern int print_local_APICs(bool force);
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static inline int print_local_pics(bool force)
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{
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return print_local_APICs(force);
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}
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struct pci_dev;
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extern int native_setup_msi_irqs_apic(struct pci_dev *dev, int nvec, int type);
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static inline int setup_msi_irqs_pic(struct pci_dev *dev, int nvec, int type)
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{
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return native_setup_msi_irqs_apic(dev, nvec, type);
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}
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extern void native_teardown_msi_irq_apic(unsigned int irq);
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static inline void teardown_msi_irq_pic(unsigned int irq)
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{
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native_teardown_msi_irq_apic(irq);
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}
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static inline void __init setup_boot_pic_clock(void)
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{
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setup_boot_APIC_clock();
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}
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extern void __init init_apic_mappings(void);
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static inline void __init init_pic_mappings(void)
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{
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return init_apic_mappings();
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}
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#endif /* !(CONFIG_EPIC) */
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#endif /* __ASM_L_PIC_H */
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