113 lines
3.7 KiB
C
113 lines
3.7 KiB
C
#ifndef __ASM_L_EPIC_H
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#define __ASM_L_EPIC_H
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#ifdef __KERNEL__
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#include <asm/epicdef.h>
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#include <asm/epic_regs.h>
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extern unsigned int early_prepic_node_read_w(int node, unsigned int reg);
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extern void early_prepic_node_write_w(int node, unsigned int reg,
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unsigned int v);
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extern unsigned int prepic_node_read_w(int node, unsigned int reg);
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extern void prepic_node_write_w(int node, unsigned int reg, unsigned int v);
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/*
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* Verbosity can be turned on by passing 'epic_debug' cmdline parameter
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* epic_debug is defined in epic.c
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*/
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extern bool epic_debug;
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#define epic_printk(s, a...) do { \
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if (epic_debug) \
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printk(s, ##a); \
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} while (0)
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extern bool epic_bgi_mode;
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extern unsigned int cepic_timer_delta;
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extern void setup_boot_epic_clock(void);
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extern void __init setup_bsp_epic(void);
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/*
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* CEPIC_ID register has 10 valid bits: 2 for prepicn (node) and 8 for
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* cepicn (core in node). Since currently kernel does not support NR_CPUS > 64,
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* we ignore 4 most significant bits of cepicn.
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*
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* For example, core 0 on node 1 will have full cepic id = 256 and short cepic
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* id = 16
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*/
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static inline unsigned int cepic_id_full_to_short(unsigned int reg_value)
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{
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union cepic_id reg_id;
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reg_id.raw = reg_value;
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reg_id.bits.cepicn_reserved = 0;
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return reg_id.bits.prepicn << CEPIC_ID_SHORT_VALID_BITS
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| reg_id.bits.cepicn;
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}
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static inline unsigned int cepic_id_short_to_full(unsigned int cepic_id)
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{
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union cepic_id reg_id;
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reg_id.raw = 0;
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reg_id.bits.cepicn = cepic_id & CEPIC_ID_SHORT_VALID_MASK;
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reg_id.bits.prepicn = cepic_id >> CEPIC_ID_SHORT_VALID_BITS;
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return reg_id.raw;
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}
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static inline unsigned int read_epic_id(void)
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{
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return cepic_id_full_to_short(epic_read_w(CEPIC_ID));
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}
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static inline bool read_epic_bsp(void)
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{
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union cepic_ctrl reg;
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reg.raw = epic_read_w(CEPIC_CTRL);
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return reg.bits.bsp_core;
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}
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extern void __init_recv setup_prepic(void);
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extern void ack_epic_irq(void);
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extern void epic_send_IPI(unsigned int dest_id, int vector);
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extern void epic_send_IPI_mask(const struct cpumask *mask, int vector);
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extern void epic_send_IPI_self(int vector);
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extern void epic_send_IPI_mask_allbutself(const struct cpumask *mask,
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int vector);
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extern void epic_wait_icr_idle(void);
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extern void clear_cepic(void);
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extern bool pcsm_adjust_enable;
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struct pcs_handle {
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void (*pcs_interrupt)(void);
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};
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extern void register_pcs_handle(const struct pcs_handle *handle);
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extern void unregister_pcs_handle(void);
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extern __visible void epic_smp_timer_interrupt(struct pt_regs *regs);
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extern __visible void epic_smp_spurious_interrupt(struct pt_regs *regs);
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extern __visible void epic_smp_error_interrupt(struct pt_regs *regs);
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extern __visible void prepic_smp_error_interrupt(struct pt_regs *regs);
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extern __visible void epic_smp_irq_move_cleanup_interrupt(struct pt_regs *regs);
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extern __visible void epic_smp_irq_work_interrupt(struct pt_regs *regs);
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extern __visible void cepic_epic_interrupt(struct pt_regs *regs);
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extern __visible void epic_hc_emerg_interrupt(struct pt_regs *regs);
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extern __visible void epic_iommu_interrupt(struct pt_regs *regs);
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extern __visible void epic_uncore_interrupt(struct pt_regs *regs);
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extern __visible void epic_ipcc_interrupt(struct pt_regs *regs);
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extern __visible void epic_hc_interrupt(struct pt_regs *regs);
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extern __visible void epic_pcs_interrupt(struct pt_regs *regs);
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#ifdef CONFIG_KVM_ASYNC_PF
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extern __visible void epic_pv_apf_wake(struct pt_regs *regs);
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#endif /* CONFIG_KVM_ASYNC_PF */
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#ifdef CONFIG_SMP
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extern __visible void epic_smp_reschedule_interrupt(struct pt_regs *regs);
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extern __visible void epic_smp_call_function_interrupt(struct pt_regs *regs);
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extern __visible void epic_smp_call_function_single_interrupt(
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struct pt_regs *regs);
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_L_EPIC_H */
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