413 lines
14 KiB
C
413 lines
14 KiB
C
/*
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* E2K ISET V2-V5 page table structure and common definitions.
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*
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* Copyright 2001 Salavat S. Guiliazov (atic@mcst.ru)
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*/
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#ifndef _ASM_E2K_PGTABLE_V2_H
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#define _ASM_E2K_PGTABLE_V2_H
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/*
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* This file contains the functions and defines necessary to modify and
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* use the E2K ISET V2-V5 page tables.
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* NOTE: E2K has four levels of page tables.
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*/
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#include <linux/types.h>
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#include <asm/pgtable_types.h>
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#define E2K_MAX_PHYS_BITS_V2 40 /* max. number of physical address */
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/* bits (architected) */
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#ifndef __ASSEMBLY__
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/*
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* PTE format
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*/
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#define _PAGE_W_BIT_V2 1 /* bit # of Writable */
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#define _PAGE_CD1_BIT_V2 4 /* right bit of Cache disable */
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#define _PAGE_CD2_BIT_V2 9 /* left bit of Cache disable */
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#define _PAGE_A_HW_BIT_V2 5 /* bit # of Accessed Page */
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#define _PAGE_D_BIT_V2 6 /* bit # of Page Dirty */
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#define _PAGE_HUGE_BIT_V2 7 /* bit # of Page Size */
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#define _PAGE_AVAIL_BIT_V2 11 /* prog bit Page Available */
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#define _PAGE_PFN_SHIFT_V2 12 /* shift of PFN field */
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#define _PAGE_CU_BITS_V2 48 /* bits # of Compilation Unit */
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#define _PAGE_P_V2 0x0000000000000001ULL /* Page Present bit */
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#define _PAGE_W_V2 0x0000000000000002ULL /* Writable (0 - only read) */
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#define _PAGE_UU2_V2 0x0000000000000004ULL /* unused bit # 2 */
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#define _PAGE_PWT_V2 0x0000000000000008ULL /* Write Through */
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#define _PAGE_CD1_V2 (1UL << _PAGE_CD1_BIT_V2) /* 0x0000000000000010 */
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/* Cache disable (right bit) */
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#define _PAGE_A_HW_V2 (1UL << _PAGE_A_HW_BIT_V2) /* Accessed Page */
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#define _PAGE_D_V2 (1UL << _PAGE_D_BIT_V2) /* Page Dirty */
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#define _PAGE_HUGE_V2 0x0000000000000080ULL /* Page Size */
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#define _PAGE_G_V2 0x0000000000000100ULL /* Global Page */
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#define _PAGE_CD2_V2 (1UL << _PAGE_CD2_BIT_V2) /* 0x0000000000000200 */
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/* Cache disable (left bit) */
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#define _PAGE_NWA_V2 0x0000000000000400ULL /* Prohibit address writing */
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/*
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* The _PAGE_PROTNONE bit is set only when the _PAGE_PRESENT bit
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* is cleared, so we can use almost any bits for it. Must make
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* sure though that pte_modify() will work with _PAGE_PROTNONE.
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*/
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#define _PAGE_PROTNONE_V2 _PAGE_NWA_V2
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#define _PAGE_AVAIL_V2 (1UL << _PAGE_AVAIL_BIT_V2)
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#define _PAGE_SPECIAL_V2 _PAGE_AVAIL_V2
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#define _PAGE_GFN_V2 _PAGE_AVAIL_V2 /* Page is mapped to guest */
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/* physical memory */
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#define _PAGE_PFN_V2 0x000000fffffff000ULL /* Physical Page Number */
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#define _PAGE_VALID_V2 0x0000010000000000ULL /* Valid Page */
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#define _PAGE_PV_V2 0x0000020000000000ULL /* PriVileged Page */
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#define _PAGE_INT_PR_V2 0x0000040000000000ULL /* Integer address access */
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/* Protection */
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#define _PAGE_NON_EX_V2 0x0000080000000000ULL /* Non Executable Page */
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#define _PAGE_RES_V2 0x0000f00000000000ULL /* Reserved bits */
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#define _PAGE_RES_44_V2 0x0000100000000000ULL /* SG bit was previously */
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#define _PAGE_SEC_MAP_V2 0x0000200000000000ULL /* Secondary space mapping */
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/* Software only bit */
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#define _PAGE_INTL_PR_V2 0x0000400000000000ULL /* used as Intel PR in TLB */
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/* should be 1 for Elbrus */
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#define _PAGE_INTL_WP_V2 0x0000800000000000ULL /* used as Intel WR in TLB */
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/* should be 0 for Elbrus */
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#define _PAGE_A_SW_V2 (1UL << _PAGE_A_SW_BIT_V2) /* Accessed Page */
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/* (software emulation) */
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#define _PAGE_C_UNIT_V2 0xffff000000000000ULL /* Compilation Unit */
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#define _PAGE_MMIO_SW_V2 0x0c00000000000000ULL /* pte is MMIO software flag */
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/*
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* #76626 - hardware access bit should always be set. So we do not
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* touch it and use software bit for things like pte_mkyoung().
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*/
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#if !defined(CONFIG_BOOT_E2K) && !defined(E2K_P2V) && \
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defined(CONFIG_CPU_ES2)
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# define _PAGE_A_SW_BIT_V2 47 /* bit # of Accessed Page */
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/* (software emulated) */
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# define _PAGE_A_BIT_V2 (cpu_has(CPU_HWBUG_PAGE_A) ? \
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_PAGE_A_SW_BIT_V2 : _PAGE_A_HW_BIT_V2)
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#else
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# define _PAGE_A_SW_BIT_V2 _PAGE_A_HW_BIT_V2
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# define _PAGE_A_BIT_V2 _PAGE_A_HW_BIT_V2
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#endif
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#define _PAGE_A_V2 (1UL << _PAGE_A_BIT_V2) /* Accessed Page */
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/* Cache disable flags */
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#define _PAGE_CD_MASK_V2 (_PAGE_CD1_V2 | _PAGE_CD2_V2)
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#define _PAGE_CD_VAL_V2(x) ((x & 0x1ULL) << _PAGE_CD1_BIT_V2 | \
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(x & 0x2ULL) << (_PAGE_CD2_BIT_V2 - 1))
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#define _PAGE_CD_EN_V2 _PAGE_CD_VAL_V2(0UL) /* all caches enabled */
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#define _PAGE_CD_D1_DIS_V2 _PAGE_CD_VAL_V2(1UL) /* DCACHE1 disabled */
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#define _PAGE_CD_D_DIS_V2 _PAGE_CD_VAL_V2(2UL) /* DCACHE1, DCACHE2 disabled */
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#define _PAGE_CD_DIS_V2 _PAGE_CD_VAL_V2(3UL) /* DCACHE1, DCACHE2, ECACHE */
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/* disabled */
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#define _PAGE_PWT_DIS_V2 0UL /* Page Write Through */
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/* disabled */
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#define _PAGE_PWT_EN_V2 _PAGE_PWT_V2 /* Page Write Through */
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/* enabled */
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/* some useful PT entries protection basis values */
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#define _PAGE_KERNEL_RX_NOT_GLOB_V2 \
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(_PAGE_P_V2 | _PAGE_VALID_V2 | \
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_PAGE_PV_V2 | _PAGE_A_HW_V2)
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#define _PAGE_KERNEL_RO_NOT_GLOB_V2 \
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(_PAGE_KERNEL_RX_NOT_GLOB_V2 | _PAGE_NON_EX_V2)
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#define _PAGE_KERNEL_RWX_NOT_GLOB_V2 \
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(_PAGE_KERNEL_RX_NOT_GLOB_V2 | \
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_PAGE_W_V2 | _PAGE_D_V2)
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#define _PAGE_KERNEL_RW_NOT_GLOB_V2 \
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(_PAGE_KERNEL_RWX_NOT_GLOB_V2 | _PAGE_NON_EX_V2)
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#define _PAGE_KERNEL_HUGE_RW_NOT_GLOB_V2 \
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(_PAGE_KERNEL_RW_NOT_GLOB_V2 | _PAGE_HUGE_V2)
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#define _PAGE_KERNEL_RX_GLOB_V2 \
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(_PAGE_KERNEL_RX_NOT_GLOB_V2 | _PAGE_G_V2)
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#define _PAGE_KERNEL_RO_GLOB_V2 \
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(_PAGE_KERNEL_RO_NOT_GLOB_V2 | _PAGE_G_V2)
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#define _PAGE_KERNEL_RWX_GLOB_V2 \
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(_PAGE_KERNEL_RWX_NOT_GLOB_V2 | _PAGE_G_V2)
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#define _PAGE_KERNEL_RW_GLOB_V2 \
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(_PAGE_KERNEL_RW_NOT_GLOB_V2 | _PAGE_G_V2)
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#define _PAGE_KERNEL_HUGE_RW_GLOB_V2 \
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(_PAGE_KERNEL_HUGE_RW_NOT_GLOB_V2 | _PAGE_G_V2)
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#ifdef CONFIG_GLOBAL_CONTEXT
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#define _PAGE_KERNEL_RX_V2 _PAGE_KERNEL_RX_GLOB_V2
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#define _PAGE_KERNEL_RO_V2 _PAGE_KERNEL_RO_GLOB_V2
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#define _PAGE_KERNEL_RWX_V2 _PAGE_KERNEL_RWX_GLOB_V2
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#define _PAGE_KERNEL_RW_V2 _PAGE_KERNEL_RW_GLOB_V2
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#define _PAGE_KERNEL_HUGE_RW_V2 _PAGE_KERNEL_HUGE_RW_GLOB_V2
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#else /* ! CONFIG_GLOBAL_CONTEXT */
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#define _PAGE_KERNEL_RX_V2 _PAGE_KERNEL_RX_NOT_GLOB_V2
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#define _PAGE_KERNEL_RO_V2 _PAGE_KERNEL_RO_NOT_GLOB_V2
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#define _PAGE_KERNEL_RWX_V2 _PAGE_KERNEL_RWX_NOT_GLOB_V2
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#define _PAGE_KERNEL_RW_V2 _PAGE_KERNEL_RW_NOT_GLOB_V2
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#define _PAGE_KERNEL_HUGE_RW_V2 _PAGE_KERNEL_HUGE_RW_NOT_GLOB_V2
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#endif /* CONFIG_GLOBAL_CONTEXT */
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#define _PAGE_KERNEL_V2 _PAGE_KERNEL_RW_V2
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#define _PAGE_KERNEL_HUGE_V2 _PAGE_KERNEL_HUGE_RW_V2
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#define _PAGE_KERNEL_IMAGE_V2 _PAGE_KERNEL_RX_V2
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#define _PAGE_KERNEL_MODULE_V2 _PAGE_KERNEL_RWX_V2
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#define _PAGE_KERNEL_PT_V2 _PAGE_KERNEL_V2
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#define _PAGE_USER_PT_V2 _PAGE_KERNEL_RW_NOT_GLOB_V2
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/* convert physical address to page frame number for PTE */
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#define _PAGE_PADDR_TO_PFN_V2(phys_addr) \
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(((e2k_addr_t)phys_addr) & _PAGE_PFN_V2)
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/* convert the page frame number from PTE to physical address */
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#define _PAGE_PFN_TO_PADDR_V2(pte_val) \
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(((e2k_addr_t)(pte_val) & _PAGE_PFN_V2))
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/* get/set pte Compilation Unit Index field */
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#define _PAGE_INDEX_TO_CUNIT_V2(index) \
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(((pteval_t)(index) << _PAGE_CU_BITS_V2) & _PAGE_C_UNIT_V2)
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#define _PAGE_INDEX_FROM_CUNIT_V2(prot) \
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(((prot) & _PAGE_C_UNIT_V2) >> _PAGE_CU_BITS_V2)
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#define SET_PAGE_CUI_V2(pte_val, cui) \
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(((pte_val) & ~_PAGE_C_UNIT_V2) | _PAGE_INDEX_TO_CUNIT_V2(cui))
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/* PTE flags mask to can update/reduce and restricted to update */
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#define _PAGE_CHG_MASK_V2 (_PAGE_PFN_V2 | _PAGE_A_HW_V2 | _PAGE_A_V2 | \
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_PAGE_D_V2 | _PAGE_SPECIAL_V2 | \
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_PAGE_CD1_V2 | _PAGE_CD2_V2 | _PAGE_PWT_V2)
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#define _HPAGE_CHG_MASK_V2 (_PAGE_CHG_MASK_V2 | _PAGE_HUGE_V2)
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#define _PROT_REDUCE_MASK_V2 (_PAGE_P_V2 | _PAGE_W_V2 | _PAGE_A_HW_V2 | \
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_PAGE_A_V2 | _PAGE_D_V2 | _PAGE_VALID_V2 | \
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_PAGE_G_V2 | \
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_PAGE_CD_MASK_V2 | _PAGE_PWT_V2)
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#define _PROT_RESTRICT_MASK_V2 (_PAGE_PV_V2 | _PAGE_NON_EX_V2 | \
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_PAGE_INT_PR_V2)
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static inline pteval_t
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get_pte_val_v2_changeable_mask(void)
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{
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return _PAGE_CHG_MASK_V2;
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}
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static inline pteval_t
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get_huge_pte_val_v2_changeable_mask(void)
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{
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return _HPAGE_CHG_MASK_V2;
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}
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static inline pteval_t
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get_pte_val_v2_reduceable_mask(void)
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{
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return _PROT_REDUCE_MASK_V2;
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}
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static inline pteval_t
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get_pte_val_v2_restricted_mask(void)
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{
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return _PROT_RESTRICT_MASK_V2;
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}
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static inline pteval_t
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covert_uni_pte_flags_to_pte_val_v2(const uni_pteval_t uni_flags)
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{
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pteval_t pte_flags = 0;
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if (uni_flags & UNI_PAGE_PRESENT)
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pte_flags |= (_PAGE_P_V2);
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if (uni_flags & UNI_PAGE_WRITE)
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pte_flags |= (_PAGE_W_V2);
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if (uni_flags & UNI_PAGE_PRIV)
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pte_flags |= (_PAGE_PV_V2);
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if (uni_flags & UNI_PAGE_VALID)
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pte_flags |= (_PAGE_VALID_V2);
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if (uni_flags & UNI_PAGE_PROTECT)
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pte_flags |= (_PAGE_INT_PR_V2);
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if (uni_flags & UNI_PAGE_HW_ACCESS)
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pte_flags |= (_PAGE_A_HW_V2);
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if (uni_flags & UNI_PAGE_DIRTY)
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pte_flags |= (_PAGE_D_V2);
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if (uni_flags & UNI_PAGE_HUGE)
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pte_flags |= (_PAGE_HUGE_V2);
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if (uni_flags & UNI_PAGE_GLOBAL)
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pte_flags |= (_PAGE_G_V2);
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if (uni_flags & UNI_PAGE_NWA)
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pte_flags |= (_PAGE_NWA_V2);
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if (uni_flags & UNI_PAGE_NON_EX)
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pte_flags |= (_PAGE_NON_EX_V2);
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if (uni_flags & UNI_PAGE_PROTNONE)
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pte_flags |= (_PAGE_PROTNONE_V2);
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if (uni_flags & UNI_PAGE_AVAIL)
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pte_flags |= (_PAGE_AVAIL_V2);
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if (uni_flags & UNI_PAGE_SW_ACCESS)
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pte_flags |= (_PAGE_A_SW_V2);
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if (uni_flags & UNI_PAGE_SPECIAL)
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pte_flags |= (_PAGE_SPECIAL_V2);
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if (uni_flags & UNI_PAGE_GFN)
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pte_flags |= (_PAGE_GFN_V2);
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if (uni_flags & UNI_PAGE_ACCESSED)
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pte_flags |= (_PAGE_A_V2);
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if (uni_flags & UNI_PAGE_PFN)
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pte_flags |= (_PAGE_PFN_V2);
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if (uni_flags & UNI_PAGE_MEM_TYPE)
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pte_flags |= (_PAGE_CD_MASK_V2 | _PAGE_PWT_V2);
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BUG_ON(pte_flags == 0);
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return pte_flags;
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}
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static inline pteval_t
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fill_pte_val_v2_flags(const uni_pteval_t uni_flags)
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{
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return covert_uni_pte_flags_to_pte_val_v2(uni_flags);
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}
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static inline pteval_t
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get_pte_val_v2_flags(pteval_t pte_val, const uni_pteval_t uni_flags)
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{
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return pte_val & covert_uni_pte_flags_to_pte_val_v2(uni_flags);
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}
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static inline bool
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test_pte_val_v2_flags(pteval_t pte_val, const uni_pteval_t uni_flags)
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{
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return get_pte_val_v2_flags(pte_val, uni_flags) != 0;
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}
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static inline pteval_t
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set_pte_val_v2_flags(pteval_t pte_val, const uni_pteval_t uni_flags)
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{
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return pte_val | covert_uni_pte_flags_to_pte_val_v2(uni_flags);
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}
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static inline pteval_t
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clear_pte_val_v2_flags(pteval_t pte_val, const uni_pteval_t uni_flags)
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{
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return pte_val & ~covert_uni_pte_flags_to_pte_val_v2(uni_flags);
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}
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static inline pteval_t
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convert_kernel_text_pte_val_v2_to_protected(pteval_t kernel_text_pte_val,
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e2k_addr_t cui)
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{
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return SET_PAGE_CUI_V2(kernel_text_pte_val, cui);
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}
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static inline pte_mem_type_t get_pte_val_v2_memory_type(pteval_t pte_val)
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{
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pteval_t caches_mask;
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caches_mask = pte_val & (_PAGE_CD_MASK_V2 | _PAGE_PWT_V2);
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/* convert old PTE style fields to new PTE memory type
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* see iset 8.2.4. 2)
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*
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* Use the same default values as what was used in older
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* kernels in pgprot_noncached()/pgprot_writecombine(). */
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if (caches_mask & _PAGE_PWT_V2)
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return EXT_CONFIG_MT;
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else if (caches_mask & _PAGE_CD_MASK_V2)
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return GEN_NON_CACHE_MT;
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else
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return GEN_CACHE_MT;
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}
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static inline pteval_t
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set_pte_val_v2_memory_type(pteval_t pte_val, pte_mem_type_t memory_type)
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{
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pteval_t caches_mask;
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/* convert new PTE style memory type to old PTE caches mask */
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/* see iset 8.2.4. 2) */
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if (memory_type == GEN_CACHE_MT || memory_type == EXT_CACHE_MT)
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caches_mask = _PAGE_CD_EN_V2 | _PAGE_PWT_DIS_V2;
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else if (memory_type == GEN_NON_CACHE_MT || memory_type == EXT_PREFETCH_MT)
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caches_mask = _PAGE_CD_DIS_V2 | _PAGE_PWT_DIS_V2;
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else if (memory_type == EXT_NON_PREFETCH_MT || memory_type == EXT_CONFIG_MT ||
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memory_type == GEN_NON_CACHE_ORDERED_MT)
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caches_mask = _PAGE_CD_DIS_V2 | _PAGE_PWT_EN_V2;
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else
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BUG();
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pte_val &= ~(_PAGE_CD_MASK_V2 | _PAGE_PWT_V2);
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pte_val |= caches_mask;
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return pte_val;
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}
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/*
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* Encode and de-code a swap entry
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*
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* Format of swap offset:
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* if ! (CONFIG_MAKE_ALL_PAGES_VALID):
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* bits 20-63: swap offset
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* else if (CONFIG_MAKE_ALL_PAGES_VALID)
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* bits 20-39: low part of swap offset
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* bit 40 : _PAGE_VALID (must be one)
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* bits 41-63: hi part of swap offset
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*/
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#ifndef CONFIG_MAKE_ALL_PAGES_VALID
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static inline unsigned long
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get_swap_offset_v2(swp_entry_t swap_entry)
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{
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return swap_entry.val >> __SWP_OFFSET_SHIFT;
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}
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static inline swp_entry_t
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create_swap_entry_v2(unsigned long type, unsigned long offset)
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{
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swp_entry_t swap_entry;
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swap_entry.val = type << __SWP_TYPE_SHIFT;
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swap_entry.val |= (offset << __SWP_OFFSET_SHIFT);
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return swap_entry;
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}
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static inline pte_t
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convert_swap_entry_to_pte_v2(swp_entry_t swap_entry)
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{
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pte_t pte;
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pte_val(pte) = swap_entry.val;
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return pte;
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}
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#else /* CONFIG_MAKE_ALL_PAGES_VALID */
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# define INSERT_VALID(off) (((off) & (_PAGE_VALID_V2 - 1UL)) | \
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(((off) & ~(_PAGE_VALID_V2 - 1UL)) << 1))
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# define REMOVE_VALID(off) (((off) & (_PAGE_VALID_V2 - 1UL)) | \
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(((off >> 1) & ~(_PAGE_VALID_V2 - 1UL))))
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static inline unsigned long
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insert_valid_bit_to_offset(unsigned long offset)
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{
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return (offset & (_PAGE_VALID_V2 - 1UL)) |
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((offset & ~(_PAGE_VALID_V2 - 1UL)) << 1);
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}
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static inline unsigned long
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remove_valid_bit_from_entry(swp_entry_t swap_entry)
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{
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unsigned long entry = swap_entry.val;
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return (entry & (_PAGE_VALID_V2 - 1UL)) |
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((entry >> 1) & ~(_PAGE_VALID_V2 - 1UL));
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}
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# define __swp_offset_v2(entry) (REMOVE_VALID((entry).val) >> \
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__SWP_OFFSET_SHIFT)
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# define __swp_entry_v2(type, off) ((swp_entry_t) { \
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(((type) << __SWP_TYPE_SHIFT) | \
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INSERT_VALID(((off) << __SWP_OFFSET_SHIFT))) })
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# define __swp_entry_to_pte_v2(entry) ((pte_t) { (entry).val | _PAGE_VALID })
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|
static inline unsigned long
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|
get_swap_offset_v2(swp_entry_t swap_entry)
|
|
{
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|
unsigned long entry = remove_valid_bit_from_entry(swap_entry);
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|
|
|
return entry >> __SWP_OFFSET_SHIFT;
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|
}
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|
static inline swp_entry_t
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|
create_swap_entry_v2(unsigned long type, unsigned long offset)
|
|
{
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|
swp_entry_t swap_entry;
|
|
|
|
swap_entry.val = type << __SWP_TYPE_SHIFT;
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|
swap_entry.val |=
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|
insert_valid_bit_to_offset(offset << __SWP_OFFSET_SHIFT);
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|
|
|
return swap_entry;
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|
}
|
|
static inline pte_t
|
|
convert_swap_entry_to_pte_v2(swp_entry_t swap_entry)
|
|
{
|
|
pte_t pte;
|
|
|
|
pte_val(pte) = swap_entry.val | _PAGE_VALID_V2;
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|
return pte;
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|
}
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|
#endif /* ! CONFIG_MAKE_ALL_PAGES_VALID */
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|
|
|
#endif /* ! __ASSEMBLY__ */
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|
|
|
#endif /* ! _ASM_E2K_PGTABLE_V2_H */
|