429 lines
14 KiB
C
429 lines
14 KiB
C
#ifndef _E2K_TLB_REGS_TYPES_H_
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#define _E2K_TLB_REGS_TYPES_H_
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#include <linux/types.h>
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#include <asm/machdep.h>
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/* now DTLB entry format is different on iset V6 vs V2-V5 */
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#if CONFIG_CPU_ISET >= 6
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# ifdef CONFIG_MMU_PT_V6
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# define MMU_IS_DTLB_V6() true
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# else /* ! CONFIG_MMU_PT_V6 */
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# define MMU_IS_DTLB_V6() false
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# endif /* CONFIG_MMU_PT_V6 */
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#elif CONFIG_CPU_ISET >= 2
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# define MMU_IS_DTLB_V6() false
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#elif CONFIG_CPU_ISET == 0
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# ifdef E2K_P2V
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# define MMU_IS_DTLB_V6() \
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(boot_machine.mmu_pt_v6)
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# else /* ! E2K_P2V */
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# define MMU_IS_DTLB_V6() \
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(machine.mmu_pt_v6)
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# endif /* E2K_P2V */
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#else /* CONFIG_CPU_ISET undefined or negative */
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# warning "Undefined CPU ISET VERSION #, MMU pt_v6 mode is defined dinamicaly"
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# ifdef E2K_P2V
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# define MMU_IS_DTLB_V6() \
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(boot_machine.mmu_pt_v6)
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# else /* ! E2K_P2V */
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# define MMU_IS_DTLB_V6() \
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(machine.mmu_pt_v6)
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# endif /* E2K_P2V */
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#endif /* CONFIG_CPU_ISET 0-6 */
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/*
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* TLB (DTLB & ITLB) structure
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*/
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#define NATIVE_TLB_LINES_BITS_NUM (machine.tlb_lines_bits_num)
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#define BOOT_NATIVE_TLB_LINES_BITS_NUM (boot_machine.tlb_lines_bits_num)
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#define NATIVE_TLB_LINES_NUM (1 << NATIVE_TLB_LINES_BITS_NUM)
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#define BOOT_NATIVE_TLB_LINES_NUM (1 << BOOT_NATIVE_TLB_LINES_BITS_NUM)
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#define NATIVE_MAX_TLB_LINES_NUM (1 << ES2_TLB_LINES_BITS_NUM)
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#define NATIVE_TLB_SETS_NUM 4
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#define BOOT_NATIVE_TLB_SETS_NUM NATIVE_TLB_SETS_NUM
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#define NATIVE_TLB_LARGE_PAGE_SET_NO 3 /* large page entries */
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/* occupied this set in each */
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/* line */
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/*
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* DTLB/ITLB registers operations
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*/
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/* DTLB/ITLB registers access operations address */
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#ifndef __ASSEMBLY__
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typedef e2k_addr_t tlb_addr_t;
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typedef tlb_addr_t dtlb_addr_t;
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typedef tlb_addr_t itlb_addr_t;
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#endif /* ! __ASSEMBLY__ */
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#define tlb_addr_val(tlb_addr) (tlb_addr)
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#define dtlb_addr_val(dtlb_addr) tlb_addr_val(dtlb_addr)
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#define itlb_addr_val(itlb_addr) tlb_addr_val(itlb_addr)
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#define __tlb_addr(tlb_addr_val) (tlb_addr_val)
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#define __dtlb_addr(dtlb_addr_val) __tlb_addr(dtlb_addr_val)
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#define __itlb_addr(dtlb_addr_val) __tlb_addr(itlb_addr_val)
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/* Virtual page address translation to TLB line & set */
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#define _TLB_ADDR_LINE_NUM_SHIFT 12 /* [19:12] */
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#define E2K_PG_4K_TO_TLB_LINE_NUM(virt_addr) \
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(((virt_addr) & (machine.tlb_addr_line_num)) >> \
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_TLB_ADDR_LINE_NUM_SHIFT)
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#define BOOT_E2K_PG_4K_TO_TLB_LINE_NUM(virt_addr) \
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(((virt_addr) & (boot_machine.tlb_addr_line_num)) >> \
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_TLB_ADDR_LINE_NUM_SHIFT)
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#define E2K_PG_LARGE_TO_TLB_LINE_NUM(virt_addr) \
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(((virt_addr) & (machine.tlb_addr_line_num2)) >> \
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(machine.tlb_addr_line_num_shift2))
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#define BOOT_E2K_PG_LARGE_TO_TLB_LINE_NUM(virt_addr) \
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(((virt_addr) & (boot_machine.tlb_addr_line_num2)) >> \
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(boot_machine.tlb_addr_line_num_shift2))
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#define VADDR_TO_TLB_LINE_NUM(virt_addr, large_page) \
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((large_page) ? E2K_PG_LARGE_TO_TLB_LINE_NUM(virt_addr) : \
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E2K_PG_4K_TO_TLB_LINE_NUM(virt_addr))
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#define BOOT_VADDR_TO_TLB_LINE_NUM(virt_addr, large_page) \
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((large_page) ? BOOT_E2K_PG_LARGE_TO_TLB_LINE_NUM(virt_addr) : \
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BOOT_E2K_PG_4K_TO_TLB_LINE_NUM(virt_addr))
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#define _TLB_ADDR_TYPE 0x0000000000000007 /* type of operation */
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#define _TLB_ADDR_TAG_ACCESS 0x0000000000000000 /* tag access oper. */
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/* type */
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#define _TLB_ADDR_ENTRY_ACCESS 0x0000000000000001 /* entry access oper. */
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/* type */
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#define tlb_addr_set_type(tlb_addr, type) \
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(__tlb_addr((tlb_addr_val(tlb_addr) & ~_TLB_ADDR_TYPE) | \
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((type) & _TLB_ADDR_TYPE)))
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#define tlb_addr_set_tag_access(tlb_addr) \
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tlb_addr_set_type(tlb_addr, _TLB_ADDR_TAG_ACCESS)
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#define tlb_addr_set_entry_access(tlb_addr) \
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tlb_addr_set_type(tlb_addr, _TLB_ADDR_ENTRY_ACCESS)
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#define tlb_addr_tag_access _TLB_ADDR_TAG_ACCESS
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#define tlb_addr_entry_access _TLB_ADDR_ENTRY_ACCESS
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#define tlb_addr_set_vaddr_line_num(tlb_addr, virt_addr, large_page) \
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(__tlb_addr((tlb_addr_val(tlb_addr) & \
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~((machine.tlb_addr_line_num) | \
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(machine.tlb_addr_line_num2))) | \
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(VADDR_TO_TLB_LINE_NUM(virt_addr, large_page) << \
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_TLB_ADDR_LINE_NUM_SHIFT) | \
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(VADDR_TO_TLB_LINE_NUM(virt_addr, large_page) << \
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(machine.tlb_addr_line_num_shift2))))
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#define boot_tlb_addr_set_vaddr_line_num(tlb_addr, virt_addr, large_page) \
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(__tlb_addr((tlb_addr_val(tlb_addr) & \
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~((boot_machine.tlb_addr_line_num) | \
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(boot_machine.tlb_addr_line_num2))) | \
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(BOOT_VADDR_TO_TLB_LINE_NUM(virt_addr, large_page) << \
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_TLB_ADDR_LINE_NUM_SHIFT) | \
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(BOOT_VADDR_TO_TLB_LINE_NUM(virt_addr, large_page) << \
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(boot_machine.tlb_addr_line_num_shift2))))
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#define tlb_addr_set_set_num(tlb_addr, set_num) \
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(__tlb_addr((tlb_addr_val(tlb_addr) & \
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~(machine.tlb_addr_set_num)) | \
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(((set_num) << (machine.tlb_addr_set_num_shift)) & \
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(machine.tlb_addr_set_num))))
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#define boot_tlb_addr_set_set_num(tlb_addr, set_num) \
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(__tlb_addr((tlb_addr_val(tlb_addr) & \
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~(boot_machine.tlb_addr_set_num)) | \
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(((set_num) << (boot_machine.tlb_addr_set_num_shift)) & \
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(boot_machine.tlb_addr_set_num))))
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/* DTLB/ITLB tag structure */
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#ifndef __ASSEMBLY__
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typedef e2k_addr_t tlb_tag_t;
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typedef tlb_tag_t dtlb_tag_t;
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typedef tlb_tag_t itlb_tag_t;
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#endif /* ! __ASSEMBLY__ */
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#define tlb_tag_val(tlb_tag) (tlb_tag)
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#define dtlb_tag_val(dtlb_tag) tlb_tag_val(dtlb_tag)
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#define itlb_tag_val(itlb_tag) tlb_tag_val(itlb_tag)
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#define __tlb_tag(tlb_tag_val) (tlb_tag_val)
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#define __dtlb_tag(dtlb_tag_val) __tlb_tag(dtlb_tag_val)
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#define __itlb_tag(dtlb_tag_val) __tlb_tag(itlb_tag_val)
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#define _TLB_TAG_VA_TAG_SHIFT 7 /* [35: 7] */
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#define _TLB_TAG_CONTEXT_SHIFT 36 /* [47:36] */
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#define _TLB_TAG_VA_TAG 0x0000000fffffff80 /* tag of virtual */
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/* address [47:19] */
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/* [18:12] - line # */
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#define _TLB_TAG_CONTEXT 0x0000fff000000000 /* context # */
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#define _TLB_TAG_ROOT 0x0001000000000000 /* should be 0 */
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#define _TLB_TAG_PHYS 0x0002000000000000 /* should be 0 */
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#define _TLB_TAG_G 0x0004000000000000 /* global page */
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#define _TLB_TAG_USED 0x0008000000000000 /* used flag */
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#define _TLB_TAG_VALID 0x0010000000000000 /* valid bit */
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#define TLB_VADDR_TO_VA_TAG(virt_addr) \
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((((virt_addr) >> PAGE_SHIFT) & _TLB_TAG_VA_TAG) << \
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_TLB_TAG_VA_TAG_SHIFT)
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#define _TLB_TAG_KERNEL_IMAGE (_TLB_TAG_VALID | _TLB_TAG_USED | \
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((long)E2K_KERNEL_CONTEXT << _TLB_TAG_CONTEXT_SHIFT))
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#define _TLB_KERNEL_SWITCHING_IMAGE _TLB_TAG_KERNEL_IMAGE
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#define _TLB_KERNEL_US_STACK (_TLB_TAG_VALID | _TLB_TAG_USED | \
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((long)E2K_KERNEL_CONTEXT << _TLB_TAG_CONTEXT_SHIFT))
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#define TLB_KERNEL_SWITCHING_TEXT __tlb_tag(_TLB_KERNEL_SWITCHING_IMAGE)
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#define TLB_KERNEL_SWITCHING_DATA __tlb_tag(_TLB_KERNEL_SWITCHING_IMAGE)
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#define TLB_KERNEL_SWITCHING_US_STACK __tlb_tag(_TLB_KERNEL_US_STACK)
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#define tlb_tag_get_va_tag(tlb_tag) \
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(tlb_tag_val(tlb_tag) & _TLB_TAG_VA_TAG)
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#define tlb_tag_set_va_tag(tlb_tag, va_page) \
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(__tlb_tag((tlb_tag_val(tlb_tag) & ~_TLB_TAG_VA_TAG) | \
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((va_page) & _TLB_TAG_VA_TAG)))
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#define tlb_tag_set_vaddr_va_tag(tlb_tag, virt_addr) \
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(__tlb_tag((tlb_tag_val(tlb_tag) & ~_TLB_TAG_VA_TAG) | \
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TLB_VADDR_TO_VA_TAG(virt_addr)))
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#define tlb_tag_get_context(tlb_tag) \
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(tlb_tag_val(tlb_tag) & _TLB_TAG_CONTEXT)
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#define tlb_tag_set_context(tlb_tag, context) \
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(__tlb_tag((tlb_tag_val(tlb_tag) & ~_TLB_TAG_CONTEXT) | \
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((context) << _TLB_TAG_CONTEXT_SHIFT) & _TLB_TAG_CONTEXT))
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/*
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* This takes a virtual page address and protection bits to make
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* TLB tag: tlb_tag_t
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*/
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#define mk_tlb_tag_vaddr(virt_addr, tag_pgprot) \
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(__tlb_tag(TLB_VADDR_TO_VA_TAG(virt_addr) | tlb_tag_val(tag_pgprot)))
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/* DTLB/ITLB entry structure is the same as PTE structure of page tables */
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/*
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* TLB address probe operations , TLB Entry_probe operations
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*/
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/* Virtual address for TLB address probe & Entry probe operations */
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#ifndef __ASSEMBLY__
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typedef e2k_addr_t probe_addr_t;
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#define probe_addr_val(probe_addr) (probe_addr)
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#define __probe_addr(probe_addr_val) (probe_addr_val)
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#endif /* __ASSEMBLY__ */
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#define _PROBE_ADDR_VA 0x0000ffffffffffff /* virtual address */
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/* [47: 0] */
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/* Result of TLB Entry probe operation */
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#ifndef __ASSEMBLY__
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typedef unsigned long probe_entry_t;
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#define probe_entry_val(probe_entry) (probe_entry)
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#define __probe_entry(probe_entry_val) (probe_entry_val)
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#include <asm/pgtable_types.h>
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#include <asm/mmu-regs-types-v2.h>
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#include <asm/mmu-regs-types-v6.h>
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#if DTLB_ENTRY_PH_BOUND_V2 == DTLB_ENTRY_PH_BOUND_V6
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# define DTLB_ENTRY_PH_BOUND DTLB_ENTRY_PH_BOUND_V6
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#else
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# error "Page table PH_BOUND bit is different for V2 vs V6"
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#endif
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#if DTLB_ENTRY_ILLEGAL_PAGE_V2 == DTLB_ENTRY_ILLEGAL_PAGE_V6
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# define DTLB_ENTRY_ILLEGAL_PAGE DTLB_ENTRY_ILLEGAL_PAGE_V6
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#else
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# error "Page table ILLEGAL_PAGE bit is different for V2 vs V6"
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#endif
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#if DTLB_ENTRY_PAGE_MISS_V2 == DTLB_ENTRY_PAGE_MISS_V6
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# define DTLB_ENTRY_PAGE_MISS DTLB_ENTRY_PAGE_MISS_V6
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#else
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# error "Page table PAGE_MISS bit is different for V2 vs V6"
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#endif
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static inline probe_entry_t
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mmu_fill_dtlb_val_flags(const uni_dtlb_t uni_flags, bool mmu_pt_v6)
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{
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if (mmu_pt_v6)
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return fill_dtlb_val_v6_flags(uni_flags);
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else
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return fill_dtlb_val_v2_flags(uni_flags);
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}
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static inline probe_entry_t
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mmu_get_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags,
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bool mmu_pt_v6)
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{
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if (mmu_pt_v6)
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return get_dtlb_val_v6_flags(dtlb_val, uni_flags);
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else
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return get_dtlb_val_v2_flags(dtlb_val, uni_flags);
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}
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static inline bool
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mmu_test_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags,
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bool mmu_pt_v6)
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{
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return mmu_get_dtlb_val_flags(dtlb_val, uni_flags, mmu_pt_v6) != 0;
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}
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static inline probe_entry_t
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mmu_set_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags,
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bool mmu_pt_v6)
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{
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if (mmu_pt_v6)
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return set_dtlb_val_v6_flags(dtlb_val, uni_flags);
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else
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return set_dtlb_val_v2_flags(dtlb_val, uni_flags);
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}
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static inline probe_entry_t
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mmu_clear_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags,
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bool mmu_pt_v6)
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{
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if (mmu_pt_v6)
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return clear_dtlb_val_v6_flags(dtlb_val, uni_flags);
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else
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return clear_dtlb_val_v2_flags(dtlb_val, uni_flags);
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}
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static inline probe_entry_t
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fill_dtlb_val_flags(const uni_dtlb_t uni_flags)
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{
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return mmu_fill_dtlb_val_flags(uni_flags, MMU_IS_DTLB_V6());
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}
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static inline probe_entry_t
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get_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags)
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{
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return mmu_get_dtlb_val_flags(dtlb_val, uni_flags, MMU_IS_DTLB_V6());
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}
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static inline bool
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test_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags)
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{
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return mmu_test_dtlb_val_flags(dtlb_val, uni_flags, MMU_IS_DTLB_V6());
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}
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static inline probe_entry_t
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set_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags)
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{
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return mmu_set_dtlb_val_flags(dtlb_val, uni_flags, MMU_IS_DTLB_V6());
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}
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static inline probe_entry_t
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clear_dtlb_val_flags(probe_entry_t dtlb_val, const uni_dtlb_t uni_flags)
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{
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return mmu_clear_dtlb_val_flags(dtlb_val, uni_flags, MMU_IS_DTLB_V6());
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}
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#define DTLB_ENTRY_INIT(uni_flags) fill_dtlb_val_flags(uni_flags)
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#define DTLB_ENTRY_GET(dtlb_val, uni_flags) \
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get_dtlb_val_flags(dtlb_val, uni_flags)
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#define DTLB_ENTRY_TEST(dtlb_val, uni_flags) \
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test_dtlb_val_flags(dtlb_val, uni_flags)
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#define DTLB_ENTRY_SET(dtlb_val, uni_flags) \
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set_dtlb_val_flags(dtlb_val, uni_flags)
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#define DTLB_ENTRY_CLEAR(dtlb_val, uni_flags) \
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clear_dtlb_val_flags(dtlb_val, uni_flags)
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#define DTLB_ENTRY_ERROR_MASK DTLB_ENTRY_INIT(UNI_DTLB_ERROR_MASK)
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#define DTLB_ENTRY_MISS_LEVEL_MASK \
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DTLB_ENTRY_INIT(UNI_DTLB_MISS_LEVEL)
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#define DTLB_ENTRY_PROBE_SUCCESSFUL \
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DTLB_ENTRY_INIT(UNI_DTLB_SUCCESSFUL)
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#define DTLB_ENTRY_RES_BITS DTLB_ENTRY_INIT(UNI_DTLB_RES_BITS)
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#define DTLB_ENTRY_WR DTLB_ENTRY_INIT(UNI_PAGE_WRITE)
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#define DTLB_ENTRY_PV DTLB_ENTRY_INIT(UNI_PAGE_PRIV)
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#define DTLB_ENTRY_VVA DTLB_ENTRY_INIT(UNI_PAGE_VALID)
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#define DTLB_EP_RES DTLB_ENTRY_INIT(UNI_DTLB_EP_RES)
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#define DTLB_EP_FAULT_RES (~DTLB_EP_RES)
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#define DTLB_ENTRY_TEST_WRITEABLE(dtlb_val) \
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DTLB_ENTRY_TEST(dtlb_val, UNI_PAGE_WRITE)
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#define DTLB_ENTRY_TEST_VVA(dtlb_val) \
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DTLB_ENTRY_TEST(dtlb_val, UNI_PAGE_VALID)
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#define DTLB_ENTRY_TEST_SUCCESSFUL(dtlb_val) \
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((MMU_IS_DTLB_V6()) ? \
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DTLB_ENTRY_TEST(dtlb_val, UNI_DTLB_SUCCESSFUL) \
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: \
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!DTLB_ENTRY_TEST(dtlb_val, UNI_DTLB_SUCCESSFUL))
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static inline probe_entry_t
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mmu_phys_addr_to_dtlb_pha(e2k_addr_t phys_addr, bool mmu_pt_v6)
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{
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if (mmu_pt_v6)
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return PA_TO_DTLB_ENTRY_PHA_V6(phys_addr);
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else
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return PA_TO_DTLB_ENTRY_PHA_V2(phys_addr);
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}
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static inline e2k_addr_t
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mmu_dtlb_pha_to_phys_addr(probe_entry_t dtlb_val, bool mmu_pt_v6)
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{
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if (mmu_pt_v6)
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return DTLB_ENTRY_PHA_TO_PA_V6(dtlb_val);
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else
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return DTLB_ENTRY_PHA_TO_PA_V2(dtlb_val);
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}
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static inline probe_entry_t
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phys_addr_to_dtlb_pha(e2k_addr_t phys_addr)
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|
{
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|
return mmu_phys_addr_to_dtlb_pha(phys_addr, MMU_IS_DTLB_V6());
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|
}
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|
static inline e2k_addr_t
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|
dtlb_pha_to_phys_addr(probe_entry_t dtlb_val)
|
|
{
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|
return mmu_dtlb_pha_to_phys_addr(dtlb_val, MMU_IS_DTLB_V6());
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|
}
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#define PA_TO_DTLB_ENTRY_PHA(phys_addr) phys_addr_to_dtlb_pha(phys_addr)
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|
#define DTLB_ENTRY_PHA_TO_PA(dtlb_val) dtlb_pha_to_phys_addr(dtlb_val)
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|
|
|
/* physical memory bound (x86) [63] */
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|
#define PH_BOUND_EP_RES DTLB_ENTRY_PH_BOUND
|
|
/* illegal page [62] */
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|
#define ILLEGAL_PAGE_EP_RES DTLB_ENTRY_ILLEGAL_PAGE
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|
/* page miss [61] */
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|
#define PAGE_MISS_EP_RES DTLB_ENTRY_PAGE_MISS
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|
/* miss level [60:59] */
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|
#define MISS_LEVEL_EP_RES DTLB_ENTRY_MISS_LEVEL_MASK
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|
/* reserved bits [57] */
|
|
#define RES_BITS_EP_RES DTLB_ENTRY_RES_BITS
|
|
|
|
/*
|
|
* DTLB address probe result format
|
|
*/
|
|
/* Physical address of successfull DTLB address probe [39: 0]/[47:0] */
|
|
#define PH_ADDR_AP_RES DTLB_ENTRY_INIT(UNI_DTLB_PH_ADDR_AP_RES)
|
|
/* AP disable result [62] */
|
|
#define DISABLE_AP_RES ILLEGAL_PAGE_EP_RES
|
|
/* page miss [61] */
|
|
#define PAGE_MISS_AP_RES PAGE_MISS_EP_RES
|
|
/* illegal page [58] */
|
|
#define ILLEGAL_PAGE_AP_RES ILLEGAL_PAGE_EP_RES
|
|
|
|
#define PH_ADDR_IS_PRESENT(ap_res) (((ap_res) & ~PH_ADDR_AP_RES) == 0)
|
|
#define PH_ADDR_IS_MISS(ap_res) ((ap_res) & PAGE_MISS_AP_RES)
|
|
#define PH_ADDR_IS_VALID(ap_res) ((PH_ADDR_IS_PRESENT(ap_res) || \
|
|
PH_ADDR_IS_MISS(ap_res)))
|
|
#define PH_ADDR_IS_INVALID(ap_res) ((ap_res) & ILLEGAL_PAGE_AP_RES)
|
|
#define GET_PROBE_PH_ADDR(ap_res) ((ap_res) & PH_ADDR_AP_RES)\
|
|
|
|
#if !defined(CONFIG_PARAVIRT_GUEST) && !defined(CONFIG_KVM_GUEST_KERNEL)
|
|
/* it is native kernel without any virtualization */
|
|
/* or it is native host kernel with virtualization support */
|
|
#elif defined(CONFIG_KVM_GUEST_KERNEL)
|
|
/* it is pure guest kernel (not paravirtualized based on pv_ops) */
|
|
#include <asm/kvm/guest/tlb_regs_types.h>
|
|
#elif defined(CONFIG_PARAVIRT_GUEST)
|
|
/* it is paravirtualized host and guest kernel */
|
|
#include <asm/paravirt/mmu.h>
|
|
#else
|
|
#error "Unknown virtualization type"
|
|
#endif /* ! CONFIG_PARAVIRT_GUEST && ! CONFIG_KVM_GUEST_KERNEL */
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
#endif
|