43 lines
1.5 KiB
C
43 lines
1.5 KiB
C
#undef TRACE_SYSTEM
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#define TRACE_SYSTEM e2k
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#if !defined(_TRACE_E2K_MMU_DTLB_V6_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_E2K_MMU_DTLB_V6_H
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#include <asm/mmu-regs-types-v6.h>
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#define E2K_TRACE_PRINT_DTLB_ENTRY_V6(entry) \
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((entry & DTLB_ENTRY_ERROR_MASK_V6) ? \
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__print_flags(entry & DTLB_ENTRY_ERROR_MASK_V6, "|", \
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{ DTLB_ENTRY_PH_BOUND_V6, "ph_bound" }, \
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{ DTLB_ENTRY_PAGE_MISS_V6, "page_miss" }, \
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{ DTLB_ENTRY_PROBE_SUCCESSFUL_V6, \
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"DTLB probe successful" }, \
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{ DTLB_ENTRY_RES_BITS_V6, "res_bits" } \
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) : \
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({ __print_flags(entry & ~DTLB_ENTRY_PHA_V6, "|", \
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{ DTLB_ENTRY_WR_exc_V6, "writable" }, \
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{ DTLB_ENTRY_PV_or_U_S_V6, "Priv/U_S" }, \
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{ DTLB_ENTRY_D_V6, "dirty" }, \
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{ DTLB_ENTRY_G_V6, "global" }, \
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{ DTLB_ENTRY_NWA_V6, "NWA" }, \
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{ DTLB_ENTRY_VVA_V6, "valid" }, \
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{ DTLB_ENTRY_NON_EX_V6, "non_ex" }, \
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{ DTLB_ENTRY_INT_PR_V6, "int_pr" }, \
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{ DTLB_ENTRY_INTL_RD_V6, "intl_rd" }, \
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{ DTLB_ENTRY_INTL_WR_V6, "intl_wr" }, \
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{ DTLB_ENTRY_WR_int_V6, "WR_int" } \
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); \
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__print_symbolic(DTLB_ENTRY_MT_exc_GET_VAL(entry), \
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{ GEN_CACHE_MT, "General Cacheable" }, \
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{ GEN_NON_CACHE_MT, "General nonCacheable" }, \
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{ EXT_PREFETCH_MT, "External Prefetchable" }, \
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{ EXT_NON_PREFETCH_MT, "External nonPrefetchable" }, \
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{ EXT_CONFIG_MT, "External Configuration" }, \
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{ 2, "Reserved-2" }, \
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{ 3, "Reserved-3" }, \
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{ 5, "Reserved-5" }); \
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}))
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#endif /* _TRACE_E2K_MMU_DTLB_V6_H */
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