166 lines
4.5 KiB
C
166 lines
4.5 KiB
C
/*
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*
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* Copyright (C) 2020 MCST
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*
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* Defenition of traps handling routines.
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*/
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#ifndef _E2K_TRAP_TABLE_ASM_H
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#define _E2K_TRAP_TABLE_ASM_H
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#ifdef __ASSEMBLY__
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#include <asm/thread_info.h>
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#include <asm/e2k_api.h>
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#include <asm/cpu_regs_types.h>
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#include <asm/glob_regs.h>
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#include <asm/mmu_types.h>
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#include <generated/asm-offsets.h>
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#if defined CONFIG_SMP
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# define SMP_ONLY(...) __VA_ARGS__
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#else
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# define SMP_ONLY(...)
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#endif
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/*
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* Important: the first memory access in kernel is store, not load.
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* This is needed to flush SLT before trying to load anything.
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*/
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#define SWITCH_HW_STACKS_FROM_USER(...) \
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{ \
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/* Wait for FPU exceptions before switching stacks */ \
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wait all_e = 1; \
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rrd %osr0, GVCPUSTATE; \
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stgdq,sm %qg16, 0, TSK_TI_G_VCPU_STATE; \
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} \
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{ \
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rrd %psp.hi, GCURTASK; \
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stgdq,sm %qg18, 0, TSK_TI_G_MY_CPU_OFFSET; \
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cmpesb,1 0, 0, %pred0; \
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/* Do restore %rpr (it's clobbered by "crp" below) */ \
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cmpesb,3 0, 0, %pred1; \
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} \
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{ \
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/* 'crp' instruction also clears %rpr besides the generations \
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* table, so make sure we preserve %rpr value. */ \
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rrd %rpr.lo, GCPUOFFSET; \
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} \
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{ \
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rrd %rpr.hi, GCPUID; \
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/* Disable load/store generations */ \
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crp; \
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} \
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SWITCH_HW_STACKS(TSK_TI_, ##__VA_ARGS__)
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/*
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* This assumes that GVCPUSTATE points to current_thread_info()
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* and %psp.hi has been read into GCURTASK
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*
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* %pred0 - set to "true" if PSP/PCSP should be switched.
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* %pred1 - set to "true" if RPR should be restored.
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*
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* Does the following:
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*
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* 1) Saves global registers either to 'thread_info.tmp_k_gregs' or to
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* 'thread_info.k_gregs'. The first area is used for trap handler since
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* we do not know whether it is from user or from kernel and whether
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* global registers have been saved already to 'thread_info.k_gregs'.
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*
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* 2) Saves stack registers to 'thread_info.tmp_user_stacks'. If this is
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* not a kernel trap then these values will be copied to pt_regs later.
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*
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* 3) Updates global and stack registers with kernel values (if not in
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* kernel trap where it's been done already)
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*/
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#define SWITCH_HW_STACKS(PREFIX, ...) \
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{ \
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rwd GCPUOFFSET, %rpr.lo ? %pred1; \
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ldd,2 GVCPUSTATE, TI_K_PSP_LO, GCPUOFFSET; \
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__VA_ARGS__ \
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} \
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{ \
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rwd GCPUID, %rpr.hi ? %pred1; \
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ldd,2 GVCPUSTATE, TI_K_PCSP_LO, GCPUID; \
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} \
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{ \
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rrd %psp.lo, GCURTASK ? %pred0; \
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stgdd,2 GCURTASK, 0, TSK_TI_TMP_U_PSP_HI ? %pred0; \
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SMP_ONLY(ldgdw,5 0, TSK_TI_CPU_DELTA, GCPUID ? ~ %pred0;) \
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} \
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{ \
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rrd %pcsp.hi, GCURTASK ? %pred0; \
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stgdd,2 GCURTASK, 0, TSK_TI_TMP_U_PSP_LO ? %pred0; \
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/* Nothing to do if this is kernel (%pred0 == false) */ \
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subd,1 GVCPUSTATE, TSK_TI, GCURTASK ? ~ %pred0; \
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ibranch trap_handler_switched_stacks ? ~ %pred0; \
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} \
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{ \
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rrd %pcsp.lo, GCURTASK; \
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stgdd,2 GCURTASK, 0, TSK_TI_TMP_U_PCSP_HI; \
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} \
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{ \
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rwd GCPUOFFSET, %psp.lo; \
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stgdd,2 GCURTASK, 0, TSK_TI_TMP_U_PCSP_LO; \
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ldrd,5 GVCPUSTATE, TAGGED_MEM_LOAD_REC_OPC | PREFIX##G_MY_CPU_OFFSET_EXT, GCPUOFFSET; \
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} \
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{ \
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rwd GCPUID, %pcsp.lo; \
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ldd,2 GVCPUSTATE, TI_K_PSP_HI, GCURTASK; \
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ldrd,5 GVCPUSTATE, TAGGED_MEM_LOAD_REC_OPC | PREFIX##G_VCPU_STATE_EXT, GCPUID; \
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} \
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{ \
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rwd GCURTASK, %psp.hi; \
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ldd,2 GVCPUSTATE, TI_K_PCSP_HI, GCURTASK; \
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} \
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{ \
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rwd GCURTASK, %pcsp.hi; \
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} \
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{ \
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rrd %pshtp, GCURTASK; \
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} \
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{ \
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ldrd,3 GVCPUSTATE, TAGGED_MEM_LOAD_REC_OPC | PREFIX##G_CPU_ID, GCPUOFFSET; \
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strd,5 GCPUOFFSET, GVCPUSTATE, TAGGED_MEM_STORE_REC_OPC | PREFIX##G_CPU_ID; \
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} \
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{ \
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ldrd,3 GVCPUSTATE, TAGGED_MEM_LOAD_REC_OPC | PREFIX##G_TASK, GCPUID; \
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strd,5 GCPUID, GVCPUSTATE, TAGGED_MEM_STORE_REC_OPC | PREFIX##G_TASK; \
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} \
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{ \
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nop 2; /* ld -> use */ \
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rrd %pcshtp, GCURTASK; \
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stgdd,2 GCURTASK, 0, TSK_TI_TMP_U_PSHTP; \
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} \
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{ \
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subd,1 GVCPUSTATE, TSK_TI, GCURTASK; \
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stgdd,2 GCURTASK, 0, TSK_TI_TMP_U_PCSHTP; \
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strd,5 GCPUOFFSET, GVCPUSTATE, TAGGED_MEM_STORE_REC_OPC | PREFIX##G_MY_CPU_OFFSET_EXT; \
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} \
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{ \
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SMP_ONLY(ldw,3 GVCPUSTATE, TSK_TI_CPU_DELTA, GCPUID;) \
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strd,5 GCPUID, GVCPUSTATE, TAGGED_MEM_STORE_REC_OPC | PREFIX##G_VCPU_STATE_EXT; \
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}
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.macro HANDLER_TRAMPOLINE ctprN, scallN, fn, wbsL
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/* Force load OSGD->GD. Alternative is to use non-0 CUI for kernel */
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{
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sdisp \ctprN, \scallN
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}
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/* CPU_HWBUG_VIRT_PSIZE_INTERCEPTION */
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{ nop } { nop } { nop } { nop }
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call \ctprN, wbs=\wbsL
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disp \ctprN, \fn
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SWITCH_HW_STACKS_FROM_USER()
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SMP_ONLY(shld,1 GCPUID, 3, GCPUOFFSET)
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{
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SMP_ONLY(ldd,2 [ __per_cpu_offset + GCPUOFFSET ], GCPUOFFSET)
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ct \ctprN
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}
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.endm /* HANDLER_TRAMPOLINE */
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#endif /* __ASSEMBLY__ */
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#endif /* _E2K_TRAP_TABLE_ASM_H */
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