2009-07-29 22:21:49 +02:00
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/*
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* wm_hubs.c -- WM8993/4 common code
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*
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2012-05-23 13:39:07 +02:00
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* Copyright 2009-12 Wolfson Microelectronics plc
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2009-07-29 22:21:49 +02:00
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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2011-08-01 06:02:17 +02:00
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#include <linux/mfd/wm8994/registers.h>
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2009-07-29 22:21:49 +02:00
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "wm8993.h"
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#include "wm_hubs.h"
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const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
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EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
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static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
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static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
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static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
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static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
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static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
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static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
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static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
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static const unsigned int spkboost_tlv[] = {
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2011-11-20 15:15:31 +01:00
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TLV_DB_RANGE_HEAD(2),
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2009-07-29 22:21:49 +02:00
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0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
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7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
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};
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static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
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static const char *speaker_ref_text[] = {
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"SPKVDD/2",
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"VMID",
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};
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2014-02-18 10:47:17 +01:00
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static SOC_ENUM_SINGLE_DECL(speaker_ref,
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WM8993_SPEAKER_MIXER, 8, speaker_ref_text);
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2009-07-29 22:21:49 +02:00
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static const char *speaker_mode_text[] = {
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"Class D",
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"Class AB",
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};
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2014-02-18 10:47:17 +01:00
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static SOC_ENUM_SINGLE_DECL(speaker_mode,
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WM8993_SPKMIXR_ATTENUATION, 8, speaker_mode_text);
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2009-07-29 22:21:49 +02:00
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2010-03-29 18:18:41 +02:00
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static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
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2009-07-29 22:21:49 +02:00
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{
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2011-07-12 08:25:03 +02:00
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struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
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2009-07-29 22:21:49 +02:00
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unsigned int reg;
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int count = 0;
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2011-07-15 10:33:26 +02:00
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int timeout;
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2010-03-29 18:18:41 +02:00
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unsigned int val;
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val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
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/* Trigger the command */
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snd_soc_write(codec, WM8993_DC_SERVO_0, val);
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2009-07-29 22:21:49 +02:00
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dev_dbg(codec->dev, "Waiting for DC servo...\n");
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2010-01-20 18:39:45 +01:00
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2011-07-15 10:33:26 +02:00
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if (hubs->dcs_done_irq)
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timeout = 4;
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else
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timeout = 400;
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2011-07-12 08:25:03 +02:00
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2011-07-15 10:33:26 +02:00
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do {
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count++;
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if (hubs->dcs_done_irq)
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wait_for_completion_timeout(&hubs->dcs_done,
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msecs_to_jiffies(250));
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else
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2011-07-12 08:25:03 +02:00
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msleep(1);
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2011-07-15 10:33:26 +02:00
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reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
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dev_dbg(codec->dev, "DC servo: %x\n", reg);
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} while (reg & op && count < timeout);
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2009-07-29 22:21:49 +02:00
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2010-03-29 18:18:41 +02:00
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if (reg & op)
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2011-02-17 21:05:46 +01:00
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dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
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op);
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2009-07-29 22:21:49 +02:00
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}
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2011-07-12 08:25:03 +02:00
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irqreturn_t wm_hubs_dcs_done(int irq, void *data)
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{
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struct wm_hubs_data *hubs = data;
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complete(&hubs->dcs_done);
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return IRQ_HANDLED;
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}
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EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
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2012-04-26 21:06:56 +02:00
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static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec)
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{
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int reg;
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/* If we're going via the mixer we'll need to do additional checks */
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reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1);
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if (!(reg & WM8993_DACL_TO_HPOUT1L)) {
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if (reg & ~WM8993_DACL_TO_MIXOUTL) {
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dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
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reg & ~WM8993_DACL_TO_HPOUT1L);
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return false;
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} else {
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dev_vdbg(codec->dev, "HPL connected to mixer\n");
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}
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} else {
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dev_vdbg(codec->dev, "HPL connected to DAC\n");
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}
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reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2);
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if (!(reg & WM8993_DACR_TO_HPOUT1R)) {
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if (reg & ~WM8993_DACR_TO_MIXOUTR) {
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dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
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reg & ~WM8993_DACR_TO_HPOUT1R);
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return false;
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} else {
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dev_vdbg(codec->dev, "HPR connected to mixer\n");
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}
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} else {
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dev_vdbg(codec->dev, "HPR connected to DAC\n");
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}
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return true;
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}
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2012-05-01 19:45:09 +02:00
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struct wm_hubs_dcs_cache {
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struct list_head list;
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unsigned int left;
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unsigned int right;
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u16 dcs_cfg;
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};
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static bool wm_hubs_dcs_cache_get(struct snd_soc_codec *codec,
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struct wm_hubs_dcs_cache **entry)
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{
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struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
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struct wm_hubs_dcs_cache *cache;
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unsigned int left, right;
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left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
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left &= WM8993_HPOUT1L_VOL_MASK;
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right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
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right &= WM8993_HPOUT1R_VOL_MASK;
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list_for_each_entry(cache, &hubs->dcs_cache, list) {
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if (cache->left != left || cache->right != right)
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continue;
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*entry = cache;
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return true;
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}
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return false;
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}
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static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg)
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{
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struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
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struct wm_hubs_dcs_cache *cache;
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if (hubs->no_cache_dac_hp_direct)
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return;
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cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL);
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if (!cache) {
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dev_err(codec->dev, "Failed to allocate DCS cache entry\n");
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return;
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}
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cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
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cache->left &= WM8993_HPOUT1L_VOL_MASK;
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cache->right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
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cache->right &= WM8993_HPOUT1R_VOL_MASK;
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cache->dcs_cfg = dcs_cfg;
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list_add_tail(&cache->list, &hubs->dcs_cache);
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}
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2013-03-10 17:58:21 +01:00
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static int wm_hubs_read_dc_servo(struct snd_soc_codec *codec,
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2012-07-23 20:49:06 +02:00
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u16 *reg_l, u16 *reg_r)
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{
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struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
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u16 dcs_reg, reg;
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2013-03-10 17:58:21 +01:00
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int ret = 0;
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2012-07-23 20:49:06 +02:00
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switch (hubs->dcs_readback_mode) {
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case 2:
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dcs_reg = WM8994_DC_SERVO_4E;
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break;
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case 1:
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dcs_reg = WM8994_DC_SERVO_READBACK;
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break;
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default:
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dcs_reg = WM8993_DC_SERVO_3;
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break;
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}
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/* Different chips in the family support different readback
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* methods.
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*/
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switch (hubs->dcs_readback_mode) {
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case 0:
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*reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
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& WM8993_DCS_INTEG_CHAN_0_MASK;
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*reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
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& WM8993_DCS_INTEG_CHAN_1_MASK;
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break;
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case 2:
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case 1:
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reg = snd_soc_read(codec, dcs_reg);
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*reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
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>> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
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*reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
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break;
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default:
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WARN(1, "Unknown DCS readback method\n");
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2013-03-10 17:58:21 +01:00
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ret = -1;
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2012-07-23 20:49:06 +02:00
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}
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2013-03-10 17:58:21 +01:00
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return ret;
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2012-07-23 20:49:06 +02:00
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}
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2010-01-20 18:39:45 +01:00
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/*
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* Startup calibration of the DC servo
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*/
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2012-07-23 20:50:45 +02:00
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static void enable_dc_servo(struct snd_soc_codec *codec)
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2010-01-20 18:39:45 +01:00
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{
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2010-04-14 08:35:19 +02:00
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struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
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2012-05-01 19:45:09 +02:00
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struct wm_hubs_dcs_cache *cache;
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2011-01-21 13:47:33 +01:00
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s8 offset;
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2012-07-23 20:49:06 +02:00
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u16 reg_l, reg_r, dcs_cfg, dcs_reg;
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2011-08-01 06:02:17 +02:00
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switch (hubs->dcs_readback_mode) {
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case 2:
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dcs_reg = WM8994_DC_SERVO_4E;
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break;
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default:
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dcs_reg = WM8993_DC_SERVO_3;
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break;
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}
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2010-01-20 18:39:45 +01:00
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2010-10-27 22:48:36 +02:00
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/* If we're using a digital only path and have a previously
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* callibrated DC servo offset stored then use that. */
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2012-05-01 19:45:09 +02:00
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if (wm_hubs_dac_hp_direct(codec) &&
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wm_hubs_dcs_cache_get(codec, &cache)) {
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dev_dbg(codec->dev, "Using cached DCS offset %x for %d,%d\n",
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cache->dcs_cfg, cache->left, cache->right);
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snd_soc_write(codec, dcs_reg, cache->dcs_cfg);
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2010-10-27 22:48:36 +02:00
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wait_for_dc_servo(codec,
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WM8993_DCS_TRIG_DAC_WR_0 |
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WM8993_DCS_TRIG_DAC_WR_1);
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return;
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}
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2011-06-08 00:23:52 +02:00
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if (hubs->series_startup) {
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2010-11-26 18:23:44 +01:00
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/* Set for 32 series updates */
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snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
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WM8993_DCS_SERIES_NO_01_MASK,
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32 << WM8993_DCS_SERIES_NO_01_SHIFT);
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wait_for_dc_servo(codec,
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WM8993_DCS_TRIG_SERIES_0 |
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WM8993_DCS_TRIG_SERIES_1);
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} else {
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wait_for_dc_servo(codec,
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WM8993_DCS_TRIG_STARTUP_0 |
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WM8993_DCS_TRIG_STARTUP_1);
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}
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2010-01-20 18:39:45 +01:00
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2013-03-10 17:58:21 +01:00
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if (wm_hubs_read_dc_servo(codec, ®_l, ®_r) < 0)
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return;
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2010-10-27 22:48:36 +02:00
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dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
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2010-01-20 18:39:45 +01:00
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/* Apply correction to DC servo result */
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2011-08-01 06:10:16 +02:00
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if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
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dev_dbg(codec->dev,
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"Applying %d/%d code DC servo correction\n",
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hubs->dcs_codes_l, hubs->dcs_codes_r);
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2010-01-20 18:39:45 +01:00
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2011-06-08 00:28:45 +02:00
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/* HPOUT1R */
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2012-08-20 20:54:24 +02:00
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offset = (s8)reg_r;
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2012-08-20 21:01:51 +02:00
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dev_dbg(codec->dev, "DCS right %d->%d\n", offset,
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offset + hubs->dcs_codes_r);
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2011-08-01 06:10:16 +02:00
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offset += hubs->dcs_codes_r;
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2011-01-21 13:47:33 +01:00
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|
|
dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
|
2010-01-20 18:39:45 +01:00
|
|
|
|
2011-06-08 00:28:45 +02:00
|
|
|
/* HPOUT1L */
|
2012-08-20 20:54:24 +02:00
|
|
|
offset = (s8)reg_l;
|
2012-08-20 21:01:51 +02:00
|
|
|
dev_dbg(codec->dev, "DCS left %d->%d\n", offset,
|
|
|
|
offset + hubs->dcs_codes_l);
|
2011-08-01 06:10:16 +02:00
|
|
|
offset += hubs->dcs_codes_l;
|
2011-01-21 13:47:33 +01:00
|
|
|
dcs_cfg |= (u8)offset;
|
2010-01-20 18:39:45 +01:00
|
|
|
|
2010-05-10 15:56:03 +02:00
|
|
|
dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
|
|
|
|
|
2010-01-20 18:39:45 +01:00
|
|
|
/* Do it */
|
2011-08-01 06:02:17 +02:00
|
|
|
snd_soc_write(codec, dcs_reg, dcs_cfg);
|
2010-03-29 18:18:41 +02:00
|
|
|
wait_for_dc_servo(codec,
|
|
|
|
WM8993_DCS_TRIG_DAC_WR_0 |
|
|
|
|
WM8993_DCS_TRIG_DAC_WR_1);
|
2010-10-27 22:48:36 +02:00
|
|
|
} else {
|
2011-06-08 00:28:45 +02:00
|
|
|
dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
|
|
|
|
dcs_cfg |= reg_l;
|
2010-01-20 18:39:45 +01:00
|
|
|
}
|
2010-10-27 22:48:36 +02:00
|
|
|
|
|
|
|
/* Save the callibrated offset if we're in class W mode and
|
|
|
|
* therefore don't have any analogue signal mixed in. */
|
2012-05-01 19:45:09 +02:00
|
|
|
if (wm_hubs_dac_hp_direct(codec))
|
|
|
|
wm_hubs_dcs_cache_set(codec, dcs_cfg);
|
2010-01-20 18:39:45 +01:00
|
|
|
}
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
/*
|
|
|
|
* Update the DC servo calibration on gain changes
|
|
|
|
*/
|
|
|
|
static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
|
2010-01-20 18:39:45 +01:00
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
2009-07-29 22:21:49 +02:00
|
|
|
{
|
2014-03-18 09:02:04 +01:00
|
|
|
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
2010-04-14 08:35:19 +02:00
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
2009-07-29 22:21:49 +02:00
|
|
|
int ret;
|
|
|
|
|
2011-10-06 08:59:12 +02:00
|
|
|
ret = snd_soc_put_volsw(kcontrol, ucontrol);
|
2009-07-29 22:21:49 +02:00
|
|
|
|
2010-03-29 17:34:42 +02:00
|
|
|
/* If we're applying an offset correction then updating the
|
|
|
|
* callibration would be likely to introduce further offsets. */
|
2011-08-01 06:10:16 +02:00
|
|
|
if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
|
2010-03-29 17:34:42 +02:00
|
|
|
return ret;
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
/* Only need to do this if the outputs are active */
|
|
|
|
if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
|
|
|
|
& (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
|
|
|
|
snd_soc_update_bits(codec,
|
|
|
|
WM8993_DC_SERVO_0,
|
|
|
|
WM8993_DCS_TRIG_SINGLE_0 |
|
|
|
|
WM8993_DCS_TRIG_SINGLE_1,
|
|
|
|
WM8993_DCS_TRIG_SINGLE_0 |
|
|
|
|
WM8993_DCS_TRIG_SINGLE_1);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new analogue_snd_controls[] = {
|
|
|
|
SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
|
|
|
|
inpga_tlv),
|
|
|
|
SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
|
2011-05-27 15:56:16 +02:00
|
|
|
SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
|
|
|
|
inpga_tlv),
|
|
|
|
SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
|
2011-05-27 15:56:16 +02:00
|
|
|
SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
|
|
|
|
SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
|
|
|
|
inpga_tlv),
|
|
|
|
SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
|
2011-05-27 15:56:16 +02:00
|
|
|
SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
|
|
|
|
inpga_tlv),
|
|
|
|
SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
|
2011-05-27 15:56:16 +02:00
|
|
|
SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
|
|
|
|
inmix_sw_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
|
|
|
|
inmix_sw_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
|
|
|
|
inmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
|
|
|
|
inmix_tlv),
|
|
|
|
|
|
|
|
SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
|
|
|
|
inmix_sw_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
|
|
|
|
inmix_sw_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
|
|
|
|
inmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
|
|
|
|
inmix_tlv),
|
|
|
|
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
|
|
|
|
outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
|
|
|
|
outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
|
|
|
|
outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
|
|
|
|
outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
|
|
|
|
outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
|
|
|
|
WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
|
|
|
|
WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
|
|
|
|
outmix_tlv),
|
|
|
|
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
|
|
|
|
WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
|
|
|
|
WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
|
|
|
|
WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
|
|
|
|
WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
|
|
|
|
WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
|
|
|
|
WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
|
|
|
|
WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
|
|
|
|
WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
|
|
|
|
|
|
|
|
SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
|
|
|
|
WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
|
|
|
|
SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
|
|
|
|
WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
|
|
|
|
SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
|
|
|
|
WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
|
|
|
|
|
|
|
|
SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
|
|
|
|
SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
|
|
|
|
|
|
|
|
SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
|
|
|
|
5, 1, 1, wm_hubs_spkmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
|
|
|
|
4, 1, 1, wm_hubs_spkmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
|
|
|
|
3, 1, 1, wm_hubs_spkmix_tlv),
|
|
|
|
|
|
|
|
SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
|
|
|
|
5, 1, 1, wm_hubs_spkmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
|
|
|
|
4, 1, 1, wm_hubs_spkmix_tlv),
|
|
|
|
SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
|
|
|
|
3, 1, 1, wm_hubs_spkmix_tlv),
|
|
|
|
|
|
|
|
SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
|
|
|
|
WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
|
|
|
|
0, 3, 1, spkmixout_tlv),
|
|
|
|
SOC_DOUBLE_R_TLV("Speaker Volume",
|
|
|
|
WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
|
|
|
|
0, 63, 0, outpga_tlv),
|
|
|
|
SOC_DOUBLE_R("Speaker Switch",
|
|
|
|
WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
|
|
|
|
6, 1, 0),
|
|
|
|
SOC_DOUBLE_R("Speaker ZC Switch",
|
|
|
|
WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
|
|
|
|
7, 1, 0),
|
2010-12-05 09:26:07 +01:00
|
|
|
SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
|
2009-07-29 22:21:49 +02:00
|
|
|
spkboost_tlv),
|
|
|
|
SOC_ENUM("Speaker Reference", speaker_ref),
|
|
|
|
SOC_ENUM("Speaker Mode", speaker_mode),
|
|
|
|
|
2011-10-05 09:29:19 +02:00
|
|
|
SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
|
|
|
|
WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
|
2011-10-06 08:59:12 +02:00
|
|
|
0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
|
2011-10-05 09:29:19 +02:00
|
|
|
outpga_tlv),
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
|
|
|
|
WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
|
|
|
|
SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
|
|
|
|
WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
|
|
|
|
|
|
|
|
SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
|
|
|
|
SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
|
|
|
|
SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
|
|
|
|
line_tlv),
|
|
|
|
|
|
|
|
SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
|
|
|
|
SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
|
|
|
|
SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
|
|
|
|
line_tlv),
|
|
|
|
};
|
|
|
|
|
2010-01-20 18:39:45 +01:00
|
|
|
static int hp_supply_event(struct snd_soc_dapm_widget *w,
|
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = w->codec;
|
2010-04-14 08:35:19 +02:00
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
2010-01-20 18:39:45 +01:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_PRE_PMU:
|
|
|
|
switch (hubs->hp_startup_mode) {
|
|
|
|
case 0:
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
/* Enable the headphone amp */
|
|
|
|
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
|
|
|
|
WM8993_HPOUT1L_ENA |
|
|
|
|
WM8993_HPOUT1R_ENA,
|
|
|
|
WM8993_HPOUT1L_ENA |
|
|
|
|
WM8993_HPOUT1R_ENA);
|
|
|
|
|
|
|
|
/* Enable the second stage */
|
|
|
|
snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
|
|
|
|
WM8993_HPOUT1L_DLY |
|
|
|
|
WM8993_HPOUT1R_DLY,
|
|
|
|
WM8993_HPOUT1L_DLY |
|
|
|
|
WM8993_HPOUT1R_DLY);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(codec->dev, "Unknown HP startup mode %d\n",
|
|
|
|
hubs->hp_startup_mode);
|
|
|
|
break;
|
|
|
|
}
|
2013-10-30 08:35:02 +01:00
|
|
|
break;
|
2010-01-20 18:39:45 +01:00
|
|
|
|
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
|
|
|
snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
|
|
|
|
WM8993_CP_ENA, 0);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
static int hp_event(struct snd_soc_dapm_widget *w,
|
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = w->codec;
|
|
|
|
unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
|
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
|
|
|
snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
|
|
|
|
WM8993_CP_ENA, WM8993_CP_ENA);
|
|
|
|
|
|
|
|
msleep(5);
|
|
|
|
|
|
|
|
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
|
|
|
|
WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
|
|
|
|
WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
|
|
|
|
|
|
|
|
reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
|
|
|
|
snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
|
|
|
|
|
2010-01-20 18:39:45 +01:00
|
|
|
snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
|
2011-07-28 13:44:44 +02:00
|
|
|
WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
|
2010-01-20 18:39:45 +01:00
|
|
|
|
2012-07-23 20:50:45 +02:00
|
|
|
enable_dc_servo(codec);
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
|
|
|
|
WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
|
|
|
|
snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
2010-01-20 18:39:45 +01:00
|
|
|
snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
|
2010-05-10 17:13:11 +02:00
|
|
|
WM8993_HPOUT1L_OUTP |
|
|
|
|
WM8993_HPOUT1R_OUTP |
|
2010-01-20 18:39:45 +01:00
|
|
|
WM8993_HPOUT1L_RMV_SHORT |
|
|
|
|
WM8993_HPOUT1R_RMV_SHORT, 0);
|
2009-07-29 22:21:49 +02:00
|
|
|
|
2010-01-20 18:39:45 +01:00
|
|
|
snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
|
2010-05-10 17:13:11 +02:00
|
|
|
WM8993_HPOUT1L_DLY |
|
|
|
|
WM8993_HPOUT1R_DLY, 0);
|
2009-07-29 22:21:49 +02:00
|
|
|
|
2010-05-10 22:06:14 +02:00
|
|
|
snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
|
|
|
|
WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
|
|
|
|
0);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int earpiece_event(struct snd_soc_dapm_widget *w,
|
|
|
|
struct snd_kcontrol *control, int event)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = w->codec;
|
|
|
|
u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
|
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_PRE_PMU:
|
|
|
|
reg |= WM8993_HPOUT2_IN_ENA;
|
|
|
|
snd_soc_write(codec, WM8993_ANTIPOP1, reg);
|
|
|
|
udelay(50);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_DAPM_POST_PMD:
|
|
|
|
snd_soc_write(codec, WM8993_ANTIPOP1, reg);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2013-11-06 11:07:18 +01:00
|
|
|
WARN(1, "Invalid event %d\n", event);
|
2009-07-29 22:21:49 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-02-08 19:51:42 +01:00
|
|
|
static int lineout_event(struct snd_soc_dapm_widget *w,
|
|
|
|
struct snd_kcontrol *control, int event)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = w->codec;
|
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
|
|
|
bool *flag;
|
|
|
|
|
|
|
|
switch (w->shift) {
|
|
|
|
case WM8993_LINEOUT1N_ENA_SHIFT:
|
|
|
|
flag = &hubs->lineout1n_ena;
|
|
|
|
break;
|
|
|
|
case WM8993_LINEOUT1P_ENA_SHIFT:
|
|
|
|
flag = &hubs->lineout1p_ena;
|
|
|
|
break;
|
|
|
|
case WM8993_LINEOUT2N_ENA_SHIFT:
|
|
|
|
flag = &hubs->lineout2n_ena;
|
|
|
|
break;
|
|
|
|
case WM8993_LINEOUT2P_ENA_SHIFT:
|
|
|
|
flag = &hubs->lineout2p_ena;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN(1, "Unknown line output");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
*flag = SND_SOC_DAPM_EVENT_ON(event);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-08-21 18:54:52 +02:00
|
|
|
static int micbias_event(struct snd_soc_dapm_widget *w,
|
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = w->codec;
|
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
switch (w->shift) {
|
|
|
|
case WM8993_MICB1_ENA_SHIFT:
|
|
|
|
if (hubs->micb1_delay)
|
|
|
|
msleep(hubs->micb1_delay);
|
|
|
|
break;
|
|
|
|
case WM8993_MICB2_ENA_SHIFT:
|
|
|
|
if (hubs->micb2_delay)
|
|
|
|
msleep(hubs->micb2_delay);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-04-26 22:29:29 +02:00
|
|
|
void wm_hubs_update_class_w(struct snd_soc_codec *codec)
|
|
|
|
{
|
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
|
|
|
int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ;
|
|
|
|
|
|
|
|
if (!wm_hubs_dac_hp_direct(codec))
|
|
|
|
enable = false;
|
|
|
|
|
|
|
|
if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec))
|
|
|
|
enable = false;
|
|
|
|
|
|
|
|
dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled");
|
|
|
|
|
|
|
|
snd_soc_update_bits(codec, WM8993_CLASS_W_0,
|
|
|
|
WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable);
|
2012-09-27 19:35:24 +02:00
|
|
|
|
|
|
|
snd_soc_write(codec, WM8993_LEFT_OUTPUT_VOLUME,
|
|
|
|
snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME));
|
|
|
|
snd_soc_write(codec, WM8993_RIGHT_OUTPUT_VOLUME,
|
|
|
|
snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME));
|
2012-04-26 22:29:29 +02:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_update_class_w);
|
|
|
|
|
2012-04-26 23:08:50 +02:00
|
|
|
#define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \
|
2013-06-19 19:34:01 +02:00
|
|
|
SOC_SINGLE_EXT(xname, reg, shift, max, invert, \
|
|
|
|
snd_soc_dapm_get_volsw, class_w_put_volsw)
|
2012-04-26 23:08:50 +02:00
|
|
|
|
|
|
|
static int class_w_put_volsw(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
2013-07-29 17:13:57 +02:00
|
|
|
struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
|
2012-04-26 23:08:50 +02:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
|
|
|
|
|
|
|
|
wm_hubs_update_class_w(codec);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-04-26 22:29:29 +02:00
|
|
|
#define WM_HUBS_ENUM_W(xname, xenum) \
|
|
|
|
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
|
|
|
|
.info = snd_soc_info_enum_double, \
|
|
|
|
.get = snd_soc_dapm_get_enum_double, \
|
2012-04-26 23:08:50 +02:00
|
|
|
.put = class_w_put_double, \
|
2012-04-26 22:29:29 +02:00
|
|
|
.private_value = (unsigned long)&xenum }
|
|
|
|
|
2012-04-26 23:08:50 +02:00
|
|
|
static int class_w_put_double(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
2012-04-26 22:29:29 +02:00
|
|
|
{
|
2013-07-29 17:13:57 +02:00
|
|
|
struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
|
2012-04-26 22:29:29 +02:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
|
|
|
|
|
|
|
|
wm_hubs_update_class_w(codec);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char *hp_mux_text[] = {
|
|
|
|
"Mixer",
|
|
|
|
"DAC",
|
|
|
|
};
|
|
|
|
|
2014-02-18 10:47:17 +01:00
|
|
|
static SOC_ENUM_SINGLE_DECL(hpl_enum,
|
|
|
|
WM8993_OUTPUT_MIXER1, 8, hp_mux_text);
|
2012-04-26 22:29:29 +02:00
|
|
|
|
|
|
|
const struct snd_kcontrol_new wm_hubs_hpl_mux =
|
|
|
|
WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum);
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux);
|
|
|
|
|
2014-02-18 10:47:17 +01:00
|
|
|
static SOC_ENUM_SINGLE_DECL(hpr_enum,
|
|
|
|
WM8993_OUTPUT_MIXER2, 8, hp_mux_text);
|
2012-04-26 22:29:29 +02:00
|
|
|
|
|
|
|
const struct snd_kcontrol_new wm_hubs_hpr_mux =
|
|
|
|
WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum);
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux);
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
static const struct snd_kcontrol_new in1l_pga[] = {
|
|
|
|
SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new in1r_pga[] = {
|
|
|
|
SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new in2l_pga[] = {
|
|
|
|
SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new in2r_pga[] = {
|
|
|
|
SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new mixinl[] = {
|
|
|
|
SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new mixinr[] = {
|
|
|
|
SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new left_output_mixer[] = {
|
2012-04-26 23:08:50 +02:00
|
|
|
WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new right_output_mixer[] = {
|
2012-04-26 23:08:50 +02:00
|
|
|
WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
|
|
|
|
WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new earpiece_mixer[] = {
|
|
|
|
SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new left_speaker_boost[] = {
|
|
|
|
SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new right_speaker_boost[] = {
|
|
|
|
SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new line1_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new line1n_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new line1p_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new line2_mix[] = {
|
2012-02-02 00:46:58 +01:00
|
|
|
SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new line2n_mix[] = {
|
2012-01-27 17:52:22 +01:00
|
|
|
SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
|
|
|
|
SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
|
2009-07-29 22:21:49 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new line2p_mix[] = {
|
|
|
|
SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
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SND_SOC_DAPM_INPUT("IN1LN"),
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SND_SOC_DAPM_INPUT("IN1LP"),
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SND_SOC_DAPM_INPUT("IN2LN"),
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2009-12-04 07:12:10 +01:00
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SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
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2009-07-29 22:21:49 +02:00
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SND_SOC_DAPM_INPUT("IN1RN"),
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SND_SOC_DAPM_INPUT("IN1RP"),
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SND_SOC_DAPM_INPUT("IN2RN"),
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2009-12-04 07:12:10 +01:00
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SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
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2009-07-29 22:21:49 +02:00
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2012-08-21 18:54:52 +02:00
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SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0,
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micbias_event, SND_SOC_DAPM_POST_PMU),
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SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0,
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micbias_event, SND_SOC_DAPM_POST_PMU),
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2009-07-29 22:21:49 +02:00
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SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
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in1l_pga, ARRAY_SIZE(in1l_pga)),
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SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
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in1r_pga, ARRAY_SIZE(in1r_pga)),
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SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
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in2l_pga, ARRAY_SIZE(in2l_pga)),
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SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
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in2r_pga, ARRAY_SIZE(in2r_pga)),
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SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
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mixinl, ARRAY_SIZE(mixinl)),
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SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
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mixinr, ARRAY_SIZE(mixinr)),
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SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
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left_output_mixer, ARRAY_SIZE(left_output_mixer)),
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SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
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right_output_mixer, ARRAY_SIZE(right_output_mixer)),
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SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
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SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
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2010-01-20 18:39:45 +01:00
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SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
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2012-02-21 10:36:49 +01:00
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SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
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hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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2009-07-29 22:21:49 +02:00
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SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
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earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
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SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
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NULL, 0, earpiece_event,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
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left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
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SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
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right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
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2011-11-04 18:11:54 +01:00
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SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
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2012-02-07 15:24:57 +01:00
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SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
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NULL, 0),
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SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
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NULL, 0),
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2009-07-29 22:21:49 +02:00
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SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
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line1_mix, ARRAY_SIZE(line1_mix)),
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SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
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line2_mix, ARRAY_SIZE(line2_mix)),
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SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
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line1n_mix, ARRAY_SIZE(line1n_mix)),
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SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
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line1p_mix, ARRAY_SIZE(line1p_mix)),
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SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
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line2n_mix, ARRAY_SIZE(line2n_mix)),
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SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
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line2p_mix, ARRAY_SIZE(line2p_mix)),
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2012-02-08 19:51:42 +01:00
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SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
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NULL, 0, lineout_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
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NULL, 0, lineout_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
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NULL, 0, lineout_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
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NULL, 0, lineout_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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2009-07-29 22:21:49 +02:00
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SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
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SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
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SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
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SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
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SND_SOC_DAPM_OUTPUT("HPOUT1L"),
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SND_SOC_DAPM_OUTPUT("HPOUT1R"),
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SND_SOC_DAPM_OUTPUT("HPOUT2P"),
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SND_SOC_DAPM_OUTPUT("HPOUT2N"),
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SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
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SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
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SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
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SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
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};
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static const struct snd_soc_dapm_route analogue_routes[] = {
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2011-02-19 00:05:53 +01:00
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{ "MICBIAS1", NULL, "CLK_SYS" },
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{ "MICBIAS2", NULL, "CLK_SYS" },
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2009-07-29 22:21:49 +02:00
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{ "IN1L PGA", "IN1LP Switch", "IN1LP" },
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{ "IN1L PGA", "IN1LN Switch", "IN1LN" },
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2011-07-15 08:12:31 +02:00
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{ "IN1L PGA", NULL, "VMID" },
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{ "IN1R PGA", NULL, "VMID" },
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{ "IN2L PGA", NULL, "VMID" },
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{ "IN2R PGA", NULL, "VMID" },
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2009-07-29 22:21:49 +02:00
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{ "IN1R PGA", "IN1RP Switch", "IN1RP" },
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{ "IN1R PGA", "IN1RN Switch", "IN1RN" },
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|
2009-12-04 07:12:10 +01:00
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{ "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
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2009-07-29 22:21:49 +02:00
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{ "IN2L PGA", "IN2LN Switch", "IN2LN" },
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2009-12-04 07:12:10 +01:00
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{ "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
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2009-07-29 22:21:49 +02:00
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{ "IN2R PGA", "IN2RN Switch", "IN2RN" },
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2009-12-04 07:12:10 +01:00
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{ "Direct Voice", NULL, "IN2LP:VXRN" },
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{ "Direct Voice", NULL, "IN2RP:VXRP" },
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2009-07-29 22:21:49 +02:00
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{ "MIXINL", "IN1L Switch", "IN1L PGA" },
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{ "MIXINL", "IN2L Switch", "IN2L PGA" },
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{ "MIXINL", NULL, "Direct Voice" },
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{ "MIXINL", NULL, "IN1LP" },
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{ "MIXINL", NULL, "Left Output Mixer" },
|
2011-07-15 08:12:31 +02:00
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{ "MIXINL", NULL, "VMID" },
|
2009-07-29 22:21:49 +02:00
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{ "MIXINR", "IN1R Switch", "IN1R PGA" },
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{ "MIXINR", "IN2R Switch", "IN2R PGA" },
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{ "MIXINR", NULL, "Direct Voice" },
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{ "MIXINR", NULL, "IN1RP" },
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{ "MIXINR", NULL, "Right Output Mixer" },
|
2011-07-15 08:12:31 +02:00
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{ "MIXINR", NULL, "VMID" },
|
2009-07-29 22:21:49 +02:00
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{ "ADCL", NULL, "MIXINL" },
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{ "ADCR", NULL, "MIXINR" },
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{ "Left Output Mixer", "Left Input Switch", "MIXINL" },
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{ "Left Output Mixer", "Right Input Switch", "MIXINR" },
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{ "Left Output Mixer", "IN2RN Switch", "IN2RN" },
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{ "Left Output Mixer", "IN2LN Switch", "IN2LN" },
|
2009-12-04 07:12:10 +01:00
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{ "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
|
2009-07-29 22:21:49 +02:00
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{ "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
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{ "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
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{ "Right Output Mixer", "Left Input Switch", "MIXINL" },
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{ "Right Output Mixer", "Right Input Switch", "MIXINR" },
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{ "Right Output Mixer", "IN2LN Switch", "IN2LN" },
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{ "Right Output Mixer", "IN2RN Switch", "IN2RN" },
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2009-12-04 07:12:10 +01:00
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{ "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
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2009-07-29 22:21:49 +02:00
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{ "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
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{ "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
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{ "Left Output PGA", NULL, "Left Output Mixer" },
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{ "Left Output PGA", NULL, "TOCLK" },
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{ "Right Output PGA", NULL, "Right Output Mixer" },
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{ "Right Output PGA", NULL, "TOCLK" },
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{ "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
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{ "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
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{ "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
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|
2011-07-15 08:12:31 +02:00
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{ "Earpiece Driver", NULL, "VMID" },
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2009-07-29 22:21:49 +02:00
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{ "Earpiece Driver", NULL, "Earpiece Mixer" },
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{ "HPOUT2N", NULL, "Earpiece Driver" },
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{ "HPOUT2P", NULL, "Earpiece Driver" },
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{ "SPKL", "Input Switch", "MIXINL" },
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{ "SPKL", "IN1LP Switch", "IN1LP" },
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2011-04-08 09:32:16 +02:00
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{ "SPKL", "Output Switch", "Left Output PGA" },
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2009-07-29 22:21:49 +02:00
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{ "SPKL", NULL, "TOCLK" },
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{ "SPKR", "Input Switch", "MIXINR" },
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{ "SPKR", "IN1RP Switch", "IN1RP" },
|
2011-04-08 09:32:16 +02:00
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{ "SPKR", "Output Switch", "Right Output PGA" },
|
2009-07-29 22:21:49 +02:00
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{ "SPKR", NULL, "TOCLK" },
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{ "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
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{ "SPKL Boost", "SPKL Switch", "SPKL" },
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{ "SPKL Boost", "SPKR Switch", "SPKR" },
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{ "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
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{ "SPKR Boost", "SPKR Switch", "SPKR" },
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{ "SPKR Boost", "SPKL Switch", "SPKL" },
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|
2011-07-15 08:12:31 +02:00
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{ "SPKL Driver", NULL, "VMID" },
|
2009-07-29 22:21:49 +02:00
|
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{ "SPKL Driver", NULL, "SPKL Boost" },
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{ "SPKL Driver", NULL, "CLK_SYS" },
|
2011-11-04 18:11:54 +01:00
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{ "SPKL Driver", NULL, "TSHUT" },
|
2009-07-29 22:21:49 +02:00
|
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|
|
2011-07-15 08:12:31 +02:00
|
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{ "SPKR Driver", NULL, "VMID" },
|
2009-07-29 22:21:49 +02:00
|
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{ "SPKR Driver", NULL, "SPKR Boost" },
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|
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{ "SPKR Driver", NULL, "CLK_SYS" },
|
2011-11-04 18:11:54 +01:00
|
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{ "SPKR Driver", NULL, "TSHUT" },
|
2009-07-29 22:21:49 +02:00
|
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{ "SPKOUTLP", NULL, "SPKL Driver" },
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{ "SPKOUTLN", NULL, "SPKL Driver" },
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{ "SPKOUTRP", NULL, "SPKR Driver" },
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{ "SPKOUTRN", NULL, "SPKR Driver" },
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|
|
2011-04-08 09:32:16 +02:00
|
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{ "Left Headphone Mux", "Mixer", "Left Output PGA" },
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{ "Right Headphone Mux", "Mixer", "Right Output PGA" },
|
2009-07-29 22:21:49 +02:00
|
|
|
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|
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{ "Headphone PGA", NULL, "Left Headphone Mux" },
|
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{ "Headphone PGA", NULL, "Right Headphone Mux" },
|
2011-07-15 08:12:31 +02:00
|
|
|
{ "Headphone PGA", NULL, "VMID" },
|
2009-07-29 22:21:49 +02:00
|
|
|
{ "Headphone PGA", NULL, "CLK_SYS" },
|
2010-01-20 18:39:45 +01:00
|
|
|
{ "Headphone PGA", NULL, "Headphone Supply" },
|
2009-07-29 22:21:49 +02:00
|
|
|
|
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{ "HPOUT1L", NULL, "Headphone PGA" },
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|
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{ "HPOUT1R", NULL, "Headphone PGA" },
|
|
|
|
|
2011-07-15 08:12:31 +02:00
|
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|
{ "LINEOUT1N Driver", NULL, "VMID" },
|
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{ "LINEOUT1P Driver", NULL, "VMID" },
|
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|
|
{ "LINEOUT2N Driver", NULL, "VMID" },
|
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|
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{ "LINEOUT2P Driver", NULL, "VMID" },
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
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{ "LINEOUT1N", NULL, "LINEOUT1N Driver" },
|
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|
|
{ "LINEOUT1P", NULL, "LINEOUT1P Driver" },
|
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|
|
{ "LINEOUT2N", NULL, "LINEOUT2N Driver" },
|
|
|
|
{ "LINEOUT2P", NULL, "LINEOUT2P Driver" },
|
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|
};
|
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|
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|
|
static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
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|
|
{ "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
|
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|
|
{ "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
|
2011-05-15 02:21:28 +02:00
|
|
|
{ "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
|
2009-07-29 22:21:49 +02:00
|
|
|
|
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|
{ "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
|
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|
|
{ "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
|
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|
};
|
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|
|
static const struct snd_soc_dapm_route lineout1_se_routes[] = {
|
2011-05-15 02:21:28 +02:00
|
|
|
{ "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
|
|
|
|
{ "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
|
2009-07-29 22:21:49 +02:00
|
|
|
|
2011-05-15 02:21:28 +02:00
|
|
|
{ "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
{ "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
|
|
|
|
{ "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
|
2012-01-31 12:55:32 +01:00
|
|
|
{ "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
|
|
|
|
{ "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
|
2011-05-15 02:21:28 +02:00
|
|
|
{ "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
{ "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
|
|
|
|
{ "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct snd_soc_dapm_route lineout2_se_routes[] = {
|
2011-05-15 02:21:28 +02:00
|
|
|
{ "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
|
|
|
|
{ "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
|
2009-07-29 22:21:49 +02:00
|
|
|
|
2011-05-15 02:21:28 +02:00
|
|
|
{ "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
|
2009-07-29 22:21:49 +02:00
|
|
|
|
|
|
|
{ "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
|
|
|
|
{ "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
|
|
|
|
};
|
|
|
|
|
|
|
|
int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
|
|
|
|
{
|
2010-11-05 14:53:46 +01:00
|
|
|
struct snd_soc_dapm_context *dapm = &codec->dapm;
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
/* Latch volume update bits & default ZC on */
|
|
|
|
snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
|
|
|
|
WM8993_IN1_VU, WM8993_IN1_VU);
|
|
|
|
snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
|
|
|
|
WM8993_IN1_VU, WM8993_IN1_VU);
|
|
|
|
snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
|
|
|
|
WM8993_IN2_VU, WM8993_IN2_VU);
|
|
|
|
snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
|
|
|
|
WM8993_IN2_VU, WM8993_IN2_VU);
|
|
|
|
|
2011-05-15 21:18:38 +02:00
|
|
|
snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
|
|
|
|
WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
|
2009-07-29 22:21:49 +02:00
|
|
|
snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
|
|
|
|
WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
|
|
|
|
|
|
|
|
snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
|
2011-05-15 21:18:38 +02:00
|
|
|
WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
|
|
|
|
WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
|
2009-07-29 22:21:49 +02:00
|
|
|
snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
|
|
|
|
WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
|
|
|
|
WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
|
|
|
|
|
|
|
|
snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
|
2011-05-15 21:18:38 +02:00
|
|
|
WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
|
|
|
|
WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
|
2009-07-29 22:21:49 +02:00
|
|
|
snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
|
|
|
|
WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
|
|
|
|
WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
|
|
|
|
|
2012-02-03 18:43:09 +01:00
|
|
|
snd_soc_add_codec_controls(codec, analogue_snd_controls,
|
2009-07-29 22:21:49 +02:00
|
|
|
ARRAY_SIZE(analogue_snd_controls));
|
|
|
|
|
2010-11-05 14:53:46 +01:00
|
|
|
snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
|
2009-07-29 22:21:49 +02:00
|
|
|
ARRAY_SIZE(analogue_dapm_widgets));
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
|
|
|
|
|
|
|
|
int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
|
|
|
|
int lineout1_diff, int lineout2_diff)
|
|
|
|
{
|
2011-07-12 08:25:03 +02:00
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
2010-11-05 14:53:46 +01:00
|
|
|
struct snd_soc_dapm_context *dapm = &codec->dapm;
|
|
|
|
|
2012-07-25 19:10:03 +02:00
|
|
|
hubs->codec = codec;
|
|
|
|
|
2012-05-01 19:45:09 +02:00
|
|
|
INIT_LIST_HEAD(&hubs->dcs_cache);
|
2011-07-12 08:25:03 +02:00
|
|
|
init_completion(&hubs->dcs_done);
|
|
|
|
|
2010-11-05 14:53:46 +01:00
|
|
|
snd_soc_dapm_add_routes(dapm, analogue_routes,
|
2009-07-29 22:21:49 +02:00
|
|
|
ARRAY_SIZE(analogue_routes));
|
|
|
|
|
|
|
|
if (lineout1_diff)
|
2010-11-05 14:53:46 +01:00
|
|
|
snd_soc_dapm_add_routes(dapm,
|
2009-07-29 22:21:49 +02:00
|
|
|
lineout1_diff_routes,
|
|
|
|
ARRAY_SIZE(lineout1_diff_routes));
|
|
|
|
else
|
2010-11-05 14:53:46 +01:00
|
|
|
snd_soc_dapm_add_routes(dapm,
|
2009-07-29 22:21:49 +02:00
|
|
|
lineout1_se_routes,
|
|
|
|
ARRAY_SIZE(lineout1_se_routes));
|
|
|
|
|
|
|
|
if (lineout2_diff)
|
2010-11-05 14:53:46 +01:00
|
|
|
snd_soc_dapm_add_routes(dapm,
|
2009-07-29 22:21:49 +02:00
|
|
|
lineout2_diff_routes,
|
|
|
|
ARRAY_SIZE(lineout2_diff_routes));
|
|
|
|
else
|
2010-11-05 14:53:46 +01:00
|
|
|
snd_soc_dapm_add_routes(dapm,
|
2009-07-29 22:21:49 +02:00
|
|
|
lineout2_se_routes,
|
|
|
|
ARRAY_SIZE(lineout2_se_routes));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
|
|
|
|
|
2009-09-30 15:16:11 +02:00
|
|
|
int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
|
|
|
|
int lineout1_diff, int lineout2_diff,
|
|
|
|
int lineout1fb, int lineout2fb,
|
2012-08-21 18:54:52 +02:00
|
|
|
int jd_scthr, int jd_thr,
|
|
|
|
int micbias1_delay, int micbias2_delay,
|
|
|
|
int micbias1_lvl, int micbias2_lvl)
|
2009-09-30 15:16:11 +02:00
|
|
|
{
|
2012-02-08 19:51:42 +01:00
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
hubs->lineout1_se = !lineout1_diff;
|
|
|
|
hubs->lineout2_se = !lineout2_diff;
|
2012-08-21 18:54:52 +02:00
|
|
|
hubs->micb1_delay = micbias1_delay;
|
|
|
|
hubs->micb2_delay = micbias2_delay;
|
2012-02-08 19:51:42 +01:00
|
|
|
|
2009-09-30 15:16:11 +02:00
|
|
|
if (!lineout1_diff)
|
|
|
|
snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
|
|
|
|
WM8993_LINEOUT1_MODE,
|
|
|
|
WM8993_LINEOUT1_MODE);
|
|
|
|
if (!lineout2_diff)
|
|
|
|
snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
|
|
|
|
WM8993_LINEOUT2_MODE,
|
|
|
|
WM8993_LINEOUT2_MODE);
|
|
|
|
|
2012-03-19 18:31:56 +01:00
|
|
|
if (!lineout1_diff && !lineout2_diff)
|
|
|
|
snd_soc_update_bits(codec, WM8993_ANTIPOP1,
|
|
|
|
WM8993_LINEOUT_VMID_BUF_ENA,
|
|
|
|
WM8993_LINEOUT_VMID_BUF_ENA);
|
|
|
|
|
2009-09-30 15:16:11 +02:00
|
|
|
if (lineout1fb)
|
|
|
|
snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
|
|
|
|
WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
|
|
|
|
|
|
|
|
if (lineout2fb)
|
|
|
|
snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
|
|
|
|
WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
|
|
|
|
|
|
|
|
snd_soc_update_bits(codec, WM8993_MICBIAS,
|
|
|
|
WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
|
|
|
|
WM8993_MICB1_LVL | WM8993_MICB2_LVL,
|
|
|
|
jd_scthr << WM8993_JD_SCTHR_SHIFT |
|
|
|
|
jd_thr << WM8993_JD_THR_SHIFT |
|
|
|
|
micbias1_lvl |
|
|
|
|
micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
|
|
|
|
|
2012-02-08 19:51:42 +01:00
|
|
|
void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
|
|
|
|
{
|
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
|
|
|
int val = 0;
|
|
|
|
|
|
|
|
if (hubs->lineout1_se)
|
|
|
|
val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
|
|
|
|
|
|
|
|
if (hubs->lineout2_se)
|
|
|
|
val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
|
|
|
|
|
|
|
|
/* Enable the line outputs while we power up */
|
|
|
|
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
|
|
|
|
|
|
|
|
void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
|
|
|
|
enum snd_soc_bias_level level)
|
|
|
|
{
|
|
|
|
struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
|
2012-04-17 21:28:10 +02:00
|
|
|
int mask, val;
|
2012-02-08 19:51:42 +01:00
|
|
|
|
|
|
|
switch (level) {
|
2012-02-10 19:09:42 +01:00
|
|
|
case SND_SOC_BIAS_STANDBY:
|
|
|
|
/* Clamp the inputs to VMID while we ramp to charge caps */
|
|
|
|
snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
|
|
|
|
WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
|
|
|
|
break;
|
|
|
|
|
2012-02-08 19:51:42 +01:00
|
|
|
case SND_SOC_BIAS_ON:
|
|
|
|
/* Turn off any unneded single ended outputs */
|
|
|
|
val = 0;
|
2012-04-17 21:28:10 +02:00
|
|
|
mask = 0;
|
|
|
|
|
|
|
|
if (hubs->lineout1_se)
|
|
|
|
mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
|
|
|
|
|
|
|
|
if (hubs->lineout2_se)
|
|
|
|
mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
|
2012-02-08 19:51:42 +01:00
|
|
|
|
|
|
|
if (hubs->lineout1_se && hubs->lineout1n_ena)
|
|
|
|
val |= WM8993_LINEOUT1N_ENA;
|
|
|
|
|
|
|
|
if (hubs->lineout1_se && hubs->lineout1p_ena)
|
|
|
|
val |= WM8993_LINEOUT1P_ENA;
|
|
|
|
|
|
|
|
if (hubs->lineout2_se && hubs->lineout2n_ena)
|
|
|
|
val |= WM8993_LINEOUT2N_ENA;
|
|
|
|
|
|
|
|
if (hubs->lineout2_se && hubs->lineout2p_ena)
|
|
|
|
val |= WM8993_LINEOUT2P_ENA;
|
|
|
|
|
|
|
|
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
|
2012-04-17 21:28:10 +02:00
|
|
|
mask, val);
|
2012-02-08 19:51:42 +01:00
|
|
|
|
2012-02-10 19:09:42 +01:00
|
|
|
/* Remove the input clamps */
|
|
|
|
snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
|
|
|
|
WM8993_INPUTS_CLAMP, 0);
|
2012-02-08 19:51:42 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
|
|
|
|
|
2009-07-29 22:21:49 +02:00
|
|
|
MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
|
|
|
|
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|