2009-06-19 06:27:40 +02:00
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/*
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* PATA driver for AT91SAM9260 Static Memory Controller
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* with CompactFlash interface in True IDE mode
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*
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* Copyright (C) 2009 Matyukevich Sergey
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*
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* Based on:
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* * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
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* * pata_at32 driver by Kristoffer Nyborg Gregertsen
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* * at91_ide driver by Stanislaw Gruszka
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 09:04:11 +01:00
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#include <linux/gfp.h>
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2009-06-19 06:27:40 +02:00
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#include <scsi/scsi_host.h>
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#include <linux/ata.h>
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#include <linux/clk.h>
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#include <linux/libata.h>
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#include <linux/platform_device.h>
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#include <linux/ata_platform.h>
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#include <mach/at91sam9_smc.h>
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#include <mach/board.h>
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#include <mach/gpio.h>
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#define DRV_NAME "pata_at91"
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2011-03-28 14:56:15 +02:00
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#define DRV_VERSION "0.2"
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2009-06-19 06:27:40 +02:00
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#define CF_IDE_OFFSET 0x00c00000
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#define CF_ALT_IDE_OFFSET 0x00e00000
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#define CF_IDE_RES_SIZE 0x08
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2011-03-28 14:56:15 +02:00
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#define NCS_RD_PULSE_LIMIT 0x3f /* maximal value for pulse bitfields */
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2009-06-19 06:27:40 +02:00
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struct at91_ide_info {
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unsigned long mode;
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unsigned int cs;
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2009-07-16 20:38:55 +02:00
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struct clk *mck;
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2009-06-19 06:27:40 +02:00
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void __iomem *ide_addr;
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void __iomem *alt_addr;
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};
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2011-03-28 14:56:14 +02:00
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static const struct ata_timing initial_timing = {
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.mode = XFER_PIO_0,
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.setup = 70,
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.act8b = 290,
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.rec8b = 240,
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.cyc8b = 600,
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.active = 165,
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.recover = 150,
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.dmack_hold = 0,
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.cycle = 600,
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.udma = 0
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};
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2009-06-19 06:27:40 +02:00
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2009-07-16 20:38:55 +02:00
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static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
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2009-06-19 06:27:40 +02:00
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{
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unsigned long mul;
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2009-07-16 20:38:55 +02:00
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/*
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* cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
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* x * (f / 1_000_000_000) =
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* x * ((f * 65536) / 1_000_000_000) / 65536 =
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* x * (((f / 10_000) * 65536) / 100_000) / 65536 =
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*/
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2009-06-19 06:27:40 +02:00
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2009-07-16 20:38:55 +02:00
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mul = (mck_hz / 10000) << 16;
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mul /= 100000;
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2009-06-19 06:27:40 +02:00
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2009-07-16 20:38:55 +02:00
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return (ns * mul + 65536) >> 16; /* rounding */
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2009-06-19 06:27:40 +02:00
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}
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static void set_smc_mode(struct at91_ide_info *info)
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{
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2009-07-16 20:38:55 +02:00
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at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
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return;
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2009-06-19 06:27:40 +02:00
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}
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static void set_smc_timing(struct device *dev,
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struct at91_ide_info *info, const struct ata_timing *ata)
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{
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2009-07-16 20:38:55 +02:00
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unsigned long read_cycle, write_cycle, active, recover;
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unsigned long nrd_setup, nrd_pulse, nrd_recover;
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unsigned long nwe_setup, nwe_pulse;
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2009-06-19 06:27:40 +02:00
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2009-07-16 20:38:55 +02:00
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unsigned long ncs_write_setup, ncs_write_pulse;
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unsigned long ncs_read_setup, ncs_read_pulse;
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2009-06-19 06:27:40 +02:00
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2009-07-16 20:38:55 +02:00
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unsigned long mck_hz;
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2009-06-19 06:27:40 +02:00
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read_cycle = ata->cyc8b;
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nrd_setup = ata->setup;
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nrd_pulse = ata->act8b;
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nrd_recover = ata->rec8b;
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2009-07-16 20:38:55 +02:00
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mck_hz = clk_get_rate(info->mck);
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2009-06-19 06:27:40 +02:00
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read_cycle = calc_mck_cycles(read_cycle, mck_hz);
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nrd_setup = calc_mck_cycles(nrd_setup, mck_hz);
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nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz);
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nrd_recover = calc_mck_cycles(nrd_recover, mck_hz);
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active = nrd_setup + nrd_pulse;
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recover = read_cycle - active;
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/* Need at least two cycles recovery */
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if (recover < 2)
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read_cycle = active + 2;
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/* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
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ncs_read_setup = 1;
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ncs_read_pulse = read_cycle - 2;
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2011-03-28 14:56:15 +02:00
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if (ncs_read_pulse > NCS_RD_PULSE_LIMIT) {
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ncs_read_pulse = NCS_RD_PULSE_LIMIT;
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dev_warn(dev, "ncs_read_pulse limited to maximal value %lu\n",
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ncs_read_pulse);
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}
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2009-06-19 06:27:40 +02:00
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/* Write timings same as read timings */
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write_cycle = read_cycle;
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nwe_setup = nrd_setup;
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nwe_pulse = nrd_pulse;
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ncs_write_setup = ncs_read_setup;
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ncs_write_pulse = ncs_read_pulse;
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2009-07-16 20:38:55 +02:00
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dev_dbg(dev, "ATA timings: nrd_setup = %lu nrd_pulse = %lu nrd_cycle = %lu\n",
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2009-06-19 06:27:40 +02:00
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nrd_setup, nrd_pulse, read_cycle);
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2009-07-16 20:38:55 +02:00
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dev_dbg(dev, "ATA timings: nwe_setup = %lu nwe_pulse = %lu nwe_cycle = %lu\n",
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2009-06-19 06:27:40 +02:00
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nwe_setup, nwe_pulse, write_cycle);
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2009-07-16 20:38:55 +02:00
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dev_dbg(dev, "ATA timings: ncs_read_setup = %lu ncs_read_pulse = %lu\n",
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2009-06-19 06:27:40 +02:00
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ncs_read_setup, ncs_read_pulse);
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2009-07-16 20:38:55 +02:00
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dev_dbg(dev, "ATA timings: ncs_write_setup = %lu ncs_write_pulse = %lu\n",
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2009-06-19 06:27:40 +02:00
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ncs_write_setup, ncs_write_pulse);
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at91_sys_write(AT91_SMC_SETUP(info->cs),
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AT91_SMC_NWESETUP_(nwe_setup) |
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AT91_SMC_NRDSETUP_(nrd_setup) |
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AT91_SMC_NCS_WRSETUP_(ncs_write_setup) |
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AT91_SMC_NCS_RDSETUP_(ncs_read_setup));
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at91_sys_write(AT91_SMC_PULSE(info->cs),
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AT91_SMC_NWEPULSE_(nwe_pulse) |
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AT91_SMC_NRDPULSE_(nrd_pulse) |
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AT91_SMC_NCS_WRPULSE_(ncs_write_pulse) |
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AT91_SMC_NCS_RDPULSE_(ncs_read_pulse));
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at91_sys_write(AT91_SMC_CYCLE(info->cs),
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AT91_SMC_NWECYCLE_(write_cycle) |
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AT91_SMC_NRDCYCLE_(read_cycle));
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return;
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}
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static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct at91_ide_info *info = ap->host->private_data;
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struct ata_timing timing;
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int ret;
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/* Compute ATA timing and set it to SMC */
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ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
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if (ret) {
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2010-02-04 07:09:54 +01:00
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dev_warn(ap->dev, "Failed to compute ATA timing %d, "
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"set PIO_0 timing\n", ret);
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2009-06-19 06:27:40 +02:00
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set_smc_timing(ap->dev, info, &initial_timing);
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} else {
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set_smc_timing(ap->dev, info, &timing);
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}
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/* Setup SMC mode */
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set_smc_mode(info);
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return;
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}
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static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
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unsigned char *buf, unsigned int buflen, int rw)
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{
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struct at91_ide_info *info = dev->link->ap->host->private_data;
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unsigned int consumed;
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unsigned long flags;
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unsigned int mode;
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local_irq_save(flags);
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mode = at91_sys_read(AT91_SMC_MODE(info->cs));
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/* set 16bit mode before writing data */
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at91_sys_write(AT91_SMC_MODE(info->cs),
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(mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16);
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consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
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/* restore 8bit mode after data is written */
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at91_sys_write(AT91_SMC_MODE(info->cs),
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(mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8);
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local_irq_restore(flags);
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return consumed;
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}
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static struct scsi_host_template pata_at91_sht = {
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ATA_PIO_SHT(DRV_NAME),
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};
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static struct ata_port_operations pata_at91_port_ops = {
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.inherits = &ata_sff_port_ops,
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.sff_data_xfer = pata_at91_data_xfer_noirq,
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.set_piomode = pata_at91_set_piomode,
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.cable_detect = ata_cable_40wire,
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};
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static int __devinit pata_at91_probe(struct platform_device *pdev)
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{
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struct at91_cf_data *board = pdev->dev.platform_data;
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struct device *dev = &pdev->dev;
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struct at91_ide_info *info;
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struct resource *mem_res;
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struct ata_host *host;
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struct ata_port *ap;
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2009-07-16 20:38:55 +02:00
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2009-06-19 06:27:40 +02:00
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int irq_flags = 0;
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int irq = 0;
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int ret;
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/* get platform resources: IO/CTL memories and irq/rst pins */
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if (pdev->num_resources != 1) {
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dev_err(&pdev->dev, "invalid number of resources\n");
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return -EINVAL;
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}
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mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem_res) {
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dev_err(dev, "failed to get mem resource\n");
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return -EINVAL;
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}
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irq = board->irq_pin;
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/* init ata host */
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host = ata_host_alloc(dev, 1);
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if (!host)
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return -ENOMEM;
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ap = host->ports[0];
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ap->ops = &pata_at91_port_ops;
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ap->flags |= ATA_FLAG_SLAVE_POSS;
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ap->pio_mask = ATA_PIO4;
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if (!irq) {
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ap->flags |= ATA_FLAG_PIO_POLLING;
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ata_port_desc(ap, "no IRQ, using PIO polling");
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}
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2009-08-07 04:15:20 +02:00
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info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
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2009-06-19 06:27:40 +02:00
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if (!info) {
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dev_err(dev, "failed to allocate memory for private data\n");
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return -ENOMEM;
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}
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2009-07-16 20:38:55 +02:00
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info->mck = clk_get(NULL, "mck");
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|
|
|
|
if (IS_ERR(info->mck)) {
|
|
|
|
dev_err(dev, "failed to get access to mck clock\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2009-06-19 06:27:40 +02:00
|
|
|
info->cs = board->chipselect;
|
|
|
|
info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
|
|
|
|
AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
|
|
|
|
AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
|
|
|
|
|
|
|
|
info->ide_addr = devm_ioremap(dev,
|
|
|
|
mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
|
|
|
|
|
|
|
|
if (!info->ide_addr) {
|
|
|
|
dev_err(dev, "failed to map IO base\n");
|
|
|
|
ret = -ENOMEM;
|
2009-08-07 04:15:20 +02:00
|
|
|
goto err_put;
|
2009-06-19 06:27:40 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
info->alt_addr = devm_ioremap(dev,
|
|
|
|
mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
|
|
|
|
|
|
|
|
if (!info->alt_addr) {
|
|
|
|
dev_err(dev, "failed to map CTL base\n");
|
|
|
|
ret = -ENOMEM;
|
2009-08-07 04:15:20 +02:00
|
|
|
goto err_put;
|
2009-06-19 06:27:40 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
ap->ioaddr.cmd_addr = info->ide_addr;
|
|
|
|
ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
|
|
|
|
ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
|
|
|
|
|
|
|
|
ata_sff_std_ports(&ap->ioaddr);
|
|
|
|
|
|
|
|
ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
|
|
|
|
(unsigned long long)mem_res->start + CF_IDE_OFFSET,
|
|
|
|
(unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
|
|
|
|
|
|
|
|
host->private_data = info;
|
|
|
|
|
|
|
|
return ata_host_activate(host, irq ? gpio_to_irq(irq) : 0,
|
|
|
|
irq ? ata_sff_interrupt : NULL,
|
|
|
|
irq_flags, &pata_at91_sht);
|
|
|
|
|
2009-08-07 04:15:20 +02:00
|
|
|
err_put:
|
2009-07-16 20:38:55 +02:00
|
|
|
clk_put(info->mck);
|
2009-06-19 06:27:40 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __devexit pata_at91_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
2009-07-11 09:49:48 +02:00
|
|
|
struct at91_ide_info *info;
|
2009-06-19 06:27:40 +02:00
|
|
|
|
|
|
|
if (!host)
|
|
|
|
return 0;
|
2009-07-11 09:49:48 +02:00
|
|
|
info = host->private_data;
|
2009-06-19 06:27:40 +02:00
|
|
|
|
|
|
|
ata_host_detach(host);
|
|
|
|
|
|
|
|
if (!info)
|
|
|
|
return 0;
|
|
|
|
|
2009-07-16 20:38:55 +02:00
|
|
|
clk_put(info->mck);
|
2009-06-19 06:27:40 +02:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver pata_at91_driver = {
|
|
|
|
.probe = pata_at91_probe,
|
|
|
|
.remove = __devexit_p(pata_at91_remove),
|
|
|
|
.driver = {
|
|
|
|
.name = DRV_NAME,
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init pata_at91_init(void)
|
|
|
|
{
|
|
|
|
return platform_driver_register(&pata_at91_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit pata_at91_exit(void)
|
|
|
|
{
|
|
|
|
platform_driver_unregister(&pata_at91_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
module_init(pata_at91_init);
|
|
|
|
module_exit(pata_at91_exit);
|
|
|
|
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
|
|
|
|
MODULE_AUTHOR("Matyukevich Sergey");
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
|