[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-23 21:14:41 +02:00
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/*
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* arch/arm/mach-orion/common.c
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*
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* Core functions for Marvell Orion System On Chip
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*
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* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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2007-10-23 21:14:42 +02:00
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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2007-10-31 11:42:41 +01:00
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#include <linux/mv643xx_eth.h>
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2007-11-12 08:51:36 +01:00
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#include <linux/mv643xx_i2c.h>
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[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-23 21:14:41 +02:00
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#include <asm/page.h>
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2007-10-23 21:14:42 +02:00
|
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#include <asm/timex.h>
|
[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-23 21:14:41 +02:00
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#include <asm/mach/map.h>
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2008-01-29 23:33:32 +01:00
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#include <asm/arch/hardware.h>
|
[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-23 21:14:41 +02:00
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#include "common.h"
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/*****************************************************************************
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* I/O Address Mapping
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****************************************************************************/
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static struct map_desc orion_io_desc[] __initdata = {
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{
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.virtual = ORION_REGS_BASE,
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.pfn = __phys_to_pfn(ORION_REGS_BASE),
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.length = ORION_REGS_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = ORION_PCIE_IO_BASE,
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.pfn = __phys_to_pfn(ORION_PCIE_IO_BASE),
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.length = ORION_PCIE_IO_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = ORION_PCI_IO_BASE,
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.pfn = __phys_to_pfn(ORION_PCI_IO_BASE),
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.length = ORION_PCI_IO_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = ORION_PCIE_WA_BASE,
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.pfn = __phys_to_pfn(ORION_PCIE_WA_BASE),
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.length = ORION_PCIE_WA_SIZE,
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.type = MT_DEVICE
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},
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};
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void __init orion_map_io(void)
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{
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iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
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}
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2007-10-23 21:14:42 +02:00
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2007-10-23 21:14:42 +02:00
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/*****************************************************************************
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* UART
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****************************************************************************/
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static struct resource orion_uart_resources[] = {
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{
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.start = UART0_BASE,
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.end = UART0_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_ORION_UART0,
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.end = IRQ_ORION_UART0,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = UART1_BASE,
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.end = UART1_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_ORION_UART1,
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.end = IRQ_ORION_UART1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct plat_serial8250_port orion_uart_data[] = {
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{
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.mapbase = UART0_BASE,
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.membase = (char *)UART0_BASE,
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.irq = IRQ_ORION_UART0,
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = ORION_TCLK,
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},
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{
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.mapbase = UART1_BASE,
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.membase = (char *)UART1_BASE,
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.irq = IRQ_ORION_UART1,
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = ORION_TCLK,
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},
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{ },
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};
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static struct platform_device orion_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = orion_uart_data,
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},
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.resource = orion_uart_resources,
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.num_resources = ARRAY_SIZE(orion_uart_resources),
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};
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/*******************************************************************************
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* USB Controller - 2 interfaces
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******************************************************************************/
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static struct resource orion_ehci0_resources[] = {
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{
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.start = ORION_USB0_REG_BASE,
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.end = ORION_USB0_REG_BASE + SZ_4K,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_ORION_USB0_CTRL,
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.end = IRQ_ORION_USB0_CTRL,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource orion_ehci1_resources[] = {
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{
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.start = ORION_USB1_REG_BASE,
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.end = ORION_USB1_REG_BASE + SZ_4K,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_ORION_USB1_CTRL,
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.end = IRQ_ORION_USB1_CTRL,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 ehci_dmamask = 0xffffffffUL;
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static struct platform_device orion_ehci0 = {
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.name = "orion-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &ehci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.resource = orion_ehci0_resources,
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.num_resources = ARRAY_SIZE(orion_ehci0_resources),
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};
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static struct platform_device orion_ehci1 = {
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.name = "orion-ehci",
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.id = 1,
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.dev = {
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.dma_mask = &ehci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.resource = orion_ehci1_resources,
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.num_resources = ARRAY_SIZE(orion_ehci1_resources),
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};
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2007-10-31 11:42:41 +01:00
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/*****************************************************************************
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* Gigabit Ethernet port
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* (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
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****************************************************************************/
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static struct resource orion_eth_shared_resources[] = {
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{
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.start = ORION_ETH_REG_BASE,
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.end = ORION_ETH_REG_BASE + 0xffff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device orion_eth_shared = {
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.name = MV643XX_ETH_SHARED_NAME,
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.id = 0,
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.num_resources = 1,
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.resource = orion_eth_shared_resources,
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};
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static struct resource orion_eth_resources[] = {
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{
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.name = "eth irq",
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.start = IRQ_ORION_ETH_SUM,
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.end = IRQ_ORION_ETH_SUM,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device orion_eth = {
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.name = MV643XX_ETH_NAME,
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.id = 0,
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.num_resources = 1,
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.resource = orion_eth_resources,
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};
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void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
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{
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orion_eth.dev.platform_data = eth_data;
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platform_device_register(&orion_eth_shared);
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platform_device_register(&orion_eth);
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}
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2007-11-12 08:51:36 +01:00
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/*****************************************************************************
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* I2C controller
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* (The Orion and Discovery (MV643xx) families share the same I2C controller)
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****************************************************************************/
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static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
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.freq_m = 8, /* assumes 166 MHz TCLK */
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.freq_n = 3,
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.timeout = 1000, /* Default timeout of 1 second */
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};
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static struct resource orion_i2c_resources[] = {
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{
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.name = "i2c base",
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.start = I2C_BASE,
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.end = I2C_BASE + 0x20 -1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "i2c irq",
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.start = IRQ_ORION_I2C,
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.end = IRQ_ORION_I2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device orion_i2c = {
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.name = MV64XXX_I2C_CTLR_NAME,
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.id = 0,
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.num_resources = ARRAY_SIZE(orion_i2c_resources),
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.resource = orion_i2c_resources,
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.dev = {
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.platform_data = &orion_i2c_pdata,
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},
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};
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2008-01-29 23:33:32 +01:00
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/*****************************************************************************
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* Sata port
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****************************************************************************/
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static struct resource orion_sata_resources[] = {
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{
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.name = "sata base",
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.start = ORION_SATA_REG_BASE,
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.end = ORION_SATA_REG_BASE + 0x5000 - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "sata irq",
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.start = IRQ_ORION_SATA,
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.end = IRQ_ORION_SATA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device orion_sata = {
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.name = "sata_mv",
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.id = 0,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(orion_sata_resources),
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.resource = orion_sata_resources,
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};
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void __init orion_sata_init(struct mv_sata_platform_data *sata_data)
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{
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orion_sata.dev.platform_data = sata_data;
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platform_device_register(&orion_sata);
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}
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|
|
|
|
2007-10-23 21:14:42 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* General
|
|
|
|
****************************************************************************/
|
|
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|
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/*
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|
|
* Identify device ID and rev from PCIE configuration header space '0'.
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*/
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static void orion_id(u32 *dev, u32 *rev, char **dev_name)
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{
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orion_pcie_id(dev, rev);
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if (*dev == MV88F5281_DEV_ID) {
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if (*rev == MV88F5281_REV_D2) {
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*dev_name = "MV88F5281-D2";
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} else if (*rev == MV88F5281_REV_D1) {
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*dev_name = "MV88F5281-D1";
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} else {
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*dev_name = "MV88F5281-Rev-Unsupported";
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}
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|
} else if (*dev == MV88F5182_DEV_ID) {
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if (*rev == MV88F5182_REV_A2) {
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*dev_name = "MV88F5182-A2";
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|
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} else {
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|
|
*dev_name = "MV88F5182-Rev-Unsupported";
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|
|
|
}
|
2007-11-11 12:05:11 +01:00
|
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|
} else if (*dev == MV88F5181_DEV_ID) {
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|
|
if (*rev == MV88F5181_REV_B1) {
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|
|
*dev_name = "MV88F5181-Rev-B1";
|
|
|
|
} else {
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|
|
*dev_name = "MV88F5181-Rev-Unsupported";
|
|
|
|
}
|
2007-10-23 21:14:42 +02:00
|
|
|
} else {
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|
|
*dev_name = "Device-Unknown";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
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|
|
void __init orion_init(void)
|
|
|
|
{
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|
|
char *dev_name;
|
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|
|
u32 dev, rev;
|
|
|
|
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|
|
orion_id(&dev, &rev, &dev_name);
|
|
|
|
printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Setup Orion address map
|
|
|
|
*/
|
|
|
|
orion_setup_cpu_wins();
|
|
|
|
orion_setup_usb_wins();
|
|
|
|
orion_setup_eth_wins();
|
|
|
|
orion_setup_pci_wins();
|
|
|
|
orion_setup_pcie_wins();
|
|
|
|
if (dev == MV88F5182_DEV_ID)
|
|
|
|
orion_setup_sata_wins();
|
2007-10-23 21:14:42 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* REgister devices
|
|
|
|
*/
|
|
|
|
platform_device_register(&orion_uart);
|
|
|
|
platform_device_register(&orion_ehci0);
|
|
|
|
if (dev == MV88F5182_DEV_ID)
|
|
|
|
platform_device_register(&orion_ehci1);
|
2007-11-12 08:51:36 +01:00
|
|
|
platform_device_register(&orion_i2c);
|
2007-10-23 21:14:42 +02:00
|
|
|
}
|