2013-04-22 23:00:19 +02:00
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/*
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* platform.c - DesignWare HS OTG Controller platform driver
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*
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* Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The names of the above-listed copyright holders may not be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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2015-10-14 08:52:29 +02:00
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#include <linux/clk.h>
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2013-04-22 23:00:19 +02:00
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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2013-11-27 02:58:01 +01:00
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#include <linux/of_device.h>
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2014-11-21 15:14:48 +01:00
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#include <linux/mutex.h>
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2013-04-22 23:00:19 +02:00
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#include <linux/platform_device.h>
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2015-10-14 08:52:29 +02:00
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#include <linux/phy/phy.h>
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#include <linux/platform_data/s3c-hsotg.h>
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2013-04-22 23:00:19 +02:00
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2014-08-06 03:01:50 +02:00
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#include <linux/usb/of.h>
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2013-04-22 23:00:19 +02:00
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#include "core.h"
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#include "hcd.h"
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2015-04-29 22:08:59 +02:00
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#include "debug.h"
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2013-04-22 23:00:19 +02:00
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static const char dwc2_driver_name[] = "dwc2";
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2013-11-27 02:58:01 +01:00
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static const struct dwc2_core_params params_bcm2835 = {
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.otg_cap = 0, /* HNP/SRP capable */
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.otg_ver = 0, /* 1.3 */
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.dma_enable = 1,
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.dma_desc_enable = 0,
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.speed = 0, /* High Speed */
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.enable_dynamic_fifo = 1,
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.en_multiple_tx_fifo = 1,
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.host_rx_fifo_size = 774, /* 774 DWORDs */
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.host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
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.host_perio_tx_fifo_size = 512, /* 512 DWORDs */
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.max_transfer_size = 65535,
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.max_packet_count = 511,
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.host_channels = 8,
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.phy_type = 1, /* UTMI */
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.phy_utmi_width = 8, /* 8 bits */
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.phy_ulpi_ddr = 0, /* Single */
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.phy_ulpi_ext_vbus = 0,
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.i2c_enable = 0,
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.ulpi_fs_ls = 0,
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.host_support_fs_ls_low_power = 0,
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.host_ls_low_power_phy_clk = 0, /* 48 MHz */
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.ts_dline = 0,
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.reload_ctl = 0,
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.ahbcfg = 0x10,
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2013-12-04 04:56:05 +01:00
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.uframe_sched = 0,
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2015-04-29 22:09:04 +02:00
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.external_id_pin_ctl = -1,
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2015-04-29 22:09:19 +02:00
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.hibernation = -1,
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2013-11-27 02:58:01 +01:00
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};
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2014-08-08 05:55:57 +02:00
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static const struct dwc2_core_params params_rk3066 = {
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.otg_cap = 2, /* non-HNP/non-SRP */
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.otg_ver = -1,
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.dma_enable = -1,
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.dma_desc_enable = 0,
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.speed = -1,
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.enable_dynamic_fifo = 1,
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.en_multiple_tx_fifo = -1,
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.host_rx_fifo_size = 520, /* 520 DWORDs */
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.host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
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.host_perio_tx_fifo_size = 256, /* 256 DWORDs */
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.max_transfer_size = 65535,
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.max_packet_count = -1,
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.host_channels = -1,
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.phy_type = -1,
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.phy_utmi_width = -1,
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.phy_ulpi_ddr = -1,
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.phy_ulpi_ext_vbus = -1,
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.i2c_enable = -1,
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.ulpi_fs_ls = -1,
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.host_support_fs_ls_low_power = -1,
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.host_ls_low_power_phy_clk = -1,
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.ts_dline = -1,
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.reload_ctl = -1,
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.ahbcfg = 0x7, /* INCR16 */
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.uframe_sched = -1,
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2015-04-29 22:09:04 +02:00
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.external_id_pin_ctl = -1,
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2015-04-29 22:09:19 +02:00
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.hibernation = -1,
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2014-08-08 05:55:57 +02:00
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};
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2015-10-14 08:52:29 +02:00
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static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
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{
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struct platform_device *pdev = to_platform_device(hsotg->dev);
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int ret;
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ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
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hsotg->supplies);
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if (ret)
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return ret;
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ret = clk_prepare_enable(hsotg->clk);
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if (ret)
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return ret;
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if (hsotg->uphy)
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ret = usb_phy_init(hsotg->uphy);
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else if (hsotg->plat && hsotg->plat->phy_init)
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ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
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else {
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ret = phy_power_on(hsotg->phy);
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if (ret == 0)
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ret = phy_init(hsotg->phy);
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}
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return ret;
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}
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/**
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* dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
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* @hsotg: The driver state
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*
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* A wrapper for platform code responsible for controlling
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* low-level USB platform resources (phy, clock, regulators)
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*/
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int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
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{
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int ret = __dwc2_lowlevel_hw_enable(hsotg);
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if (ret == 0)
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hsotg->ll_hw_enabled = true;
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return ret;
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}
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static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
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{
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struct platform_device *pdev = to_platform_device(hsotg->dev);
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int ret = 0;
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if (hsotg->uphy)
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usb_phy_shutdown(hsotg->uphy);
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else if (hsotg->plat && hsotg->plat->phy_exit)
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ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
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else {
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ret = phy_exit(hsotg->phy);
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if (ret == 0)
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ret = phy_power_off(hsotg->phy);
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}
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if (ret)
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return ret;
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clk_disable_unprepare(hsotg->clk);
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ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
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hsotg->supplies);
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return ret;
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}
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/**
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* dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
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* @hsotg: The driver state
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*
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* A wrapper for platform code responsible for controlling
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* low-level USB platform resources (phy, clock, regulators)
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*/
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int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
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{
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int ret = __dwc2_lowlevel_hw_disable(hsotg);
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if (ret == 0)
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hsotg->ll_hw_enabled = false;
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return ret;
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}
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static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
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{
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int i, ret;
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/* Set default UTMI width */
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hsotg->phyif = GUSBCFG_PHYIF16;
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/*
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* Attempt to find a generic PHY, then look for an old style
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* USB PHY and then fall back to pdata
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*/
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hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
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if (IS_ERR(hsotg->phy)) {
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hsotg->phy = NULL;
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hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
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if (IS_ERR(hsotg->uphy))
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hsotg->uphy = NULL;
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else
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hsotg->plat = dev_get_platdata(hsotg->dev);
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}
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if (hsotg->phy) {
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/*
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* If using the generic PHY framework, check if the PHY bus
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* width is 8-bit and set the phyif appropriately.
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*/
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if (phy_get_bus_width(hsotg->phy) == 8)
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hsotg->phyif = GUSBCFG_PHYIF8;
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}
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if (!hsotg->phy && !hsotg->uphy && !hsotg->plat) {
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dev_err(hsotg->dev, "no platform data or transceiver defined\n");
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return -EPROBE_DEFER;
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}
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/* Clock */
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hsotg->clk = devm_clk_get(hsotg->dev, "otg");
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if (IS_ERR(hsotg->clk)) {
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hsotg->clk = NULL;
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dev_dbg(hsotg->dev, "cannot get otg clock\n");
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}
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/* Regulators */
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for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
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hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
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ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
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hsotg->supplies);
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if (ret) {
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dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
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return ret;
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}
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return 0;
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}
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2013-04-22 23:00:19 +02:00
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/**
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* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
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* DWC_otg driver
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*
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* @dev: Platform device
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*
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* This routine is called, for example, when the rmmod command is executed. The
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* device may or may not be electrically present. If it is present, the driver
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* stops device processing. Any resources used on behalf of this device are
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* freed.
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*/
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static int dwc2_driver_remove(struct platform_device *dev)
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{
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struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
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2015-04-29 22:08:59 +02:00
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dwc2_debugfs_exit(hsotg);
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2015-03-10 13:41:10 +01:00
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if (hsotg->hcd_enabled)
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dwc2_hcd_remove(hsotg);
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if (hsotg->gadget_enabled)
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2015-08-07 01:11:54 +02:00
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dwc2_hsotg_remove(hsotg);
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2013-04-22 23:00:19 +02:00
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2015-10-14 08:52:29 +02:00
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if (hsotg->ll_hw_enabled)
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dwc2_lowlevel_hw_disable(hsotg);
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2013-04-22 23:00:19 +02:00
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return 0;
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}
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2013-11-27 02:58:01 +01:00
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static const struct of_device_id dwc2_of_match_table[] = {
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{ .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 },
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2014-08-08 05:55:57 +02:00
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{ .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 },
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2013-11-27 02:58:01 +01:00
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{ .compatible = "snps,dwc2", .data = NULL },
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2014-11-11 18:13:34 +01:00
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{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
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2013-11-27 02:58:01 +01:00
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{},
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};
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MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
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2013-04-22 23:00:19 +02:00
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/**
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* dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
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* driver
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*
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* @dev: Platform device
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*
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* This routine creates the driver components required to control the device
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* (core, HCD, and PCD) and initializes the device. The driver components are
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* stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
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* in the device private data. This allows the driver to access the dwc2_hsotg
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* structure on subsequent calls to driver methods for this device.
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*/
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static int dwc2_driver_probe(struct platform_device *dev)
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{
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2013-11-27 02:58:01 +01:00
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const struct of_device_id *match;
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const struct dwc2_core_params *params;
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struct dwc2_core_params defparams;
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2013-04-22 23:00:19 +02:00
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struct dwc2_hsotg *hsotg;
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struct resource *res;
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int retval;
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int irq;
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2013-11-27 02:58:01 +01:00
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match = of_match_device(dwc2_of_match_table, &dev->dev);
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if (match && match->data) {
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params = match->data;
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} else {
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/* Default all params to autodetect */
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dwc2_set_all_params(&defparams, -1);
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params = &defparams;
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2014-05-07 15:30:33 +02:00
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/*
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* Disable descriptor dma mode by default as the HW can support
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* it, but does not support it for SPLIT transactions.
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|
|
*/
|
|
|
|
defparams.dma_desc_enable = 0;
|
2013-11-27 02:58:01 +01:00
|
|
|
}
|
2013-04-22 23:00:19 +02:00
|
|
|
|
|
|
|
hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
|
|
|
|
if (!hsotg)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
hsotg->dev = &dev->dev;
|
|
|
|
|
2013-05-17 10:52:55 +02:00
|
|
|
/*
|
|
|
|
* Use reasonable defaults so platforms don't have to provide these.
|
|
|
|
*/
|
|
|
|
if (!dev->dev.dma_mask)
|
|
|
|
dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
|
2013-06-10 17:56:16 +02:00
|
|
|
retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
|
|
|
|
if (retval)
|
|
|
|
return retval;
|
2013-05-17 10:52:55 +02:00
|
|
|
|
2013-04-22 23:00:19 +02:00
|
|
|
irq = platform_get_irq(dev, 0);
|
|
|
|
if (irq < 0) {
|
|
|
|
dev_err(&dev->dev, "missing IRQ resource\n");
|
2013-10-26 19:42:19 +02:00
|
|
|
return irq;
|
2013-04-22 23:00:19 +02:00
|
|
|
}
|
|
|
|
|
2014-11-11 18:13:37 +01:00
|
|
|
dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
|
|
|
|
irq);
|
|
|
|
retval = devm_request_irq(hsotg->dev, irq,
|
|
|
|
dwc2_handle_common_intr, IRQF_SHARED,
|
|
|
|
dev_name(hsotg->dev), hsotg);
|
|
|
|
if (retval)
|
|
|
|
return retval;
|
|
|
|
|
2013-04-22 23:00:19 +02:00
|
|
|
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
|
|
hsotg->regs = devm_ioremap_resource(&dev->dev, res);
|
|
|
|
if (IS_ERR(hsotg->regs))
|
|
|
|
return PTR_ERR(hsotg->regs);
|
|
|
|
|
|
|
|
dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
|
|
|
|
(unsigned long)res->start, hsotg->regs);
|
|
|
|
|
2015-09-21 10:14:34 +02:00
|
|
|
hsotg->dr_mode = usb_get_dr_mode(&dev->dev);
|
2015-09-29 12:08:18 +02:00
|
|
|
if (IS_ENABLED(CONFIG_USB_DWC2_HOST) &&
|
|
|
|
hsotg->dr_mode != USB_DR_MODE_HOST) {
|
|
|
|
hsotg->dr_mode = USB_DR_MODE_HOST;
|
|
|
|
dev_warn(hsotg->dev,
|
|
|
|
"Configuration mismatch. Forcing host mode\n");
|
|
|
|
} else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) &&
|
|
|
|
hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
|
|
|
|
hsotg->dr_mode = USB_DR_MODE_PERIPHERAL;
|
|
|
|
dev_warn(hsotg->dev,
|
|
|
|
"Configuration mismatch. Forcing peripheral mode\n");
|
|
|
|
}
|
2014-08-06 03:01:50 +02:00
|
|
|
|
2015-10-14 08:52:29 +02:00
|
|
|
retval = dwc2_lowlevel_hw_init(hsotg);
|
2015-04-29 22:09:05 +02:00
|
|
|
if (retval)
|
|
|
|
return retval;
|
|
|
|
|
2015-10-14 08:52:29 +02:00
|
|
|
spin_lock_init(&hsotg->lock);
|
|
|
|
|
2015-04-29 22:09:05 +02:00
|
|
|
hsotg->core_params = devm_kzalloc(&dev->dev,
|
|
|
|
sizeof(*hsotg->core_params), GFP_KERNEL);
|
|
|
|
if (!hsotg->core_params)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dwc2_set_all_params(hsotg->core_params, -1);
|
|
|
|
|
2015-10-14 08:52:29 +02:00
|
|
|
retval = dwc2_lowlevel_hw_enable(hsotg);
|
|
|
|
if (retval)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
/* Detect config values from hardware */
|
|
|
|
retval = dwc2_get_hwparams(hsotg);
|
|
|
|
if (retval)
|
|
|
|
goto error;
|
|
|
|
|
2015-04-29 22:09:05 +02:00
|
|
|
/* Validate parameter values */
|
|
|
|
dwc2_set_parameters(hsotg, params);
|
|
|
|
|
2015-03-10 13:41:10 +01:00
|
|
|
if (hsotg->dr_mode != USB_DR_MODE_HOST) {
|
|
|
|
retval = dwc2_gadget_init(hsotg, irq);
|
|
|
|
if (retval)
|
2015-10-14 08:52:29 +02:00
|
|
|
goto error;
|
2015-03-10 13:41:10 +01:00
|
|
|
hsotg->gadget_enabled = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
|
2015-04-29 22:09:05 +02:00
|
|
|
retval = dwc2_hcd_init(hsotg, irq);
|
2015-03-10 13:41:10 +01:00
|
|
|
if (retval) {
|
|
|
|
if (hsotg->gadget_enabled)
|
2015-08-07 01:11:54 +02:00
|
|
|
dwc2_hsotg_remove(hsotg);
|
2015-10-14 08:52:29 +02:00
|
|
|
goto error;
|
2015-03-10 13:41:10 +01:00
|
|
|
}
|
|
|
|
hsotg->hcd_enabled = 1;
|
|
|
|
}
|
2013-04-22 23:00:19 +02:00
|
|
|
|
|
|
|
platform_set_drvdata(dev, hsotg);
|
|
|
|
|
2015-04-29 22:08:59 +02:00
|
|
|
dwc2_debugfs_init(hsotg);
|
|
|
|
|
2015-10-14 08:52:29 +02:00
|
|
|
/* Gadget code manages lowlevel hw on its own */
|
|
|
|
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
|
|
|
|
dwc2_lowlevel_hw_disable(hsotg);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error:
|
|
|
|
dwc2_lowlevel_hw_disable(hsotg);
|
2013-04-22 23:00:19 +02:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2014-11-19 15:37:53 +01:00
|
|
|
static int __maybe_unused dwc2_suspend(struct device *dev)
|
2014-11-11 18:13:34 +01:00
|
|
|
{
|
2014-11-11 18:13:35 +01:00
|
|
|
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
|
2014-11-11 18:13:34 +01:00
|
|
|
int ret = 0;
|
|
|
|
|
2015-10-14 08:52:29 +02:00
|
|
|
if (dwc2_is_device_mode(dwc2))
|
|
|
|
dwc2_hsotg_suspend(dwc2);
|
|
|
|
|
|
|
|
if (dwc2->ll_hw_enabled)
|
|
|
|
ret = __dwc2_lowlevel_hw_disable(dwc2);
|
2014-12-08 10:46:26 +01:00
|
|
|
|
2014-11-11 18:13:34 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-11-19 15:37:53 +01:00
|
|
|
static int __maybe_unused dwc2_resume(struct device *dev)
|
2014-11-11 18:13:34 +01:00
|
|
|
{
|
2014-11-11 18:13:35 +01:00
|
|
|
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
|
2014-11-11 18:13:34 +01:00
|
|
|
int ret = 0;
|
|
|
|
|
2015-10-14 08:52:29 +02:00
|
|
|
if (dwc2->ll_hw_enabled) {
|
|
|
|
ret = __dwc2_lowlevel_hw_enable(dwc2);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dwc2_is_device_mode(dwc2))
|
2015-08-07 01:11:54 +02:00
|
|
|
ret = dwc2_hsotg_resume(dwc2);
|
2014-12-08 10:46:26 +01:00
|
|
|
|
2014-11-11 18:13:34 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-11-11 18:13:35 +01:00
|
|
|
static const struct dev_pm_ops dwc2_dev_pm_ops = {
|
|
|
|
SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
|
|
|
|
};
|
|
|
|
|
2013-04-22 23:00:19 +02:00
|
|
|
static struct platform_driver dwc2_platform_driver = {
|
|
|
|
.driver = {
|
2013-11-12 20:07:19 +01:00
|
|
|
.name = dwc2_driver_name,
|
2013-04-22 23:00:19 +02:00
|
|
|
.of_match_table = dwc2_of_match_table,
|
2014-11-11 18:13:35 +01:00
|
|
|
.pm = &dwc2_dev_pm_ops,
|
2013-04-22 23:00:19 +02:00
|
|
|
},
|
|
|
|
.probe = dwc2_driver_probe,
|
|
|
|
.remove = dwc2_driver_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_platform_driver(dwc2_platform_driver);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
|
|
|
|
MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
|
|
|
|
MODULE_LICENSE("Dual BSD/GPL");
|