2005-04-17 00:20:36 +02:00
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/*
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* arch/arm/mach-pxa/time.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/signal.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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2006-12-12 09:21:50 +01:00
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#include <linux/clocksource.h>
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2005-04-17 00:20:36 +02:00
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#include <asm/system.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/leds.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include <asm/arch/pxa-regs.h>
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static inline unsigned long pxa_get_rtc_time(void)
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{
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return RCNR;
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}
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static int pxa_set_rtc(void)
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{
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unsigned long current_time = xtime.tv_sec;
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if (RTSR & RTSR_ALE) {
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/* make sure not to forward the clock over an alarm */
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unsigned long alarm = RTAR;
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if (current_time >= alarm && alarm >= RCNR)
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return -ERESTARTSYS;
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}
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RCNR = current_time;
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return 0;
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}
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2005-09-01 13:48:40 +02:00
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#ifdef CONFIG_NO_IDLE_HZ
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static unsigned long initial_match;
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static int match_posponed;
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#endif
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2005-04-17 00:20:36 +02:00
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static irqreturn_t
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2006-10-06 19:53:39 +02:00
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pxa_timer_interrupt(int irq, void *dev_id)
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2005-04-17 00:20:36 +02:00
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{
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int next_match;
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write_seqlock(&xtime_lock);
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2005-09-01 13:48:40 +02:00
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#ifdef CONFIG_NO_IDLE_HZ
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if (match_posponed) {
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match_posponed = 0;
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OSMR0 = initial_match;
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}
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#endif
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2005-04-17 00:20:36 +02:00
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/* Loop until we get ahead of the free running timer.
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* This ensures an exact clock tick count and time accuracy.
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2005-09-01 13:48:47 +02:00
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* Since IRQs are disabled at this point, coherence between
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* lost_ticks(updated in do_timer()) and the match reg value is
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* ensured, hence we can use do_gettimeofday() from interrupt
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* handlers.
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2005-04-17 00:20:36 +02:00
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*
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* HACK ALERT: it seems that the PXA timer regs aren't updated right
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* away in all cases when a write occurs. We therefore compare with
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* 8 instead of 0 in the while() condition below to avoid missing a
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* match if OSCR has already reached the next OSMR value.
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* Experience has shown that up to 6 ticks are needed to work around
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* this problem, but let's use 8 to be conservative. Note that this
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* affect things only when the timer IRQ has been delayed by nearly
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* exactly one tick period which should be a pretty rare event.
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*/
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do {
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2006-10-06 19:53:39 +02:00
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timer_tick();
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2005-04-17 00:20:36 +02:00
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OSSR = OSSR_M0; /* Clear match on timer 0 */
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next_match = (OSMR0 += LATCH);
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} while( (signed long)(next_match - OSCR) <= 8 );
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction pxa_timer_irq = {
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.name = "PXA Timer Tick",
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2006-07-03 02:20:05 +02:00
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.flags = IRQF_DISABLED | IRQF_TIMER,
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2005-06-26 18:06:36 +02:00
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.handler = pxa_timer_interrupt,
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2005-04-17 00:20:36 +02:00
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};
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2006-12-12 09:21:50 +01:00
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cycle_t pxa_get_cycles(void)
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{
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return OSCR;
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}
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static struct clocksource clocksource_pxa = {
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.name = "pxa_timer",
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.rating = 200,
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.read = pxa_get_cycles,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 20,
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.is_continuous = 1,
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};
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2005-04-17 00:20:36 +02:00
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static void __init pxa_timer_init(void)
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{
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struct timespec tv;
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2006-11-20 22:19:29 +01:00
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unsigned long flags;
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2005-04-17 00:20:36 +02:00
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set_rtc = pxa_set_rtc;
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tv.tv_nsec = 0;
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tv.tv_sec = pxa_get_rtc_time();
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do_settimeofday(&tv);
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2005-11-08 23:43:06 +01:00
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OIER = 0; /* disable any timer interrupts */
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2005-04-17 00:20:36 +02:00
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OSSR = 0xf; /* clear status on all timers */
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setup_irq(IRQ_OST0, &pxa_timer_irq);
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2006-11-20 22:19:29 +01:00
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local_irq_save(flags);
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2005-11-08 23:43:06 +01:00
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OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
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2006-11-20 22:19:29 +01:00
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OSMR0 = OSCR + LATCH; /* set initial match */
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local_irq_restore(flags);
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2006-12-12 09:21:50 +01:00
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/* on PXA OSCR runs continiously and is not written to, so we can use it
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* as clock source directly.
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*/
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clocksource_pxa.mult =
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clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
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clocksource_register(&clocksource_pxa);
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2005-04-17 00:20:36 +02:00
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}
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2005-09-01 13:48:40 +02:00
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#ifdef CONFIG_NO_IDLE_HZ
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static int pxa_dyn_tick_enable_disable(void)
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{
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/* nothing to do */
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return 0;
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}
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static void pxa_dyn_tick_reprogram(unsigned long ticks)
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{
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if (ticks > 1) {
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initial_match = OSMR0;
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OSMR0 = initial_match + ticks * LATCH;
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match_posponed = 1;
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}
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}
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static irqreturn_t
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2006-10-06 19:53:39 +02:00
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pxa_dyn_tick_handler(int irq, void *dev_id)
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2005-09-01 13:48:40 +02:00
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{
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if (match_posponed) {
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match_posponed = 0;
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OSMR0 = initial_match;
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if ( (signed long)(initial_match - OSCR) <= 8 )
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2006-10-06 19:53:39 +02:00
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return pxa_timer_interrupt(irq, dev_id);
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2005-09-01 13:48:40 +02:00
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}
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return IRQ_NONE;
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}
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static struct dyn_tick_timer pxa_dyn_tick = {
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.enable = pxa_dyn_tick_enable_disable,
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.disable = pxa_dyn_tick_enable_disable,
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.reprogram = pxa_dyn_tick_reprogram,
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.handler = pxa_dyn_tick_handler,
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};
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#endif
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2005-04-17 00:20:36 +02:00
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#ifdef CONFIG_PM
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static unsigned long osmr[4], oier;
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static void pxa_timer_suspend(void)
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{
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osmr[0] = OSMR0;
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osmr[1] = OSMR1;
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osmr[2] = OSMR2;
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osmr[3] = OSMR3;
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oier = OIER;
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}
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static void pxa_timer_resume(void)
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{
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OSMR0 = osmr[0];
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OSMR1 = osmr[1];
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OSMR2 = osmr[2];
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OSMR3 = osmr[3];
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OIER = oier;
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/*
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* OSMR0 is the system timer: make sure OSCR is sufficiently behind
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*/
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OSCR = OSMR0 - LATCH;
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}
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#else
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#define pxa_timer_suspend NULL
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#define pxa_timer_resume NULL
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#endif
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struct sys_timer pxa_timer = {
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.init = pxa_timer_init,
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.suspend = pxa_timer_suspend,
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.resume = pxa_timer_resume,
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2005-09-01 13:48:40 +02:00
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#ifdef CONFIG_NO_IDLE_HZ
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.dyn_tick = &pxa_dyn_tick,
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#endif
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2005-04-17 00:20:36 +02:00
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};
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