2009-03-24 15:10:15 +01:00
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/*
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* arch/arm/mach-kirkwood/cpuidle.c
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*
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* CPU idle Marvell Kirkwood SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* The cpu idle uses wait-for-interrupt and DDR self refresh in order
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* to implement two idle states -
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* #1 wait-for-interrupt
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* #2 wait-for-interrupt and DDR self refresh
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/cpuidle.h>
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#include <linux/io.h>
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#include <asm/proc-fns.h>
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#include <mach/kirkwood.h>
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#define KIRKWOOD_MAX_STATES 2
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static struct cpuidle_driver kirkwood_idle_driver = {
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.name = "kirkwood_idle",
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.owner = THIS_MODULE,
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};
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static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
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/* Actual code that puts the SoC in different idle states */
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static int kirkwood_enter_idle(struct cpuidle_device *dev,
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2011-10-28 12:50:09 +02:00
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int index)
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2009-03-24 15:10:15 +01:00
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{
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struct timeval before, after;
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int idle_time;
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local_irq_disable();
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do_gettimeofday(&before);
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2011-10-28 12:50:09 +02:00
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if (index == 0)
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2009-03-24 15:10:15 +01:00
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/* Wait for interrupt state */
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cpu_do_idle();
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2011-10-28 12:50:09 +02:00
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else if (index == 1) {
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2009-03-24 15:10:15 +01:00
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/*
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* Following write will put DDR in self refresh.
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* Note that we have 256 cycles before DDR puts it
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* self in self-refresh, so the wait-for-interrupt
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* call afterwards won't get the DDR from self refresh
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* mode.
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*/
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writel(0x7, DDR_OPERATION_BASE);
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cpu_do_idle();
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}
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do_gettimeofday(&after);
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local_irq_enable();
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idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
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(after.tv_usec - before.tv_usec);
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2011-10-28 12:50:09 +02:00
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/* Update last residency */
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dev->last_residency = idle_time;
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return index;
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2009-03-24 15:10:15 +01:00
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}
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/* Initialize CPU idle by registering the idle states */
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static int kirkwood_init_cpuidle(void)
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{
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struct cpuidle_device *device;
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cpuidle_register_driver(&kirkwood_idle_driver);
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device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
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device->state_count = KIRKWOOD_MAX_STATES;
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/* Wait for interrupt state */
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device->states[0].enter = kirkwood_enter_idle;
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device->states[0].exit_latency = 1;
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device->states[0].target_residency = 10000;
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device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
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strcpy(device->states[0].name, "WFI");
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strcpy(device->states[0].desc, "Wait for interrupt");
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/* Wait for interrupt and DDR self refresh state */
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device->states[1].enter = kirkwood_enter_idle;
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device->states[1].exit_latency = 10;
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device->states[1].target_residency = 10000;
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device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
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strcpy(device->states[1].name, "DDR SR");
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strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
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if (cpuidle_register_device(device)) {
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printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
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return -EIO;
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}
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return 0;
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}
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device_initcall(kirkwood_init_cpuidle);
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