[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
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/*
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|
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* arch/arm/mach-kirkwood/common.c
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|
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*
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|
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* Core functions for Marvell Kirkwood SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/serial_8250.h>
|
|
|
|
#include <linux/ata_platform.h>
|
2009-06-01 21:36:36 +02:00
|
|
|
#include <linux/mtd/nand.h>
|
2011-05-15 13:32:48 +02:00
|
|
|
#include <linux/dma-mapping.h>
|
2011-12-15 08:15:07 +01:00
|
|
|
#include <linux/clk-provider.h>
|
|
|
|
#include <linux/spinlock.h>
|
2008-09-25 16:23:48 +02:00
|
|
|
#include <net/dsa.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
#include <asm/page.h>
|
|
|
|
#include <asm/timex.h>
|
2011-02-02 23:16:11 +01:00
|
|
|
#include <asm/kexec.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
#include <asm/mach/map.h>
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|
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#include <asm/mach/time.h>
|
2008-08-05 17:14:15 +02:00
|
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#include <mach/kirkwood.h>
|
2009-04-22 21:08:17 +02:00
|
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#include <mach/bridge-regs.h>
|
2010-05-31 13:49:12 +02:00
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|
#include <plat/audio.h>
|
2008-08-09 13:44:58 +02:00
|
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|
#include <plat/cache-feroceon-l2.h>
|
2009-02-14 09:15:55 +01:00
|
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|
#include <plat/mvsdio.h>
|
2008-08-09 13:44:58 +02:00
|
|
|
#include <plat/orion_nand.h>
|
2012-02-08 15:52:47 +01:00
|
|
|
#include <plat/ehci-orion.h>
|
2011-05-15 13:32:41 +02:00
|
|
|
#include <plat/common.h>
|
2008-08-09 13:44:58 +02:00
|
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|
#include <plat/time.h>
|
2011-12-07 21:48:06 +01:00
|
|
|
#include <plat/addr-map.h>
|
2011-12-15 08:15:07 +01:00
|
|
|
#include <plat/mv_xor.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
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#include "common.h"
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/*****************************************************************************
|
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* I/O Address Mapping
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****************************************************************************/
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static struct map_desc kirkwood_io_desc[] __initdata = {
|
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|
|
{
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.virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
|
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|
|
.length = KIRKWOOD_PCIE_IO_SIZE,
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|
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.type = MT_DEVICE,
|
2010-06-08 13:21:34 +02:00
|
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|
}, {
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.virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
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|
|
.length = KIRKWOOD_PCIE1_IO_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
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}, {
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.virtual = KIRKWOOD_REGS_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
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.length = KIRKWOOD_REGS_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init kirkwood_map_io(void)
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|
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{
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iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
|
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}
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2009-03-22 16:30:32 +01:00
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/*
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|
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* Default clock control bits. Any bit _not_ set in this variable
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|
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* will be cleared from the hardware after platform devices have been
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* registered. Some reserved bits must be set to 1.
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*/
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unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
|
2011-05-15 13:32:44 +02:00
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
|
2011-12-15 08:15:07 +01:00
|
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/*****************************************************************************
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* CLK tree
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****************************************************************************/
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static DEFINE_SPINLOCK(gating_lock);
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static struct clk *tclk;
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static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
|
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|
|
{
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return clk_register_gate(NULL, name, "tclk", CLK_IGNORE_UNUSED,
|
|
|
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(void __iomem *)CLOCK_GATING_CTRL,
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bit_idx, 0, &gating_lock);
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|
|
}
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void __init kirkwood_clk_init(void)
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|
|
{
|
2011-12-24 01:24:24 +01:00
|
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|
struct clk *runit, *ge0, *ge1;
|
2012-04-06 17:17:26 +02:00
|
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|
|
2011-12-15 08:15:07 +01:00
|
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|
tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
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|
|
CLK_IS_ROOT, kirkwood_tclk);
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|
|
|
2012-04-06 17:17:26 +02:00
|
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|
runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT);
|
2011-12-24 01:24:24 +01:00
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ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0);
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ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1);
|
2011-12-15 08:15:07 +01:00
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kirkwood_register_gate("sata0", CGC_BIT_SATA0);
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kirkwood_register_gate("sata1", CGC_BIT_SATA1);
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kirkwood_register_gate("usb0", CGC_BIT_USB0);
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kirkwood_register_gate("sdio", CGC_BIT_SDIO);
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kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
|
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kirkwood_register_gate("xor0", CGC_BIT_XOR0);
|
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kirkwood_register_gate("xor1", CGC_BIT_XOR1);
|
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kirkwood_register_gate("pex0", CGC_BIT_PEX0);
|
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kirkwood_register_gate("pex1", CGC_BIT_PEX1);
|
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kirkwood_register_gate("audio", CGC_BIT_AUDIO);
|
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kirkwood_register_gate("tdm", CGC_BIT_TDM);
|
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|
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kirkwood_register_gate("tsu", CGC_BIT_TSU);
|
2012-04-06 17:17:26 +02:00
|
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|
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/* clkdev entries, mapping clks to devices */
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orion_clkdev_add(NULL, "orion_spi.0", runit);
|
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|
|
orion_clkdev_add(NULL, "orion_spi.1", runit);
|
2011-12-24 01:24:24 +01:00
|
|
|
orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
|
|
|
|
orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
|
2011-12-15 08:15:07 +01:00
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
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|
/*****************************************************************************
|
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|
|
* EHCI0
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****************************************************************************/
|
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void __init kirkwood_ehci_init(void)
|
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|
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{
|
2009-03-22 16:30:32 +01:00
|
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|
kirkwood_clk_ctrl |= CGC_USB0;
|
2012-02-08 15:52:47 +01:00
|
|
|
orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* GE00
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
|
|
|
{
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_GE0;
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
|
2011-12-07 21:48:08 +01:00
|
|
|
orion_ge00_init(eth_data,
|
2011-05-15 13:32:44 +02:00
|
|
|
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
|
2011-12-24 01:24:24 +01:00
|
|
|
IRQ_KIRKWOOD_GE00_ERR);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-10-19 23:10:14 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* GE01
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
|
|
|
|
{
|
2011-05-15 13:32:44 +02:00
|
|
|
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_GE1;
|
2008-10-19 23:10:14 +02:00
|
|
|
|
2011-12-07 21:48:08 +01:00
|
|
|
orion_ge01_init(eth_data,
|
2011-05-15 13:32:44 +02:00
|
|
|
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
|
2011-12-24 01:24:24 +01:00
|
|
|
IRQ_KIRKWOOD_GE01_ERR);
|
2008-10-19 23:10:14 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-09-25 16:23:48 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* Ethernet switch
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
|
|
|
|
{
|
2011-05-15 13:32:44 +02:00
|
|
|
orion_ge00_switch_init(d, irq);
|
2008-09-25 16:23:48 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-06-01 21:36:36 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* NAND flash
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_nand_resource = {
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
.start = KIRKWOOD_NAND_MEM_PHYS_BASE,
|
|
|
|
.end = KIRKWOOD_NAND_MEM_PHYS_BASE +
|
|
|
|
KIRKWOOD_NAND_MEM_SIZE - 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct orion_nand_data kirkwood_nand_data = {
|
|
|
|
.cle = 0,
|
|
|
|
.ale = 1,
|
|
|
|
.width = 8,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_nand_flash = {
|
|
|
|
.name = "orion_nand",
|
|
|
|
.id = -1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_nand_data,
|
|
|
|
},
|
|
|
|
.resource = &kirkwood_nand_resource,
|
|
|
|
.num_resources = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
|
|
|
|
int chip_delay)
|
|
|
|
{
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_RUNIT;
|
2009-06-01 21:36:36 +02:00
|
|
|
kirkwood_nand_data.parts = parts;
|
|
|
|
kirkwood_nand_data.nr_parts = nr_parts;
|
|
|
|
kirkwood_nand_data.chip_delay = chip_delay;
|
|
|
|
platform_device_register(&kirkwood_nand_flash);
|
|
|
|
}
|
|
|
|
|
2010-04-20 11:26:19 +02:00
|
|
|
void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
|
|
|
|
int (*dev_ready)(struct mtd_info *))
|
|
|
|
{
|
|
|
|
kirkwood_clk_ctrl |= CGC_RUNIT;
|
|
|
|
kirkwood_nand_data.parts = parts;
|
|
|
|
kirkwood_nand_data.nr_parts = nr_parts;
|
|
|
|
kirkwood_nand_data.dev_ready = dev_ready;
|
|
|
|
platform_device_register(&kirkwood_nand_flash);
|
|
|
|
}
|
2009-06-01 21:36:36 +02:00
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* SoC RTC
|
|
|
|
****************************************************************************/
|
2012-03-07 00:55:04 +01:00
|
|
|
static void __init kirkwood_rtc_init(void)
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
{
|
2011-05-15 13:32:43 +02:00
|
|
|
orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* SATA
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
|
|
|
|
{
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_SATA0;
|
|
|
|
if (sata_data->n_ports > 1)
|
|
|
|
kirkwood_clk_ctrl |= CGC_SATA1;
|
2011-05-15 13:32:50 +02:00
|
|
|
|
2011-12-07 21:48:08 +01:00
|
|
|
orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-02-14 09:15:55 +01:00
|
|
|
/*****************************************************************************
|
|
|
|
* SD/SDIO/MMC
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource mvsdio_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = SDIO_PHYS_BASE,
|
|
|
|
.end = SDIO_PHYS_BASE + SZ_1K - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_KIRKWOOD_SDIO,
|
|
|
|
.end = IRQ_KIRKWOOD_SDIO,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2011-05-15 13:32:40 +02:00
|
|
|
static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
|
2009-02-14 09:15:55 +01:00
|
|
|
|
|
|
|
static struct platform_device kirkwood_sdio = {
|
|
|
|
.name = "mvsdio",
|
|
|
|
.id = -1,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &mvsdio_dmamask,
|
2011-05-15 13:32:40 +02:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
2009-02-14 09:15:55 +01:00
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(mvsdio_resources),
|
|
|
|
.resource = mvsdio_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
|
|
|
|
{
|
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
2010-06-01 17:09:27 +02:00
|
|
|
if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
|
2009-02-14 09:15:55 +01:00
|
|
|
mvsdio_data->clock = 100000000;
|
|
|
|
else
|
|
|
|
mvsdio_data->clock = 200000000;
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_SDIO;
|
2009-02-14 09:15:55 +01:00
|
|
|
kirkwood_sdio.dev.platform_data = mvsdio_data;
|
|
|
|
platform_device_register(&kirkwood_sdio);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-08-09 15:38:18 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* SPI
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_spi_init()
|
|
|
|
{
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_RUNIT;
|
2012-04-06 17:17:26 +02:00
|
|
|
orion_spi_init(SPI_PHYS_BASE);
|
2008-08-09 15:38:18 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-03-23 19:13:21 +01:00
|
|
|
/*****************************************************************************
|
|
|
|
* I2C
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_i2c_init(void)
|
|
|
|
{
|
2011-05-15 13:32:45 +02:00
|
|
|
orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
|
2009-03-23 19:13:21 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* UART0
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void __init kirkwood_uart0_init(void)
|
|
|
|
{
|
2011-05-15 13:32:41 +02:00
|
|
|
orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
|
|
|
|
IRQ_KIRKWOOD_UART_0, kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* UART1
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_uart1_init(void)
|
|
|
|
{
|
2011-05-15 13:32:41 +02:00
|
|
|
orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
|
|
|
|
IRQ_KIRKWOOD_UART_1, kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
|
2009-06-03 21:24:36 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* Cryptographic Engines and Security Accelerator (CESA)
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_crypto_init(void)
|
|
|
|
{
|
|
|
|
kirkwood_clk_ctrl |= CGC_CRYPTO;
|
2011-05-15 13:32:51 +02:00
|
|
|
orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
|
|
|
|
KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
|
2009-06-03 21:24:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-06-23 17:26:07 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* XOR0
|
|
|
|
****************************************************************************/
|
2012-02-29 18:39:08 +01:00
|
|
|
void __init kirkwood_xor0_init(void)
|
2008-06-23 17:26:07 +02:00
|
|
|
{
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_XOR0;
|
2011-05-15 13:32:48 +02:00
|
|
|
|
2011-12-07 21:48:08 +01:00
|
|
|
orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
|
2011-05-15 13:32:48 +02:00
|
|
|
IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
|
2008-06-23 17:26:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* XOR1
|
|
|
|
****************************************************************************/
|
2012-02-29 18:39:08 +01:00
|
|
|
void __init kirkwood_xor1_init(void)
|
2008-06-23 17:26:07 +02:00
|
|
|
{
|
2009-03-22 16:30:32 +01:00
|
|
|
kirkwood_clk_ctrl |= CGC_XOR1;
|
2011-05-15 13:32:48 +02:00
|
|
|
|
|
|
|
orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
|
|
|
|
IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
|
2008-06-23 17:26:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-06-01 13:38:34 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* Watchdog
|
|
|
|
****************************************************************************/
|
2012-02-29 18:39:08 +01:00
|
|
|
void __init kirkwood_wdt_init(void)
|
2009-06-01 13:38:34 +02:00
|
|
|
{
|
2011-05-15 13:32:47 +02:00
|
|
|
orion_wdt_init(kirkwood_tclk);
|
2009-06-01 13:38:34 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* Time handling
|
|
|
|
****************************************************************************/
|
2010-10-15 16:50:26 +02:00
|
|
|
void __init kirkwood_init_early(void)
|
|
|
|
{
|
|
|
|
orion_time_set_base(TIMER_VIRT_BASE);
|
|
|
|
}
|
|
|
|
|
2008-09-15 00:56:38 +02:00
|
|
|
int kirkwood_tclk;
|
|
|
|
|
2011-03-03 21:08:53 +01:00
|
|
|
static int __init kirkwood_find_tclk(void)
|
2008-09-15 00:56:38 +02:00
|
|
|
{
|
2008-09-15 09:40:35 +02:00
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
2010-06-01 17:09:27 +02:00
|
|
|
|
2010-10-21 11:42:28 +02:00
|
|
|
if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
|
|
|
|
if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
|
|
|
|
return 200000000;
|
2008-09-15 09:40:35 +02:00
|
|
|
|
2008-09-15 00:56:38 +02:00
|
|
|
return 166666667;
|
|
|
|
}
|
|
|
|
|
2009-11-05 16:29:54 +01:00
|
|
|
static void __init kirkwood_timer_init(void)
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
{
|
2008-09-15 00:56:38 +02:00
|
|
|
kirkwood_tclk = kirkwood_find_tclk();
|
2010-10-15 16:50:26 +02:00
|
|
|
|
|
|
|
orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
|
|
|
|
IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
struct sys_timer kirkwood_timer = {
|
|
|
|
.init = kirkwood_timer_init,
|
|
|
|
};
|
|
|
|
|
2010-05-31 13:49:12 +02:00
|
|
|
/*****************************************************************************
|
|
|
|
* Audio
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_i2s_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = AUDIO_PHYS_BASE,
|
|
|
|
.end = AUDIO_PHYS_BASE + SZ_16K - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_KIRKWOOD_I2S,
|
|
|
|
.end = IRQ_KIRKWOOD_I2S,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
|
|
|
|
.burst = 128,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_i2s_device = {
|
|
|
|
.name = "kirkwood-i2s",
|
|
|
|
.id = -1,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
|
|
|
|
.resource = kirkwood_i2s_resources,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_i2s_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2010-03-17 21:15:21 +01:00
|
|
|
static struct platform_device kirkwood_pcm_device = {
|
2010-08-30 16:00:05 +02:00
|
|
|
.name = "kirkwood-pcm-audio",
|
2010-03-17 21:15:21 +01:00
|
|
|
.id = -1,
|
|
|
|
};
|
|
|
|
|
2010-05-31 13:49:12 +02:00
|
|
|
void __init kirkwood_audio_init(void)
|
|
|
|
{
|
|
|
|
kirkwood_clk_ctrl |= CGC_AUDIO;
|
|
|
|
platform_device_register(&kirkwood_i2s_device);
|
2010-03-17 21:15:21 +01:00
|
|
|
platform_device_register(&kirkwood_pcm_device);
|
2010-05-31 13:49:12 +02:00
|
|
|
}
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* General
|
|
|
|
****************************************************************************/
|
2008-09-15 09:40:35 +02:00
|
|
|
/*
|
|
|
|
* Identify device ID and revision.
|
|
|
|
*/
|
2012-02-29 18:39:08 +01:00
|
|
|
char * __init kirkwood_id(void)
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
{
|
2008-09-15 09:40:35 +02:00
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
|
|
|
|
|
|
|
if (dev == MV88F6281_DEV_ID) {
|
|
|
|
if (rev == MV88F6281_REV_Z0)
|
|
|
|
return "MV88F6281-Z0";
|
|
|
|
else if (rev == MV88F6281_REV_A0)
|
|
|
|
return "MV88F6281-A0";
|
2009-06-09 11:11:02 +02:00
|
|
|
else if (rev == MV88F6281_REV_A1)
|
|
|
|
return "MV88F6281-A1";
|
2008-09-15 09:40:35 +02:00
|
|
|
else
|
|
|
|
return "MV88F6281-Rev-Unsupported";
|
|
|
|
} else if (dev == MV88F6192_DEV_ID) {
|
|
|
|
if (rev == MV88F6192_REV_Z0)
|
|
|
|
return "MV88F6192-Z0";
|
|
|
|
else if (rev == MV88F6192_REV_A0)
|
|
|
|
return "MV88F6192-A0";
|
2010-06-01 17:09:26 +02:00
|
|
|
else if (rev == MV88F6192_REV_A1)
|
|
|
|
return "MV88F6192-A1";
|
2008-09-15 09:40:35 +02:00
|
|
|
else
|
|
|
|
return "MV88F6192-Rev-Unsupported";
|
|
|
|
} else if (dev == MV88F6180_DEV_ID) {
|
|
|
|
if (rev == MV88F6180_REV_A0)
|
|
|
|
return "MV88F6180-Rev-A0";
|
2010-06-01 17:09:26 +02:00
|
|
|
else if (rev == MV88F6180_REV_A1)
|
|
|
|
return "MV88F6180-Rev-A1";
|
2008-09-15 09:40:35 +02:00
|
|
|
else
|
|
|
|
return "MV88F6180-Rev-Unsupported";
|
2010-06-01 17:09:27 +02:00
|
|
|
} else if (dev == MV88F6282_DEV_ID) {
|
|
|
|
if (rev == MV88F6282_REV_A0)
|
|
|
|
return "MV88F6282-Rev-A0";
|
2011-11-03 13:57:43 +01:00
|
|
|
else if (rev == MV88F6282_REV_A1)
|
|
|
|
return "MV88F6282-Rev-A1";
|
2010-06-01 17:09:27 +02:00
|
|
|
else
|
|
|
|
return "MV88F6282-Rev-Unsupported";
|
2008-09-15 09:40:35 +02:00
|
|
|
} else {
|
|
|
|
return "Device-Unknown";
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-02-29 18:39:08 +01:00
|
|
|
void __init kirkwood_l2_init(void)
|
2008-06-23 14:05:08 +02:00
|
|
|
{
|
2008-09-23 14:28:10 +02:00
|
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
|
|
|
|
writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
|
|
feroceon_l2_init(1);
|
|
|
|
#else
|
|
|
|
writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
|
|
feroceon_l2_init(0);
|
|
|
|
#endif
|
2008-06-23 14:05:08 +02:00
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
void __init kirkwood_init(void)
|
|
|
|
{
|
|
|
|
printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
|
2008-09-15 00:56:38 +02:00
|
|
|
kirkwood_id(), kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
|
2009-11-12 20:31:14 +01:00
|
|
|
/*
|
|
|
|
* Disable propagation of mbus errors to the CPU local bus,
|
|
|
|
* as this causes mbus errors (which can occur for example
|
|
|
|
* for PCI aborts) to throw CPU aborts, which we're not set
|
|
|
|
* up to deal with.
|
|
|
|
*/
|
|
|
|
writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
kirkwood_setup_cpu_mbus();
|
|
|
|
|
|
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2
|
2008-09-23 14:28:10 +02:00
|
|
|
kirkwood_l2_init();
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
#endif
|
2009-02-27 04:55:59 +01:00
|
|
|
|
2011-12-15 08:15:07 +01:00
|
|
|
/* Setup root of clk tree */
|
|
|
|
kirkwood_clk_init();
|
|
|
|
|
2009-02-27 04:55:59 +01:00
|
|
|
/* internal devices that every board has */
|
|
|
|
kirkwood_rtc_init();
|
2009-06-01 13:38:34 +02:00
|
|
|
kirkwood_wdt_init();
|
2009-02-27 04:55:59 +01:00
|
|
|
kirkwood_xor0_init();
|
|
|
|
kirkwood_xor1_init();
|
2009-06-03 21:24:36 +02:00
|
|
|
kirkwood_crypto_init();
|
2011-02-02 23:16:11 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_KEXEC
|
|
|
|
kexec_reinit = kirkwood_enable_pcie;
|
|
|
|
#endif
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
|
|
|
}
|
2009-03-22 16:30:32 +01:00
|
|
|
|
|
|
|
static int __init kirkwood_clock_gate(void)
|
|
|
|
{
|
|
|
|
unsigned int curr = readl(CLOCK_GATING_CTRL);
|
2010-06-08 13:21:34 +02:00
|
|
|
u32 dev, rev;
|
2009-03-22 16:30:32 +01:00
|
|
|
|
2010-06-08 13:21:34 +02:00
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
2009-03-22 16:30:32 +01:00
|
|
|
printk(KERN_DEBUG "Gating clock of unused units\n");
|
|
|
|
printk(KERN_DEBUG "before: 0x%08x\n", curr);
|
|
|
|
|
|
|
|
/* Make sure those units are accessible */
|
2010-06-08 13:21:34 +02:00
|
|
|
writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
|
2009-03-22 16:30:32 +01:00
|
|
|
|
|
|
|
/* For SATA: first shutdown the phy */
|
|
|
|
if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
|
|
|
|
/* Disable PLL and IVREF */
|
|
|
|
writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
|
|
|
|
/* Disable PHY */
|
|
|
|
writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
|
|
|
|
}
|
|
|
|
if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
|
|
|
|
/* Disable PLL and IVREF */
|
|
|
|
writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
|
|
|
|
/* Disable PHY */
|
|
|
|
writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* For PCIe: first shutdown the phy */
|
|
|
|
if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
|
|
|
|
writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
|
|
|
|
while (1)
|
|
|
|
if (readl(PCIE_STATUS) & 0x1)
|
|
|
|
break;
|
|
|
|
writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
|
|
|
|
}
|
|
|
|
|
2010-06-08 13:21:34 +02:00
|
|
|
/* For PCIe 1: first shutdown the phy */
|
|
|
|
if (dev == MV88F6282_DEV_ID) {
|
|
|
|
if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
|
|
|
|
writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
|
|
|
|
while (1)
|
|
|
|
if (readl(PCIE1_STATUS) & 0x1)
|
|
|
|
break;
|
|
|
|
writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
|
|
|
|
}
|
|
|
|
} else /* keep this bit set for devices that don't have PCIe1 */
|
|
|
|
kirkwood_clk_ctrl |= CGC_PEX1;
|
|
|
|
|
2009-03-22 16:30:32 +01:00
|
|
|
/* Now gate clock the required units */
|
|
|
|
writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
|
|
|
|
printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
late_initcall(kirkwood_clock_gate);
|
2011-11-05 11:03:47 +01:00
|
|
|
|
|
|
|
void kirkwood_restart(char mode, const char *cmd)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Enable soft reset to assert RSTOUTn.
|
|
|
|
*/
|
|
|
|
writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Assert soft reset.
|
|
|
|
*/
|
|
|
|
writel(SOFT_RESET, SYSTEM_SOFT_RESET);
|
|
|
|
|
|
|
|
while (1)
|
|
|
|
;
|
|
|
|
}
|