2012-03-07 21:01:28 +01:00
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#ifndef __MACH_IMX_CLK_H
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#define __MACH_IMX_CLK_H
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#include <linux/spinlock.h>
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#include <linux/clk-provider.h>
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2012-09-11 08:50:00 +02:00
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extern spinlock_t imx_ccm_lock;
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2012-03-07 21:01:28 +01:00
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2013-07-04 11:57:17 +02:00
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extern void imx_cscmr1_fixup(u32 *val);
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2012-03-09 09:11:55 +01:00
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struct clk *imx_clk_pllv1(const char *name, const char *parent,
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2012-03-07 21:01:28 +01:00
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void __iomem *base);
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2012-03-19 12:36:10 +01:00
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struct clk *imx_clk_pllv2(const char *name, const char *parent,
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void __iomem *base);
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2012-04-04 10:02:28 +02:00
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enum imx_pllv3_type {
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IMX_PLLV3_GENERIC,
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IMX_PLLV3_SYS,
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IMX_PLLV3_USB,
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IMX_PLLV3_AV,
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IMX_PLLV3_ENET,
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};
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struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
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2012-11-22 10:18:41 +01:00
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const char *parent_name, void __iomem *base, u32 div_mask);
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2012-04-04 10:02:28 +02:00
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2011-04-19 08:33:45 +02:00
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struct clk *clk_register_gate2(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock);
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2013-04-23 14:16:59 +02:00
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struct clk * imx_obtain_fixed_clock(
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const char *name, unsigned long rate);
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2011-04-19 08:33:45 +02:00
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static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
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void __iomem *reg, u8 shift)
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{
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return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
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shift, 0, &imx_ccm_lock);
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}
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2012-04-04 10:07:53 +02:00
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struct clk *imx_clk_pfd(const char *name, const char *parent_name,
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void __iomem *reg, u8 idx);
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2012-04-04 10:20:56 +02:00
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struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
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void __iomem *reg, u8 shift, u8 width,
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void __iomem *busy_reg, u8 busy_shift);
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struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
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u8 width, void __iomem *busy_reg, u8 busy_shift,
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const char **parent_names, int num_parents);
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2013-07-04 11:22:26 +02:00
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struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
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void __iomem *reg, u8 shift, u8 width,
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void (*fixup)(u32 *val));
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2013-07-04 11:35:46 +02:00
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struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents,
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int num_parents, void (*fixup)(u32 *val));
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2012-03-07 21:01:28 +01:00
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static inline struct clk *imx_clk_fixed(const char *name, int rate)
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{
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return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
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}
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static inline struct clk *imx_clk_divider(const char *name, const char *parent,
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void __iomem *reg, u8 shift, u8 width)
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{
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return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
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reg, shift, width, 0, &imx_ccm_lock);
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}
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2013-03-27 18:30:40 +01:00
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static inline struct clk *imx_clk_divider_flags(const char *name,
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const char *parent, void __iomem *reg, u8 shift, u8 width,
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unsigned long flags)
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{
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return clk_register_divider(NULL, name, parent, flags,
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reg, shift, width, 0, &imx_ccm_lock);
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}
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2012-03-07 21:01:28 +01:00
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static inline struct clk *imx_clk_gate(const char *name, const char *parent,
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void __iomem *reg, u8 shift)
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{
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return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
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shift, 0, &imx_ccm_lock);
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}
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static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents, int num_parents)
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{
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2013-07-29 13:25:01 +02:00
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return clk_register_mux(NULL, name, parents, num_parents,
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CLK_SET_RATE_NO_REPARENT, reg, shift,
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2012-03-07 21:01:28 +01:00
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width, 0, &imx_ccm_lock);
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}
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2013-03-27 18:30:40 +01:00
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static inline struct clk *imx_clk_mux_flags(const char *name,
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void __iomem *reg, u8 shift, u8 width, const char **parents,
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int num_parents, unsigned long flags)
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{
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return clk_register_mux(NULL, name, parents, num_parents,
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2013-07-29 13:25:01 +02:00
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flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
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2013-03-27 18:30:40 +01:00
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&imx_ccm_lock);
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}
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2012-03-07 21:01:28 +01:00
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static inline struct clk *imx_clk_fixed_factor(const char *name,
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const char *parent, unsigned int mult, unsigned int div)
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{
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return clk_register_fixed_factor(NULL, name, parent,
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CLK_SET_RATE_PARENT, mult, div);
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}
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#endif
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