2009-04-28 04:52:28 +02:00
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/*
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* xHCI host controller driver PCI Bus Glue.
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*
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* Copyright (C) 2008 Intel Corp.
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*
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* Author: Sarah Sharp
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* Some code borrowed from the Linux EHCI driver.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/pci.h>
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#include "xhci.h"
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2009-08-07 23:04:55 +02:00
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/* Device for a quirk */
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#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
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#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
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2009-04-28 04:52:28 +02:00
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static const char hcd_name[] = "xhci_hcd";
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/* called after powerup, by probe or system-pm "wakeup" */
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static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
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{
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/*
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* TODO: Implement finding debug ports later.
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* TODO: see if there are any quirks that need to be added to handle
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* new extended capabilities.
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*/
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/* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
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if (!pci_set_mwi(pdev))
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xhci_dbg(xhci, "MWI active\n");
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xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
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return 0;
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}
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/* called during probe() after chip reset completes */
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static int xhci_pci_setup(struct usb_hcd *hcd)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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int retval;
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2010-07-30 07:13:22 +02:00
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u32 temp;
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2009-04-28 04:52:28 +02:00
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2010-05-19 01:05:21 +02:00
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hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
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2009-08-24 15:44:30 +02:00
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2009-04-28 04:52:28 +02:00
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xhci->cap_regs = hcd->regs;
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xhci->op_regs = hcd->regs +
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HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
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xhci->run_regs = hcd->regs +
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(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
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/* Cache read-only capability registers */
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xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
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xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
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xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
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2009-09-04 19:53:20 +02:00
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xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
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xhci->hci_version = HC_VERSION(xhci->hcc_params);
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2009-04-28 04:52:28 +02:00
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xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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xhci_print_registers(xhci);
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2009-08-07 23:04:55 +02:00
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/* Look for vendor-specific quirks */
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if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
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pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
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pdev->revision == 0x0) {
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xhci->quirks |= XHCI_RESET_EP_QUIRK;
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xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
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" endpoint cmd after reset endpoint\n");
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}
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2010-05-24 22:25:28 +02:00
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if (pdev->vendor == PCI_VENDOR_ID_NEC)
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xhci->quirks |= XHCI_NEC_HOST;
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2009-08-07 23:04:55 +02:00
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2009-04-28 04:52:28 +02:00
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/* Make sure the HC is halted. */
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retval = xhci_halt(xhci);
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if (retval)
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return retval;
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xhci_dbg(xhci, "Resetting HCD\n");
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/* Reset the internal HC memory state and registers. */
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retval = xhci_reset(xhci);
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if (retval)
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return retval;
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xhci_dbg(xhci, "Reset complete\n");
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2010-07-30 07:13:22 +02:00
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temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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if (HCC_64BIT_ADDR(temp)) {
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xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
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} else {
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
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}
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2009-04-28 04:52:28 +02:00
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xhci_dbg(xhci, "Calling HCD init\n");
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/* Initialize HCD and host controller data structures. */
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retval = xhci_init(hcd);
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if (retval)
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return retval;
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xhci_dbg(xhci, "Called HCD init\n");
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pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
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xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
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/* Find any debug ports */
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return xhci_pci_reinit(xhci, pdev);
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}
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static const struct hc_driver xhci_pci_hc_driver = {
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.description = hcd_name,
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.product_desc = "xHCI Host Controller",
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.hcd_priv_size = sizeof(struct xhci_hcd),
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/*
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* generic hardware linkage
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*/
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2009-04-28 04:53:56 +02:00
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.irq = xhci_irq,
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2009-04-28 04:52:28 +02:00
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.flags = HCD_MEMORY | HCD_USB3,
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/*
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* basic lifecycle operations
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*/
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.reset = xhci_pci_setup,
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.start = xhci_run,
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/* suspend and resume implemented later */
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.stop = xhci_stop,
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.shutdown = xhci_shutdown,
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2009-04-28 04:57:38 +02:00
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/*
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* managing i/o requests and associated device resources
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*/
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2009-04-28 04:58:01 +02:00
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.urb_enqueue = xhci_urb_enqueue,
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.urb_dequeue = xhci_urb_dequeue,
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2009-04-28 04:57:38 +02:00
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.alloc_dev = xhci_alloc_dev,
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.free_dev = xhci_free_dev,
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2010-04-05 19:55:58 +02:00
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.alloc_streams = xhci_alloc_streams,
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.free_streams = xhci_free_streams,
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USB: xhci: Bandwidth allocation support
Since the xHCI host controller hardware (xHC) has an internal schedule, it
needs a better representation of what devices are consuming bandwidth on
the bus. Each device is represented by a device context, with data about
the device, endpoints, and pointers to each endpoint ring.
We need to update the endpoint information for a device context before a
new configuration or alternate interface setting is selected. We setup an
input device context with modified endpoint information and newly
allocated endpoint rings, and then submit a Configure Endpoint Command to
the hardware.
The host controller can reject the new configuration if it exceeds the bus
bandwidth, or the host controller doesn't have enough internal resources
for the configuration. If the command fails, we still have the older
device context with the previous configuration. If the command succeeds,
we free the old endpoint rings.
The root hub isn't a real device, so always say yes to any bandwidth
changes for it.
The USB core will enable, disable, and then enable endpoint 0 several
times during the initialization sequence. The device will always have an
endpoint ring for endpoint 0 and bandwidth allocated for that, unless the
device is disconnected or gets a SetAddress 0 request. So we don't pay
attention for when xhci_check_bandwidth() is called for a re-add of
endpoint 0.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 04:58:38 +02:00
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.add_endpoint = xhci_add_endpoint,
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.drop_endpoint = xhci_drop_endpoint,
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2009-07-27 21:03:15 +02:00
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.endpoint_reset = xhci_endpoint_reset,
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USB: xhci: Bandwidth allocation support
Since the xHCI host controller hardware (xHC) has an internal schedule, it
needs a better representation of what devices are consuming bandwidth on
the bus. Each device is represented by a device context, with data about
the device, endpoints, and pointers to each endpoint ring.
We need to update the endpoint information for a device context before a
new configuration or alternate interface setting is selected. We setup an
input device context with modified endpoint information and newly
allocated endpoint rings, and then submit a Configure Endpoint Command to
the hardware.
The host controller can reject the new configuration if it exceeds the bus
bandwidth, or the host controller doesn't have enough internal resources
for the configuration. If the command fails, we still have the older
device context with the previous configuration. If the command succeeds,
we free the old endpoint rings.
The root hub isn't a real device, so always say yes to any bandwidth
changes for it.
The USB core will enable, disable, and then enable endpoint 0 several
times during the initialization sequence. The device will always have an
endpoint ring for endpoint 0 and bandwidth allocated for that, unless the
device is disconnected or gets a SetAddress 0 request. So we don't pay
attention for when xhci_check_bandwidth() is called for a re-add of
endpoint 0.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 04:58:38 +02:00
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.check_bandwidth = xhci_check_bandwidth,
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.reset_bandwidth = xhci_reset_bandwidth,
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2009-04-28 04:57:38 +02:00
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.address_device = xhci_address_device,
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2009-09-04 19:53:24 +02:00
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.update_hub_device = xhci_update_hub_device,
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2010-10-14 16:22:48 +02:00
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.reset_device = xhci_discover_or_reset_device,
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2009-04-28 04:57:38 +02:00
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2009-04-28 04:52:28 +02:00
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/*
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* scheduling support
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*/
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.get_frame_number = xhci_get_frame,
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2009-04-28 04:57:12 +02:00
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/* Root hub support */
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.hub_control = xhci_hub_control,
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.hub_status_data = xhci_hub_status_data,
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2009-04-28 04:52:28 +02:00
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};
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/*-------------------------------------------------------------------------*/
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/* PCI driver selection metadata; PCI hotplugging uses this */
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static const struct pci_device_id pci_ids[] = { {
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/* handle any USB 3.0 xHCI controller */
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PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
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.driver_data = (unsigned long) &xhci_pci_hc_driver,
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},
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{ /* end: all zeroes */ }
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};
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MODULE_DEVICE_TABLE(pci, pci_ids);
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/* pci driver glue; this is a "new style" PCI driver module */
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static struct pci_driver xhci_pci_driver = {
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.name = (char *) hcd_name,
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.id_table = pci_ids,
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.probe = usb_hcd_pci_probe,
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.remove = usb_hcd_pci_remove,
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/* suspend and resume implemented later */
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.shutdown = usb_hcd_pci_shutdown,
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};
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2010-04-19 17:53:50 +02:00
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int xhci_register_pci(void)
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2009-04-28 04:52:28 +02:00
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{
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return pci_register_driver(&xhci_pci_driver);
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}
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2010-04-19 17:53:50 +02:00
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void xhci_unregister_pci(void)
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2009-04-28 04:52:28 +02:00
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{
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pci_unregister_driver(&xhci_pci_driver);
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}
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