2005-04-17 00:20:36 +02:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2000, 2001, 04 Keith M Wesolowski
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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#include <asm/bootinfo.h>
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extern struct pci_ops nile4_pci_ops;
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extern struct pci_ops gt64120_pci_ops;
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static struct resource lasat_pci_mem_resource = {
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.name = "LASAT PCI MEM",
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.start = 0x18000000,
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2005-07-03 21:12:05 +02:00
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.end = 0x19ffffff,
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2005-04-17 00:20:36 +02:00
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.flags = IORESOURCE_MEM,
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};
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static struct resource lasat_pci_io_resource = {
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.name = "LASAT PCI IO",
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.start = 0x1a000000,
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2005-07-03 21:12:05 +02:00
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.end = 0x1bffffff,
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2005-04-17 00:20:36 +02:00
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.flags = IORESOURCE_IO,
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};
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static struct pci_controller lasat_pci_controller = {
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.mem_resource = &lasat_pci_mem_resource,
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.io_resource = &lasat_pci_io_resource,
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};
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static int __init lasat_pci_setup(void)
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{
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2005-07-03 21:12:05 +02:00
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printk("PCI: starting\n");
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2005-04-17 00:20:36 +02:00
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2005-07-03 21:12:05 +02:00
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switch (mips_machtype) {
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case MACH_LASAT_100:
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2005-04-17 00:20:36 +02:00
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lasat_pci_controller.pci_ops = >64120_pci_ops;
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break;
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2005-07-03 21:12:05 +02:00
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case MACH_LASAT_200:
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2005-04-17 00:20:36 +02:00
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lasat_pci_controller.pci_ops = &nile4_pci_ops;
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break;
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2005-07-03 21:12:05 +02:00
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default:
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2005-04-17 00:20:36 +02:00
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panic("pcibios_init: mips_machtype incorrect");
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}
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register_pci_controller(&lasat_pci_controller);
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2005-06-21 15:56:30 +02:00
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return 0;
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2005-04-17 00:20:36 +02:00
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}
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2005-06-21 15:56:30 +02:00
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arch_initcall(lasat_pci_setup);
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2005-04-17 00:20:36 +02:00
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#define LASATINT_ETH1 0
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#define LASATINT_ETH0 1
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#define LASATINT_HDC 2
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#define LASATINT_COMP 3
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#define LASATINT_HDLC 4
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#define LASATINT_PCIA 5
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#define LASATINT_PCIB 6
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#define LASATINT_PCIC 7
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#define LASATINT_PCID 8
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int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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2005-07-03 21:12:05 +02:00
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switch (slot) {
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case 1:
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case 2:
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case 3:
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2005-07-03 21:16:13 +02:00
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return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
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2005-07-03 21:12:05 +02:00
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case 4:
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return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
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case 5:
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return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
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case 6:
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return LASATINT_HDC; /* IDE controller */
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default:
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return 0xff; /* Illegal */
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}
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2005-04-17 00:20:36 +02:00
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2005-07-03 21:12:05 +02:00
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return -1;
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2005-04-17 00:20:36 +02:00
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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