2018-08-24 10:31:08 +02:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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2018-11-04 20:29:28 +01:00
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* Copyright (C) 2012 ARM Ltd.
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2018-08-24 10:31:08 +02:00
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* Copyright (c) 2014 The Linux Foundation
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*/
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2018-11-04 20:29:28 +01:00
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#include <linux/dma-direct.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/dma-contiguous.h>
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#include <linux/init.h>
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#include <linux/genalloc.h>
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2018-08-24 10:31:08 +02:00
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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2019-06-03 09:14:31 +02:00
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struct page **dma_common_find_pages(void *cpu_addr)
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{
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struct vm_struct *area = find_vm_area(cpu_addr);
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if (!area || area->flags != VM_DMA_COHERENT)
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return NULL;
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return area->pages;
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}
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2018-08-24 10:31:08 +02:00
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static struct vm_struct *__dma_common_pages_remap(struct page **pages,
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2019-08-30 08:51:01 +02:00
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size_t size, pgprot_t prot, const void *caller)
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2018-08-24 10:31:08 +02:00
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{
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struct vm_struct *area;
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2019-08-30 08:51:01 +02:00
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area = get_vm_area_caller(size, VM_DMA_COHERENT, caller);
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2018-08-24 10:31:08 +02:00
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if (!area)
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return NULL;
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if (map_vm_area(area, prot, pages)) {
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vunmap(area->addr);
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return NULL;
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}
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return area;
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}
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/*
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* Remaps an array of PAGE_SIZE pages into another vm_area.
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* Cannot be used in non-sleeping contexts
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*/
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void *dma_common_pages_remap(struct page **pages, size_t size,
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2019-08-30 08:51:01 +02:00
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pgprot_t prot, const void *caller)
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2018-08-24 10:31:08 +02:00
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{
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struct vm_struct *area;
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2019-08-30 08:51:01 +02:00
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area = __dma_common_pages_remap(pages, size, prot, caller);
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2018-08-24 10:31:08 +02:00
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if (!area)
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return NULL;
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area->pages = pages;
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return area->addr;
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}
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/*
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* Remaps an allocated contiguous region into another vm_area.
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* Cannot be used in non-sleeping contexts
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*/
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void *dma_common_contiguous_remap(struct page *page, size_t size,
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pgprot_t prot, const void *caller)
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{
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int i;
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struct page **pages;
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struct vm_struct *area;
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pages = kmalloc(sizeof(struct page *) << get_order(size), GFP_KERNEL);
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if (!pages)
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return NULL;
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for (i = 0; i < (size >> PAGE_SHIFT); i++)
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pages[i] = nth_page(page, i);
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2019-08-30 08:51:01 +02:00
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area = __dma_common_pages_remap(pages, size, prot, caller);
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2018-08-24 10:31:08 +02:00
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kfree(pages);
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if (!area)
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return NULL;
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return area->addr;
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}
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/*
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* Unmaps a range previously mapped by dma_common_*_remap
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*/
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2019-08-30 08:51:01 +02:00
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void dma_common_free_remap(void *cpu_addr, size_t size)
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2018-08-24 10:31:08 +02:00
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{
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2019-10-05 10:23:30 +02:00
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struct vm_struct *area = find_vm_area(cpu_addr);
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2018-08-24 10:31:08 +02:00
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2019-10-05 10:23:30 +02:00
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if (!area || area->flags != VM_DMA_COHERENT) {
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2018-08-24 10:31:08 +02:00
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WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
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return;
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}
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unmap_kernel_range((unsigned long)cpu_addr, PAGE_ALIGN(size));
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vunmap(cpu_addr);
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}
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2018-11-04 20:29:28 +01:00
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#ifdef CONFIG_DMA_DIRECT_REMAP
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static struct gen_pool *atomic_pool __ro_after_init;
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#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
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static int __init early_coherent_pool(char *p)
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{
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atomic_pool_size = memparse(p, &p);
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return 0;
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}
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early_param("coherent_pool", early_coherent_pool);
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2019-08-03 11:42:15 +02:00
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static gfp_t dma_atomic_pool_gfp(void)
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{
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if (IS_ENABLED(CONFIG_ZONE_DMA))
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return GFP_DMA;
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if (IS_ENABLED(CONFIG_ZONE_DMA32))
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return GFP_DMA32;
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return GFP_KERNEL;
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}
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static int __init dma_atomic_pool_init(void)
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2018-11-04 20:29:28 +01:00
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{
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unsigned int pool_size_order = get_order(atomic_pool_size);
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unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
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struct page *page;
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void *addr;
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int ret;
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if (dev_get_cma_area(NULL))
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page = dma_alloc_from_contiguous(NULL, nr_pages,
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pool_size_order, false);
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else
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2019-08-03 11:42:15 +02:00
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page = alloc_pages(dma_atomic_pool_gfp(), pool_size_order);
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2018-11-04 20:29:28 +01:00
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if (!page)
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goto out;
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arch_dma_prep_coherent(page, atomic_pool_size);
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atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
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if (!atomic_pool)
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goto free_page;
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2019-08-30 08:51:01 +02:00
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addr = dma_common_contiguous_remap(page, atomic_pool_size,
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2019-08-03 11:42:15 +02:00
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pgprot_dmacoherent(PAGE_KERNEL),
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__builtin_return_address(0));
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2018-11-04 20:29:28 +01:00
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if (!addr)
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goto destroy_genpool;
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ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
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page_to_phys(page), atomic_pool_size, -1);
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if (ret)
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goto remove_mapping;
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gen_pool_set_algo(atomic_pool, gen_pool_first_fit_order_align, NULL);
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pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
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atomic_pool_size / 1024);
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return 0;
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remove_mapping:
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2019-08-30 08:51:01 +02:00
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dma_common_free_remap(addr, atomic_pool_size);
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2018-11-04 20:29:28 +01:00
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destroy_genpool:
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gen_pool_destroy(atomic_pool);
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atomic_pool = NULL;
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free_page:
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if (!dma_release_from_contiguous(NULL, page, nr_pages))
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__free_pages(page, pool_size_order);
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out:
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pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
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atomic_pool_size / 1024);
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return -ENOMEM;
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}
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2019-08-03 11:42:15 +02:00
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postcore_initcall(dma_atomic_pool_init);
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2018-11-04 20:29:28 +01:00
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bool dma_in_atomic_pool(void *start, size_t size)
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{
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dma-remap: Avoid de-referencing NULL atomic_pool
With architectures allowing the kernel to be placed almost arbitrarily
in memory (e.g.: ARM64), it is possible to have the kernel resides at
physical addresses above 4GB, resulting in neither the default CMA area,
nor the atomic pool from successfully allocating. This does not prevent
specific peripherals from working though, one example is XHCI, which
still operates correctly.
Trouble comes when the XHCI driver gets suspended and resumed, since we
can now trigger the following NPD:
[ 12.664170] usb usb1: root hub lost power or was reset
[ 12.669387] usb usb2: root hub lost power or was reset
[ 12.674662] Unable to handle kernel NULL pointer dereference at virtual address 00000008
[ 12.682896] pgd = ffffffc1365a7000
[ 12.686386] [00000008] *pgd=0000000136500003, *pud=0000000136500003, *pmd=0000000000000000
[ 12.694897] Internal error: Oops: 96000006 [#1] SMP
[ 12.699843] Modules linked in:
[ 12.702980] CPU: 0 PID: 1499 Comm: pml Not tainted 4.9.135-1.13pre #51
[ 12.709577] Hardware name: BCM97268DV (DT)
[ 12.713736] task: ffffffc136bb6540 task.stack: ffffffc1366cc000
[ 12.719740] PC is at addr_in_gen_pool+0x4/0x48
[ 12.724253] LR is at __dma_free+0x64/0xbc
[ 12.728325] pc : [<ffffff80083c0df8>] lr : [<ffffff80080979e0>] pstate: 60000145
[ 12.735825] sp : ffffffc1366cf990
[ 12.739196] x29: ffffffc1366cf990 x28: ffffffc1366cc000
[ 12.744608] x27: 0000000000000000 x26: ffffffc13a8568c8
[ 12.750020] x25: 0000000000000000 x24: ffffff80098f9000
[ 12.755433] x23: 000000013a5ff000 x22: ffffff8009c57000
[ 12.760844] x21: ffffffc13a856810 x20: 0000000000000000
[ 12.766255] x19: 0000000000001000 x18: 000000000000000a
[ 12.771667] x17: 0000007f917553e0 x16: 0000000000001002
[ 12.777078] x15: 00000000000a36cb x14: ffffff80898feb77
[ 12.782490] x13: ffffffffffffffff x12: 0000000000000030
[ 12.787899] x11: 00000000fffffffe x10: ffffff80098feb7f
[ 12.793311] x9 : 0000000005f5e0ff x8 : 65776f702074736f
[ 12.798723] x7 : 6c2062756820746f x6 : ffffff80098febb1
[ 12.804134] x5 : ffffff800809797c x4 : 0000000000000000
[ 12.809545] x3 : 000000013a5ff000 x2 : 0000000000000fff
[ 12.814955] x1 : ffffff8009c57000 x0 : 0000000000000000
[ 12.820363]
[ 12.821907] Process pml (pid: 1499, stack limit = 0xffffffc1366cc020)
[ 12.828421] Stack: (0xffffffc1366cf990 to 0xffffffc1366d0000)
[ 12.834240] f980: ffffffc1366cf9e0 ffffff80086004d0
[ 12.842186] f9a0: ffffffc13ab08238 0000000000000010 ffffff80097c2218 ffffffc13a856810
[ 12.850131] f9c0: ffffff8009c57000 000000013a5ff000 0000000000000008 000000013a5ff000
[ 12.858076] f9e0: ffffffc1366cfa50 ffffff80085f9250 ffffffc13ab08238 0000000000000004
[ 12.866021] fa00: ffffffc13ab08000 ffffff80097b6000 ffffffc13ab08130 0000000000000001
[ 12.873966] fa20: 0000000000000008 ffffffc13a8568c8 0000000000000000 ffffffc1366cc000
[ 12.881911] fa40: ffffffc13ab08130 0000000000000001 ffffffc1366cfa90 ffffff80085e3de8
[ 12.889856] fa60: ffffffc13ab08238 0000000000000000 ffffffc136b75b00 0000000000000000
[ 12.897801] fa80: 0000000000000010 ffffff80089ccb92 ffffffc1366cfac0 ffffff80084ad040
[ 12.905746] faa0: ffffffc13a856810 0000000000000000 ffffff80084ad004 ffffff80084b91a8
[ 12.913691] fac0: ffffffc1366cfae0 ffffff80084b91b4 ffffffc13a856810 ffffff80080db5cc
[ 12.921636] fae0: ffffffc1366cfb20 ffffff80084b96bc ffffffc13a856810 0000000000000010
[ 12.929581] fb00: ffffffc13a856870 0000000000000000 ffffffc13a856810 ffffff800984d2b8
[ 12.937526] fb20: ffffffc1366cfb50 ffffff80084baa70 ffffff8009932ad0 ffffff800984d260
[ 12.945471] fb40: 0000000000000010 00000002eff0a065 ffffffc1366cfbb0 ffffff80084bafbc
[ 12.953415] fb60: 0000000000000010 0000000000000003 ffffff80098fe000 0000000000000000
[ 12.961360] fb80: ffffff80097b6000 ffffff80097b6dc8 ffffff80098c12b8 ffffff80098c12f8
[ 12.969306] fba0: ffffff8008842000 ffffff80097b6dc8 ffffffc1366cfbd0 ffffff80080e0d88
[ 12.977251] fbc0: 00000000fffffffb ffffff80080e10bc ffffffc1366cfc60 ffffff80080e16a8
[ 12.985196] fbe0: 0000000000000000 0000000000000003 ffffff80097b6000 ffffff80098fe9f0
[ 12.993140] fc00: ffffff80097d4000 ffffff8008983802 0000000000000123 0000000000000040
[ 13.001085] fc20: ffffff8008842000 ffffffc1366cc000 ffffff80089803c2 00000000ffffffff
[ 13.009029] fc40: 0000000000000000 0000000000000000 ffffffc1366cfc60 0000000000040987
[ 13.016974] fc60: ffffffc1366cfcc0 ffffff80080dfd08 0000000000000003 0000000000000004
[ 13.024919] fc80: 0000000000000003 ffffff80098fea08 ffffffc136577ec0 ffffff80089803c2
[ 13.032864] fca0: 0000000000000123 0000000000000001 0000000500000002 0000000000040987
[ 13.040809] fcc0: ffffffc1366cfd00 ffffff80083a89d4 0000000000000004 ffffffc136577ec0
[ 13.048754] fce0: ffffffc136610cc0 ffffffffffffffea ffffffc1366cfeb0 ffffffc136610cd8
[ 13.056700] fd00: ffffffc1366cfd10 ffffff800822a614 ffffffc1366cfd40 ffffff80082295d4
[ 13.064645] fd20: 0000000000000004 ffffffc136577ec0 ffffffc136610cc0 0000000021670570
[ 13.072590] fd40: ffffffc1366cfd80 ffffff80081b5d10 ffffff80097b6000 ffffffc13aae4200
[ 13.080536] fd60: ffffffc1366cfeb0 0000000000000004 0000000021670570 0000000000000004
[ 13.088481] fd80: ffffffc1366cfe30 ffffff80081b6b20 ffffffc13aae4200 0000000000000000
[ 13.096427] fda0: 0000000000000004 0000000021670570 ffffffc1366cfeb0 ffffffc13a838200
[ 13.104371] fdc0: 0000000000000000 000000000000000a ffffff80097b6000 0000000000040987
[ 13.112316] fde0: ffffffc1366cfe20 ffffff80081b3af0 ffffffc13a838200 0000000000000000
[ 13.120261] fe00: ffffffc1366cfe30 ffffff80081b6b0c ffffffc13aae4200 0000000000000000
[ 13.128206] fe20: 0000000000000004 0000000000040987 ffffffc1366cfe70 ffffff80081b7dd8
[ 13.136151] fe40: ffffff80097b6000 ffffffc13aae4200 ffffffc13aae4200 fffffffffffffff7
[ 13.144096] fe60: 0000000021670570 ffffffc13a8c63c0 0000000000000000 ffffff8008083180
[ 13.152042] fe80: ffffffffffffff1d 0000000021670570 ffffffffffffffff 0000007f917ad9b8
[ 13.159986] fea0: 0000000020000000 0000000000000015 0000000000000000 0000000000040987
[ 13.167930] fec0: 0000000000000001 0000000021670570 0000000000000004 0000000000000000
[ 13.175874] fee0: 0000000000000888 0000440110000000 000000000000006d 0000000000000003
[ 13.183819] ff00: 0000000000000040 ffffff80ffffffc8 0000000000000000 0000000000000020
[ 13.191762] ff20: 0000000000000000 0000000000000000 0000000000000001 0000000000000000
[ 13.199707] ff40: 0000000000000000 0000007f917553e0 0000000000000000 0000000000000004
[ 13.207651] ff60: 0000000021670570 0000007f91835480 0000000000000004 0000007f91831638
[ 13.215595] ff80: 0000000000000004 00000000004b0de0 00000000004b0000 0000000000000000
[ 13.223539] ffa0: 0000000000000000 0000007fc92ac8c0 0000007f9175d178 0000007fc92ac8c0
[ 13.231483] ffc0: 0000007f917ad9b8 0000000020000000 0000000000000001 0000000000000040
[ 13.239427] ffe0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 13.247360] Call trace:
[ 13.249866] Exception stack(0xffffffc1366cf7a0 to 0xffffffc1366cf8d0)
[ 13.256386] f7a0: 0000000000001000 0000007fffffffff ffffffc1366cf990 ffffff80083c0df8
[ 13.264331] f7c0: 0000000060000145 ffffff80089b5001 ffffffc13ab08130 0000000000000001
[ 13.272275] f7e0: 0000000000000008 ffffffc13a8568c8 0000000000000000 0000000000000000
[ 13.280220] f800: ffffffc1366cf960 ffffffc1366cf960 ffffffc1366cf930 00000000ffffffd8
[ 13.288165] f820: ffffff8009931ac0 4554535953425553 4544006273753d4d 3831633d45434956
[ 13.296110] f840: ffff003832313a39 ffffff800845926c ffffffc1366cf880 0000000000040987
[ 13.304054] f860: 0000000000000000 ffffff8009c57000 0000000000000fff 000000013a5ff000
[ 13.311999] f880: 0000000000000000 ffffff800809797c ffffff80098febb1 6c2062756820746f
[ 13.319944] f8a0: 65776f702074736f 0000000005f5e0ff ffffff80098feb7f 00000000fffffffe
[ 13.327884] f8c0: 0000000000000030 ffffffffffffffff
[ 13.332835] [<ffffff80083c0df8>] addr_in_gen_pool+0x4/0x48
[ 13.338398] [<ffffff80086004d0>] xhci_mem_cleanup+0xc8/0x51c
[ 13.344137] [<ffffff80085f9250>] xhci_resume+0x308/0x65c
[ 13.349524] [<ffffff80085e3de8>] xhci_brcm_resume+0x84/0x8c
[ 13.355174] [<ffffff80084ad040>] platform_pm_resume+0x3c/0x64
[ 13.360997] [<ffffff80084b91b4>] dpm_run_callback+0x5c/0x15c
[ 13.366732] [<ffffff80084b96bc>] device_resume+0xc0/0x190
[ 13.372205] [<ffffff80084baa70>] dpm_resume+0x144/0x2cc
[ 13.377504] [<ffffff80084bafbc>] dpm_resume_end+0x20/0x34
[ 13.382980] [<ffffff80080e0d88>] suspend_devices_and_enter+0x104/0x704
[ 13.389585] [<ffffff80080e16a8>] pm_suspend+0x320/0x53c
[ 13.394881] [<ffffff80080dfd08>] state_store+0xbc/0xe0
[ 13.400094] [<ffffff80083a89d4>] kobj_attr_store+0x14/0x24
[ 13.405655] [<ffffff800822a614>] sysfs_kf_write+0x60/0x70
[ 13.411128] [<ffffff80082295d4>] kernfs_fop_write+0x130/0x194
[ 13.416954] [<ffffff80081b5d10>] __vfs_write+0x60/0x150
[ 13.422254] [<ffffff80081b6b20>] vfs_write+0xc8/0x164
[ 13.427376] [<ffffff80081b7dd8>] SyS_write+0x70/0xc8
[ 13.432412] [<ffffff8008083180>] el0_svc_naked+0x34/0x38
[ 13.437800] Code: 92800173 97f6fb9e 17fffff5 d1000442 (f8408c03)
[ 13.444033] ---[ end trace 2effe12f909ce205 ]---
The call path leading to this problem is xhci_mem_cleanup() ->
dma_free_coherent() -> dma_free_from_pool() -> addr_in_gen_pool. If the
atomic_pool is NULL, we can't possibly have the address in the atomic
pool anyway, so guard against that.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-06-11 00:54:37 +02:00
|
|
|
if (unlikely(!atomic_pool))
|
|
|
|
return false;
|
|
|
|
|
2018-11-04 20:29:28 +01:00
|
|
|
return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
|
|
|
|
{
|
|
|
|
unsigned long val;
|
|
|
|
void *ptr = NULL;
|
|
|
|
|
|
|
|
if (!atomic_pool) {
|
|
|
|
WARN(1, "coherent pool not initialised!\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
val = gen_pool_alloc(atomic_pool, size);
|
|
|
|
if (val) {
|
|
|
|
phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
|
|
|
|
|
|
|
|
*ret_page = pfn_to_page(__phys_to_pfn(phys));
|
|
|
|
ptr = (void *)val;
|
|
|
|
memset(ptr, 0, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ptr;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool dma_free_from_pool(void *start, size_t size)
|
|
|
|
{
|
|
|
|
if (!dma_in_atomic_pool(start, size))
|
|
|
|
return false;
|
|
|
|
gen_pool_free(atomic_pool, (unsigned long)start, size);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
|
|
gfp_t flags, unsigned long attrs)
|
|
|
|
{
|
|
|
|
struct page *page = NULL;
|
2018-11-04 17:38:39 +01:00
|
|
|
void *ret;
|
2018-11-04 20:29:28 +01:00
|
|
|
|
|
|
|
size = PAGE_ALIGN(size);
|
|
|
|
|
2019-06-14 16:17:27 +02:00
|
|
|
if (!gfpflags_allow_blocking(flags)) {
|
2018-11-04 20:29:28 +01:00
|
|
|
ret = dma_alloc_from_pool(size, &page, flags);
|
|
|
|
if (!ret)
|
|
|
|
return NULL;
|
2019-01-04 18:31:48 +01:00
|
|
|
goto done;
|
2018-11-04 20:29:28 +01:00
|
|
|
}
|
|
|
|
|
2018-11-04 17:38:39 +01:00
|
|
|
page = __dma_direct_alloc_pages(dev, size, dma_handle, flags, attrs);
|
|
|
|
if (!page)
|
2018-11-04 20:29:28 +01:00
|
|
|
return NULL;
|
|
|
|
|
|
|
|
/* remove any dirty cache lines on the kernel alias */
|
|
|
|
arch_dma_prep_coherent(page, size);
|
|
|
|
|
|
|
|
/* create a coherent mapping */
|
2019-08-30 08:51:01 +02:00
|
|
|
ret = dma_common_contiguous_remap(page, size,
|
2019-07-26 09:26:40 +02:00
|
|
|
dma_pgprot(dev, PAGE_KERNEL, attrs),
|
2018-11-04 20:29:28 +01:00
|
|
|
__builtin_return_address(0));
|
2018-12-05 11:14:01 +01:00
|
|
|
if (!ret) {
|
2018-11-04 17:38:39 +01:00
|
|
|
__dma_direct_free_pages(dev, size, page);
|
2018-12-05 11:14:01 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(ret, 0, size);
|
2019-01-04 18:31:48 +01:00
|
|
|
done:
|
|
|
|
*dma_handle = phys_to_dma(dev, page_to_phys(page));
|
2018-11-04 20:29:28 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void arch_dma_free(struct device *dev, size_t size, void *vaddr,
|
|
|
|
dma_addr_t dma_handle, unsigned long attrs)
|
|
|
|
{
|
2019-06-14 16:17:27 +02:00
|
|
|
if (!dma_free_from_pool(vaddr, PAGE_ALIGN(size))) {
|
2018-11-04 17:38:39 +01:00
|
|
|
phys_addr_t phys = dma_to_phys(dev, dma_handle);
|
|
|
|
struct page *page = pfn_to_page(__phys_to_pfn(phys));
|
2018-11-04 20:29:28 +01:00
|
|
|
|
|
|
|
vunmap(vaddr);
|
2018-11-04 17:38:39 +01:00
|
|
|
__dma_direct_free_pages(dev, size, page);
|
2018-11-04 20:29:28 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
|
|
|
|
dma_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
return __phys_to_pfn(dma_to_phys(dev, dma_addr));
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_DMA_DIRECT_REMAP */
|