2005-04-17 00:20:36 +02:00
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/*
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* ATi AGPGART routines.
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*/
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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2005-10-31 00:03:48 +01:00
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#include <linux/string.h>
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#include <linux/slab.h>
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2005-04-17 00:20:36 +02:00
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#include <linux/agp_backend.h>
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#include <asm/agp.h>
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#include "agp.h"
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#define ATI_GART_MMBASE_ADDR 0x14
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#define ATI_RS100_APSIZE 0xac
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#define ATI_RS100_IG_AGPMODE 0xb0
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#define ATI_RS300_APSIZE 0xf8
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#define ATI_RS300_IG_AGPMODE 0xfc
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#define ATI_GART_FEATURE_ID 0x00
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#define ATI_GART_BASE 0x04
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#define ATI_GART_CACHE_SZBASE 0x08
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#define ATI_GART_CACHE_CNTRL 0x0c
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#define ATI_GART_CACHE_ENTRY_CNTRL 0x10
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2007-02-23 00:41:28 +01:00
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static const struct aper_size_info_lvl2 ati_generic_sizes[7] =
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2005-04-17 00:20:36 +02:00
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{
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{2048, 524288, 0x0000000c},
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{1024, 262144, 0x0000000a},
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{512, 131072, 0x00000008},
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{256, 65536, 0x00000006},
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{128, 32768, 0x00000004},
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{64, 16384, 0x00000002},
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{32, 8192, 0x00000000}
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};
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static struct gatt_mask ati_generic_masks[] =
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{
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{ .mask = 1, .type = 0}
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};
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2007-01-28 23:41:37 +01:00
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struct ati_page_map {
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2005-04-17 00:20:36 +02:00
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unsigned long *real;
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unsigned long __iomem *remapped;
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2007-01-28 23:41:37 +01:00
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};
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2005-04-17 00:20:36 +02:00
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static struct _ati_generic_private {
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volatile u8 __iomem *registers;
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2007-01-28 23:41:37 +01:00
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struct ati_page_map **gatt_pages;
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2005-04-17 00:20:36 +02:00
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int num_tables;
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} ati_generic_private;
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2007-01-28 23:41:37 +01:00
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static int ati_create_page_map(struct ati_page_map *page_map)
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2005-04-17 00:20:36 +02:00
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{
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int i, err = 0;
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page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
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if (page_map->real == NULL)
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return -ENOMEM;
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2008-02-20 01:37:08 +01:00
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set_memory_uc((unsigned long)page_map->real, 1);
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2005-04-17 00:20:36 +02:00
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err = map_page_into_agp(virt_to_page(page_map->real));
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2008-02-06 05:16:00 +01:00
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page_map->remapped = page_map->real;
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2005-04-17 00:20:36 +02:00
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2006-02-28 06:54:25 +01:00
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for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
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2005-04-17 00:20:36 +02:00
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writel(agp_bridge->scratch_page, page_map->remapped+i);
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readl(page_map->remapped+i); /* PCI Posting. */
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}
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return 0;
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}
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2007-01-28 23:41:37 +01:00
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static void ati_free_page_map(struct ati_page_map *page_map)
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2005-04-17 00:20:36 +02:00
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{
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unmap_page_from_agp(virt_to_page(page_map->real));
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2008-02-20 01:37:08 +01:00
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set_memory_wb((unsigned long)page_map->real, 1);
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2005-04-17 00:20:36 +02:00
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free_page((unsigned long) page_map->real);
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}
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static void ati_free_gatt_pages(void)
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{
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int i;
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2007-01-28 23:41:37 +01:00
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struct ati_page_map **tables;
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struct ati_page_map *entry;
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2005-04-17 00:20:36 +02:00
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tables = ati_generic_private.gatt_pages;
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2006-02-28 06:54:25 +01:00
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for (i = 0; i < ati_generic_private.num_tables; i++) {
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2005-04-17 00:20:36 +02:00
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entry = tables[i];
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if (entry != NULL) {
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if (entry->real != NULL)
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ati_free_page_map(entry);
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kfree(entry);
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}
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}
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kfree(tables);
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}
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static int ati_create_gatt_pages(int nr_tables)
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{
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2007-01-28 23:41:37 +01:00
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struct ati_page_map **tables;
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struct ati_page_map *entry;
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2005-04-17 00:20:36 +02:00
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int retval = 0;
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int i;
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2007-01-28 23:41:37 +01:00
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tables = kzalloc((nr_tables + 1) * sizeof(struct ati_page_map *),GFP_KERNEL);
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2005-04-17 00:20:36 +02:00
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if (tables == NULL)
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return -ENOMEM;
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for (i = 0; i < nr_tables; i++) {
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2007-01-28 23:41:37 +01:00
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entry = kzalloc(sizeof(struct ati_page_map), GFP_KERNEL);
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2007-07-21 17:39:11 +02:00
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tables[i] = entry;
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2005-04-17 00:20:36 +02:00
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if (entry == NULL) {
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retval = -ENOMEM;
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break;
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}
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retval = ati_create_page_map(entry);
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2007-01-28 23:50:17 +01:00
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if (retval != 0)
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break;
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2005-04-17 00:20:36 +02:00
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}
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2007-07-21 17:39:11 +02:00
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ati_generic_private.num_tables = i;
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2005-04-17 00:20:36 +02:00
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ati_generic_private.gatt_pages = tables;
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2006-06-20 06:39:19 +02:00
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if (retval != 0)
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ati_free_gatt_pages();
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2005-04-17 00:20:36 +02:00
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return retval;
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}
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static int is_r200(void)
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{
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if ((agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS100) ||
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(agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200) ||
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(agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200_B) ||
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(agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS250))
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return 1;
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return 0;
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}
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static int ati_fetch_size(void)
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{
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int i;
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u32 temp;
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struct aper_size_info_lvl2 *values;
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if (is_r200())
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pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
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else
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pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
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temp = (temp & 0x0000000e);
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values = A_SIZE_LVL2(agp_bridge->driver->aperture_sizes);
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for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
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if (temp == values[i].size_value) {
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agp_bridge->previous_size =
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agp_bridge->current_size = (void *) (values + i);
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agp_bridge->aperture_size_idx = i;
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return values[i].size;
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}
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}
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return 0;
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}
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static void ati_tlbflush(struct agp_memory * mem)
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{
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writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
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readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */
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}
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static void ati_cleanup(void)
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{
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struct aper_size_info_lvl2 *previous_size;
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u32 temp;
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previous_size = A_SIZE_LVL2(agp_bridge->previous_size);
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/* Write back the previous size and disable gart translation */
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if (is_r200()) {
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pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
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temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
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pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
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} else {
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pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
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temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
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pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
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}
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iounmap((volatile u8 __iomem *)ati_generic_private.registers);
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}
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static int ati_configure(void)
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{
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u32 temp;
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/* Get the memory mapped registers */
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pci_read_config_dword(agp_bridge->dev, ATI_GART_MMBASE_ADDR, &temp);
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temp = (temp & 0xfffff000);
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ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
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2007-08-25 10:14:00 +02:00
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if (!ati_generic_private.registers)
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return -ENOMEM;
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2005-04-17 00:20:36 +02:00
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if (is_r200())
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2006-06-20 06:39:19 +02:00
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pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
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2005-04-17 00:20:36 +02:00
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else
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pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000);
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/* address to map too */
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2006-06-20 06:39:19 +02:00
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/*
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2005-04-17 00:20:36 +02:00
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pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp);
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agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
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printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
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2006-06-20 06:39:19 +02:00
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*/
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2005-04-17 00:20:36 +02:00
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writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
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readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/
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/* SIGNALED_SYSTEM_ERROR @ NB_STATUS */
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pci_read_config_dword(agp_bridge->dev, 4, &temp);
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pci_write_config_dword(agp_bridge->dev, 4, temp | (1<<14));
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/* Write out the address of the gatt table */
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writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE);
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readl(ati_generic_private.registers+ATI_GART_BASE); /* PCI Posting. */
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return 0;
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}
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2006-01-04 08:00:59 +01:00
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#ifdef CONFIG_PM
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2006-06-20 06:42:04 +02:00
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static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state)
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2006-01-04 08:00:59 +01:00
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{
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2006-06-20 06:42:04 +02:00
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pci_save_state(dev);
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2006-06-21 19:10:26 +02:00
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pci_set_power_state(dev, 3);
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2006-01-04 08:00:59 +01:00
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2006-06-20 06:42:04 +02:00
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return 0;
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2006-01-04 08:00:59 +01:00
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}
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2006-06-20 06:42:04 +02:00
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static int agp_ati_resume(struct pci_dev *dev)
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2006-01-04 08:00:59 +01:00
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{
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2006-06-21 19:10:26 +02:00
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pci_set_power_state(dev, 0);
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2006-06-20 06:42:04 +02:00
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pci_restore_state(dev);
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2006-01-04 08:00:59 +01:00
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2006-06-20 06:42:04 +02:00
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return ati_configure();
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2006-01-04 08:00:59 +01:00
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}
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#endif
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2005-04-17 00:20:36 +02:00
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/*
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2006-06-26 18:35:02 +02:00
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*Since we don't need contiguous memory we just try
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2005-04-17 00:20:36 +02:00
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* to get the gatt table once
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*/
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#define GET_PAGE_DIR_OFF(addr) (addr >> 22)
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#define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \
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GET_PAGE_DIR_OFF(agp_bridge->gart_bus_addr))
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#define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12)
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#undef GET_GATT
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#define GET_GATT(addr) (ati_generic_private.gatt_pages[\
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GET_PAGE_DIR_IDX(addr)]->remapped)
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static int ati_insert_memory(struct agp_memory * mem,
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off_t pg_start, int type)
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{
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int i, j, num_entries;
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unsigned long __iomem *cur_gatt;
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unsigned long addr;
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num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
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if (type != 0 || mem->type != 0)
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return -EINVAL;
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if ((pg_start + mem->page_count) > num_entries)
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return -EINVAL;
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j = pg_start;
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while (j < (pg_start + mem->page_count)) {
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addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
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cur_gatt = GET_GATT(addr);
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if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr))))
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return -EBUSY;
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j++;
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}
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2008-03-26 22:10:02 +01:00
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if (!mem->is_flushed) {
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2005-04-17 00:20:36 +02:00
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/*CACHE_FLUSH(); */
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global_cache_flush();
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2008-03-26 22:10:02 +01:00
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mem->is_flushed = true;
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2005-04-17 00:20:36 +02:00
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}
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for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
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addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
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cur_gatt = GET_GATT(addr);
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writel(agp_bridge->driver->mask_memory(agp_bridge,
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mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr));
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readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
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}
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agp_bridge->driver->tlb_flush(mem);
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return 0;
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}
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static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
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int type)
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{
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int i;
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|
|
unsigned long __iomem *cur_gatt;
|
|
|
|
unsigned long addr;
|
|
|
|
|
2006-06-20 06:39:19 +02:00
|
|
|
if (type != 0 || mem->type != 0)
|
2005-04-17 00:20:36 +02:00
|
|
|
return -EINVAL;
|
2006-06-20 06:39:19 +02:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
|
|
|
|
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
|
|
|
|
cur_gatt = GET_GATT(addr);
|
|
|
|
writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
|
|
|
|
readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
|
|
|
|
}
|
|
|
|
|
|
|
|
agp_bridge->driver->tlb_flush(mem);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ati_create_gatt_table(struct agp_bridge_data *bridge)
|
|
|
|
{
|
|
|
|
struct aper_size_info_lvl2 *value;
|
2007-01-28 23:41:37 +01:00
|
|
|
struct ati_page_map page_dir;
|
2005-04-17 00:20:36 +02:00
|
|
|
unsigned long addr;
|
|
|
|
int retval;
|
|
|
|
u32 temp;
|
|
|
|
int i;
|
|
|
|
struct aper_size_info_lvl2 *current_size;
|
|
|
|
|
|
|
|
value = A_SIZE_LVL2(agp_bridge->current_size);
|
|
|
|
retval = ati_create_page_map(&page_dir);
|
|
|
|
if (retval != 0)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
retval = ati_create_gatt_pages(value->num_entries / 1024);
|
|
|
|
if (retval != 0) {
|
|
|
|
ati_free_page_map(&page_dir);
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
agp_bridge->gatt_table_real = (u32 *)page_dir.real;
|
|
|
|
agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped;
|
2005-03-30 23:17:04 +02:00
|
|
|
agp_bridge->gatt_bus_addr = virt_to_gart(page_dir.real);
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
/* Write out the size register */
|
|
|
|
current_size = A_SIZE_LVL2(agp_bridge->current_size);
|
|
|
|
|
|
|
|
if (is_r200()) {
|
|
|
|
pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
|
|
|
|
temp = (((temp & ~(0x0000000e)) | current_size->size_value)
|
|
|
|
| 0x00000001);
|
|
|
|
pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
|
|
|
|
pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
|
|
|
|
} else {
|
|
|
|
pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
|
|
|
|
temp = (((temp & ~(0x0000000e)) | current_size->size_value)
|
|
|
|
| 0x00000001);
|
|
|
|
pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
|
|
|
|
pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get the address for the gart region.
|
|
|
|
* This is a bus address even on the alpha, b/c its
|
|
|
|
* used to program the agp master not the cpu
|
|
|
|
*/
|
|
|
|
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
|
|
|
|
addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
|
|
|
|
agp_bridge->gart_bus_addr = addr;
|
|
|
|
|
|
|
|
/* Calculate the agp offset */
|
2006-02-28 06:54:25 +01:00
|
|
|
for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
|
2005-03-30 23:17:04 +02:00
|
|
|
writel(virt_to_gart(ati_generic_private.gatt_pages[i]->real) | 1,
|
2005-04-17 00:20:36 +02:00
|
|
|
page_dir.remapped+GET_PAGE_DIR_OFF(addr));
|
|
|
|
readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ati_free_gatt_table(struct agp_bridge_data *bridge)
|
|
|
|
{
|
2007-01-28 23:41:37 +01:00
|
|
|
struct ati_page_map page_dir;
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
|
|
|
|
page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
|
|
|
|
|
|
|
|
ati_free_gatt_pages();
|
|
|
|
ati_free_page_map(&page_dir);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-02-23 00:41:28 +01:00
|
|
|
static const struct agp_bridge_driver ati_generic_bridge = {
|
2005-04-17 00:20:36 +02:00
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.aperture_sizes = ati_generic_sizes,
|
|
|
|
.size_type = LVL2_APER_SIZE,
|
|
|
|
.num_aperture_sizes = 7,
|
|
|
|
.configure = ati_configure,
|
|
|
|
.fetch_size = ati_fetch_size,
|
|
|
|
.cleanup = ati_cleanup,
|
|
|
|
.tlb_flush = ati_tlbflush,
|
|
|
|
.mask_memory = agp_generic_mask_memory,
|
|
|
|
.masks = ati_generic_masks,
|
|
|
|
.agp_enable = agp_generic_enable,
|
|
|
|
.cache_flush = global_cache_flush,
|
|
|
|
.create_gatt_table = ati_create_gatt_table,
|
|
|
|
.free_gatt_table = ati_free_gatt_table,
|
|
|
|
.insert_memory = ati_insert_memory,
|
|
|
|
.remove_memory = ati_remove_memory,
|
|
|
|
.alloc_by_type = agp_generic_alloc_by_type,
|
|
|
|
.free_by_type = agp_generic_free_by_type,
|
|
|
|
.agp_alloc_page = agp_generic_alloc_page,
|
2008-08-21 19:15:46 +02:00
|
|
|
.agp_alloc_pages = agp_generic_alloc_pages,
|
2005-04-17 00:20:36 +02:00
|
|
|
.agp_destroy_page = agp_generic_destroy_page,
|
2008-08-21 19:15:46 +02:00
|
|
|
.agp_destroy_pages = agp_generic_destroy_pages,
|
2007-01-23 10:33:43 +01:00
|
|
|
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
|
2005-04-17 00:20:36 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
static struct agp_device_ids ati_agp_device_ids[] __devinitdata =
|
|
|
|
{
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS100,
|
|
|
|
.chipset_name = "IGP320/M",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS200,
|
|
|
|
.chipset_name = "IGP330/340/345/350/M",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS200_B,
|
|
|
|
.chipset_name = "IGP345M",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS250,
|
|
|
|
.chipset_name = "IGP7000/M",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS300_100,
|
|
|
|
.chipset_name = "IGP9100/M",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS300_133,
|
|
|
|
.chipset_name = "IGP9100/M",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS300_166,
|
|
|
|
.chipset_name = "IGP9100/M",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS300_200,
|
|
|
|
.chipset_name = "IGP9100/M",
|
|
|
|
},
|
2008-06-13 00:21:26 +02:00
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS350_133,
|
|
|
|
.chipset_name = "IGP9000/M",
|
|
|
|
},
|
2006-03-01 20:23:14 +01:00
|
|
|
{
|
|
|
|
.device_id = PCI_DEVICE_ID_ATI_RS350_200,
|
|
|
|
.chipset_name = "IGP9100/M",
|
|
|
|
},
|
2005-04-17 00:20:36 +02:00
|
|
|
{ }, /* dummy final entry, always present */
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __devinit agp_ati_probe(struct pci_dev *pdev,
|
|
|
|
const struct pci_device_id *ent)
|
|
|
|
{
|
|
|
|
struct agp_device_ids *devs = ati_agp_device_ids;
|
|
|
|
struct agp_bridge_data *bridge;
|
|
|
|
u8 cap_ptr;
|
|
|
|
int j;
|
|
|
|
|
|
|
|
cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
|
|
|
|
if (!cap_ptr)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
/* probe for known chipsets */
|
|
|
|
for (j = 0; devs[j].chipset_name; j++) {
|
|
|
|
if (pdev->device == devs[j].device_id)
|
|
|
|
goto found;
|
|
|
|
}
|
|
|
|
|
2008-07-30 21:26:51 +02:00
|
|
|
dev_err(&pdev->dev, "unsupported Ati chipset [%04x/%04x])\n",
|
|
|
|
pdev->vendor, pdev->device);
|
2005-04-17 00:20:36 +02:00
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
found:
|
|
|
|
bridge = agp_alloc_bridge();
|
|
|
|
if (!bridge)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
bridge->dev = pdev;
|
|
|
|
bridge->capndx = cap_ptr;
|
|
|
|
|
2006-06-20 06:39:19 +02:00
|
|
|
bridge->driver = &ati_generic_bridge;
|
2005-04-17 00:20:36 +02:00
|
|
|
|
2008-07-30 21:26:51 +02:00
|
|
|
dev_info(&pdev->dev, "Ati %s chipset\n", devs[j].chipset_name);
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
/* Fill in the mode register */
|
|
|
|
pci_read_config_dword(pdev,
|
|
|
|
bridge->capndx+PCI_AGP_STATUS,
|
|
|
|
&bridge->mode);
|
|
|
|
|
|
|
|
pci_set_drvdata(pdev, bridge);
|
|
|
|
return agp_add_bridge(bridge);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __devexit agp_ati_remove(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
|
|
|
|
|
|
|
|
agp_remove_bridge(bridge);
|
|
|
|
agp_put_bridge(bridge);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct pci_device_id agp_ati_pci_table[] = {
|
|
|
|
{
|
|
|
|
.class = (PCI_CLASS_BRIDGE_HOST << 8),
|
|
|
|
.class_mask = ~0,
|
|
|
|
.vendor = PCI_VENDOR_ID_ATI,
|
|
|
|
.device = PCI_ANY_ID,
|
|
|
|
.subvendor = PCI_ANY_ID,
|
|
|
|
.subdevice = PCI_ANY_ID,
|
|
|
|
},
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(pci, agp_ati_pci_table);
|
|
|
|
|
|
|
|
static struct pci_driver agp_ati_pci_driver = {
|
|
|
|
.name = "agpgart-ati",
|
|
|
|
.id_table = agp_ati_pci_table,
|
|
|
|
.probe = agp_ati_probe,
|
|
|
|
.remove = agp_ati_remove,
|
2006-01-04 08:00:59 +01:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
.suspend = agp_ati_suspend,
|
2006-06-20 06:42:04 +02:00
|
|
|
.resume = agp_ati_resume,
|
2006-01-04 08:00:59 +01:00
|
|
|
#endif
|
2005-04-17 00:20:36 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init agp_ati_init(void)
|
|
|
|
{
|
|
|
|
if (agp_off)
|
|
|
|
return -EINVAL;
|
|
|
|
return pci_register_driver(&agp_ati_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit agp_ati_cleanup(void)
|
|
|
|
{
|
|
|
|
pci_unregister_driver(&agp_ati_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(agp_ati_init);
|
|
|
|
module_exit(agp_ati_cleanup);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
|
|
|
|
MODULE_LICENSE("GPL and additional rights");
|
|
|
|
|