2005-04-17 00:20:36 +02:00
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/**
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* @file nmi_int.c
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*
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2009-07-08 13:49:38 +02:00
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* @remark Copyright 2002-2009 OProfile authors
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2005-04-17 00:20:36 +02:00
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* @remark Read the file COPYING
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*
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* @author John Levon <levon@movementarian.org>
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2008-07-22 21:08:48 +02:00
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* @author Robert Richter <robert.richter@amd.com>
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2009-07-08 13:49:38 +02:00
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* @author Barry Kasindorf <barry.kasindorf@amd.com>
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* @author Jason Yeh <jason.yeh@amd.com>
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* @author Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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2005-04-17 00:20:36 +02:00
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*/
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#include <linux/init.h>
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#include <linux/notifier.h>
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#include <linux/smp.h>
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#include <linux/oprofile.h>
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2011-03-23 22:15:54 +01:00
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#include <linux/syscore_ops.h>
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2005-04-17 00:20:36 +02:00
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#include <linux/slab.h>
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2006-07-10 17:06:21 +02:00
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#include <linux/moduleparam.h>
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2007-05-08 09:27:03 +02:00
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#include <linux/kdebug.h>
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2008-08-19 03:13:38 +02:00
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#include <linux/cpu.h>
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2005-04-17 00:20:36 +02:00
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#include <asm/nmi.h>
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#include <asm/msr.h>
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#include <asm/apic.h>
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2008-01-30 13:32:33 +01:00
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2005-04-17 00:20:36 +02:00
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#include "op_counter.h"
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#include "op_x86_model.h"
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2006-09-26 10:52:27 +02:00
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2009-07-09 15:12:35 +02:00
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static struct op_x86_model_spec *model;
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2008-03-25 23:06:59 +01:00
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static DEFINE_PER_CPU(struct op_msrs, cpu_msrs);
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static DEFINE_PER_CPU(unsigned long, saved_lvtpc);
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2006-09-26 10:52:27 +02:00
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2010-04-29 14:55:55 +02:00
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/* must be protected with get_online_cpus()/put_online_cpus(): */
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static int nmi_enabled;
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static int ctr_running;
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2005-04-17 00:20:36 +02:00
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2009-07-08 13:49:38 +02:00
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struct op_counter_config counter_config[OP_MAX_COUNTER];
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2009-05-25 15:10:32 +02:00
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/* common functions */
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u64 op_x86_get_ctrl(struct op_x86_model_spec const *model,
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struct op_counter_config *counter_config)
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{
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u64 val = 0;
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u16 event = (u16)counter_config->event;
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val |= ARCH_PERFMON_EVENTSEL_INT;
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val |= counter_config->user ? ARCH_PERFMON_EVENTSEL_USR : 0;
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val |= counter_config->kernel ? ARCH_PERFMON_EVENTSEL_OS : 0;
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val |= (counter_config->unit_mask & 0xFF) << 8;
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event &= model->event_mask ? model->event_mask : 0xFF;
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val |= event & 0xFF;
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val |= (event & 0x0F00) << 24;
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return val;
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}
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2006-09-26 10:52:27 +02:00
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static int profile_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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2005-04-17 00:20:36 +02:00
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{
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2006-09-26 10:52:27 +02:00
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struct die_args *args = (struct die_args *)data;
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int ret = NOTIFY_DONE;
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2008-01-30 13:32:33 +01:00
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switch (val) {
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2006-09-26 10:52:27 +02:00
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case DIE_NMI:
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2010-05-03 14:41:22 +02:00
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if (ctr_running)
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model->check_ctrs(args->regs, &__get_cpu_var(cpu_msrs));
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else if (!nmi_enabled)
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break;
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else
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model->stop(&__get_cpu_var(cpu_msrs));
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2009-02-04 17:11:34 +01:00
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ret = NOTIFY_STOP;
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2006-09-26 10:52:27 +02:00
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break;
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default:
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break;
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}
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return ret;
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2005-04-17 00:20:36 +02:00
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}
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2006-09-26 10:52:27 +02:00
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2008-01-30 13:32:33 +01:00
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static void nmi_cpu_save_registers(struct op_msrs *msrs)
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2005-04-17 00:20:36 +02:00
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{
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2008-01-30 13:32:33 +01:00
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struct op_msr *counters = msrs->counters;
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struct op_msr *controls = msrs->controls;
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2005-04-17 00:20:36 +02:00
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unsigned int i;
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2009-06-05 15:54:24 +02:00
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for (i = 0; i < model->num_counters; ++i) {
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2009-06-03 19:09:27 +02:00
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if (counters[i].addr)
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rdmsrl(counters[i].addr, counters[i].saved);
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2005-04-17 00:20:36 +02:00
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}
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2008-01-30 13:32:33 +01:00
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2009-06-05 15:54:24 +02:00
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for (i = 0; i < model->num_controls; ++i) {
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2009-06-03 19:09:27 +02:00
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if (controls[i].addr)
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rdmsrl(controls[i].addr, controls[i].saved);
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2005-04-17 00:20:36 +02:00
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}
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}
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2009-07-09 14:38:49 +02:00
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static void nmi_cpu_start(void *dummy)
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{
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struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
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2010-05-03 19:44:32 +02:00
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if (!msrs->controls)
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WARN_ON_ONCE(1);
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else
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model->start(msrs);
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2009-07-09 14:38:49 +02:00
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}
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static int nmi_start(void)
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{
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2010-04-29 14:55:55 +02:00
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get_online_cpus();
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2009-07-09 14:38:49 +02:00
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on_each_cpu(nmi_cpu_start, NULL, 1);
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2010-04-29 14:55:55 +02:00
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ctr_running = 1;
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put_online_cpus();
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2009-07-09 14:38:49 +02:00
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return 0;
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}
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static void nmi_cpu_stop(void *dummy)
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{
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struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
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2010-05-03 19:44:32 +02:00
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if (!msrs->controls)
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WARN_ON_ONCE(1);
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else
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model->stop(msrs);
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2009-07-09 14:38:49 +02:00
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}
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static void nmi_stop(void)
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{
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2010-04-29 14:55:55 +02:00
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get_online_cpus();
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2009-07-09 14:38:49 +02:00
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on_each_cpu(nmi_cpu_stop, NULL, 1);
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2010-04-29 14:55:55 +02:00
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ctr_running = 0;
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put_online_cpus();
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2009-07-09 14:38:49 +02:00
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}
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2009-07-16 13:04:43 +02:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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static DEFINE_PER_CPU(int, switch_index);
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2009-07-09 15:11:45 +02:00
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static inline int has_mux(void)
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{
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return !!model->switch_ctrl;
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}
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2009-07-16 13:04:43 +02:00
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inline int op_x86_phys_to_virt(int phys)
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{
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2010-12-18 16:28:55 +01:00
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return __this_cpu_read(switch_index) + phys;
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2009-07-16 13:04:43 +02:00
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}
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2009-07-10 15:47:17 +02:00
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inline int op_x86_virt_to_phys(int virt)
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{
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return virt % model->num_counters;
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}
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2009-07-09 14:40:04 +02:00
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static void nmi_shutdown_mux(void)
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{
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int i;
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2009-07-09 15:11:45 +02:00
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if (!has_mux())
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return;
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2009-07-09 14:40:04 +02:00
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for_each_possible_cpu(i) {
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kfree(per_cpu(cpu_msrs, i).multiplex);
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per_cpu(cpu_msrs, i).multiplex = NULL;
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per_cpu(switch_index, i) = 0;
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}
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}
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static int nmi_setup_mux(void)
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{
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size_t multiplex_size =
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sizeof(struct op_msr) * model->num_virt_counters;
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int i;
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2009-07-09 15:11:45 +02:00
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if (!has_mux())
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return 1;
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2009-07-09 14:40:04 +02:00
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for_each_possible_cpu(i) {
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per_cpu(cpu_msrs, i).multiplex =
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2010-02-25 20:20:25 +01:00
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kzalloc(multiplex_size, GFP_KERNEL);
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2009-07-09 14:40:04 +02:00
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if (!per_cpu(cpu_msrs, i).multiplex)
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return 0;
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}
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2009-07-09 15:11:45 +02:00
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2009-07-09 14:40:04 +02:00
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return 1;
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}
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2009-07-09 14:38:49 +02:00
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static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs)
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{
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int i;
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struct op_msr *multiplex = msrs->multiplex;
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2009-07-09 15:11:45 +02:00
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if (!has_mux())
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return;
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2009-07-09 14:38:49 +02:00
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for (i = 0; i < model->num_virt_counters; ++i) {
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if (counter_config[i].enabled) {
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multiplex[i].saved = -(u64)counter_config[i].count;
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} else {
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multiplex[i].saved = 0;
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}
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}
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per_cpu(switch_index, cpu) = 0;
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}
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2009-07-09 14:38:49 +02:00
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static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs)
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{
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2010-02-25 19:16:46 +01:00
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struct op_msr *counters = msrs->counters;
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2009-07-09 14:38:49 +02:00
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struct op_msr *multiplex = msrs->multiplex;
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int i;
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for (i = 0; i < model->num_counters; ++i) {
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int virt = op_x86_phys_to_virt(i);
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2010-02-25 19:16:46 +01:00
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if (counters[i].addr)
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rdmsrl(counters[i].addr, multiplex[virt].saved);
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2009-07-09 14:38:49 +02:00
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}
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}
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static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs)
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{
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2010-02-25 19:16:46 +01:00
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struct op_msr *counters = msrs->counters;
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2009-07-09 14:38:49 +02:00
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struct op_msr *multiplex = msrs->multiplex;
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int i;
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for (i = 0; i < model->num_counters; ++i) {
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int virt = op_x86_phys_to_virt(i);
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2010-02-25 19:16:46 +01:00
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if (counters[i].addr)
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wrmsrl(counters[i].addr, multiplex[virt].saved);
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2009-07-09 14:38:49 +02:00
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}
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}
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2009-07-09 14:38:49 +02:00
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static void nmi_cpu_switch(void *dummy)
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{
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int cpu = smp_processor_id();
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int si = per_cpu(switch_index, cpu);
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struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
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nmi_cpu_stop(NULL);
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nmi_cpu_save_mpx_registers(msrs);
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/* move to next set */
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si += model->num_counters;
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2010-01-18 18:25:36 +01:00
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if ((si >= model->num_virt_counters) || (counter_config[si].count == 0))
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2009-07-09 14:38:49 +02:00
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per_cpu(switch_index, cpu) = 0;
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else
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per_cpu(switch_index, cpu) = si;
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model->switch_ctrl(model, msrs);
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nmi_cpu_restore_mpx_registers(msrs);
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nmi_cpu_start(NULL);
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}
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/*
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* Quick check to see if multiplexing is necessary.
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* The check should be sufficient since counters are used
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* in ordre.
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*/
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static int nmi_multiplex_on(void)
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{
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return counter_config[model->num_counters].count ? 0 : -EINVAL;
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}
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static int nmi_switch_event(void)
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{
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2009-07-09 15:11:45 +02:00
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if (!has_mux())
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2009-07-09 14:38:49 +02:00
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return -ENOSYS; /* not implemented */
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if (nmi_multiplex_on() < 0)
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return -EINVAL; /* not necessary */
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2010-04-29 14:55:55 +02:00
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get_online_cpus();
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if (ctr_running)
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on_each_cpu(nmi_cpu_switch, NULL, 1);
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put_online_cpus();
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2009-07-09 14:38:49 +02:00
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return 0;
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}
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2009-07-09 16:02:44 +02:00
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static inline void mux_init(struct oprofile_operations *ops)
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{
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if (has_mux())
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ops->switch_events = nmi_switch_event;
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}
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2009-07-09 21:42:51 +02:00
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static void mux_clone(int cpu)
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{
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if (!has_mux())
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return;
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memcpy(per_cpu(cpu_msrs, cpu).multiplex,
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per_cpu(cpu_msrs, 0).multiplex,
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sizeof(struct op_msr) * model->num_virt_counters);
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}
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2009-07-16 13:04:43 +02:00
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#else
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inline int op_x86_phys_to_virt(int phys) { return phys; }
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2009-07-10 15:47:17 +02:00
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inline int op_x86_virt_to_phys(int virt) { return virt; }
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2009-07-09 14:40:04 +02:00
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static inline void nmi_shutdown_mux(void) { }
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static inline int nmi_setup_mux(void) { return 1; }
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2009-07-09 14:38:49 +02:00
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static inline void
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nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) { }
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2009-07-09 16:02:44 +02:00
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static inline void mux_init(struct oprofile_operations *ops) { }
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2009-07-09 21:42:51 +02:00
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static void mux_clone(int cpu) { }
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2009-07-16 13:04:43 +02:00
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#endif
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2005-04-17 00:20:36 +02:00
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static void free_msrs(void)
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{
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int i;
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2006-03-28 11:56:39 +02:00
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|
for_each_possible_cpu(i) {
|
2008-03-25 23:06:59 +01:00
|
|
|
kfree(per_cpu(cpu_msrs, i).counters);
|
|
|
|
per_cpu(cpu_msrs, i).counters = NULL;
|
|
|
|
kfree(per_cpu(cpu_msrs, i).controls);
|
|
|
|
per_cpu(cpu_msrs, i).controls = NULL;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
2010-03-23 19:09:51 +01:00
|
|
|
nmi_shutdown_mux();
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static int allocate_msrs(void)
|
|
|
|
{
|
|
|
|
size_t controls_size = sizeof(struct op_msr) * model->num_controls;
|
|
|
|
size_t counters_size = sizeof(struct op_msr) * model->num_counters;
|
|
|
|
|
2008-09-24 11:08:52 +02:00
|
|
|
int i;
|
2007-06-01 09:46:39 +02:00
|
|
|
for_each_possible_cpu(i) {
|
2010-02-25 20:20:25 +01:00
|
|
|
per_cpu(cpu_msrs, i).counters = kzalloc(counters_size,
|
2009-07-09 14:40:04 +02:00
|
|
|
GFP_KERNEL);
|
|
|
|
if (!per_cpu(cpu_msrs, i).counters)
|
2010-03-23 19:09:51 +01:00
|
|
|
goto fail;
|
2010-02-25 20:20:25 +01:00
|
|
|
per_cpu(cpu_msrs, i).controls = kzalloc(controls_size,
|
2009-07-09 14:40:04 +02:00
|
|
|
GFP_KERNEL);
|
|
|
|
if (!per_cpu(cpu_msrs, i).controls)
|
2010-03-23 19:09:51 +01:00
|
|
|
goto fail;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2010-03-23 19:09:51 +01:00
|
|
|
if (!nmi_setup_mux())
|
|
|
|
goto fail;
|
|
|
|
|
2009-07-09 14:40:04 +02:00
|
|
|
return 1;
|
2010-03-23 19:09:51 +01:00
|
|
|
|
|
|
|
fail:
|
|
|
|
free_msrs();
|
|
|
|
return 0;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2008-01-30 13:32:33 +01:00
|
|
|
static void nmi_cpu_setup(void *dummy)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
|
|
|
int cpu = smp_processor_id();
|
2008-03-25 23:06:59 +01:00
|
|
|
struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
|
2009-07-09 18:33:02 +02:00
|
|
|
nmi_cpu_save_registers(msrs);
|
2005-04-17 00:20:36 +02:00
|
|
|
spin_lock(&oprofilefs_lock);
|
2009-05-25 19:31:44 +02:00
|
|
|
model->setup_ctrs(model, msrs);
|
2009-07-09 19:23:50 +02:00
|
|
|
nmi_cpu_setup_mux(cpu, msrs);
|
2005-04-17 00:20:36 +02:00
|
|
|
spin_unlock(&oprofilefs_lock);
|
2008-03-25 23:06:59 +01:00
|
|
|
per_cpu(saved_lvtpc, cpu) = apic_read(APIC_LVTPC);
|
2005-04-17 00:20:36 +02:00
|
|
|
apic_write(APIC_LVTPC, APIC_DM_NMI);
|
|
|
|
}
|
|
|
|
|
2006-09-26 10:52:27 +02:00
|
|
|
static struct notifier_block profile_exceptions_nb = {
|
|
|
|
.notifier_call = profile_exceptions_notify,
|
|
|
|
.next = NULL,
|
2011-01-06 22:18:49 +01:00
|
|
|
.priority = NMI_LOCAL_LOW_PRIOR,
|
2006-09-26 10:52:27 +02:00
|
|
|
};
|
2005-04-17 00:20:36 +02:00
|
|
|
|
2009-07-09 18:33:02 +02:00
|
|
|
static void nmi_cpu_restore_registers(struct op_msrs *msrs)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
2008-01-30 13:32:33 +01:00
|
|
|
struct op_msr *counters = msrs->counters;
|
|
|
|
struct op_msr *controls = msrs->controls;
|
2005-04-17 00:20:36 +02:00
|
|
|
unsigned int i;
|
|
|
|
|
2009-06-05 15:54:24 +02:00
|
|
|
for (i = 0; i < model->num_controls; ++i) {
|
2009-06-03 19:09:27 +02:00
|
|
|
if (controls[i].addr)
|
|
|
|
wrmsrl(controls[i].addr, controls[i].saved);
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
2008-01-30 13:32:33 +01:00
|
|
|
|
2009-06-05 15:54:24 +02:00
|
|
|
for (i = 0; i < model->num_counters; ++i) {
|
2009-06-03 19:09:27 +02:00
|
|
|
if (counters[i].addr)
|
|
|
|
wrmsrl(counters[i].addr, counters[i].saved);
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-01-30 13:32:33 +01:00
|
|
|
static void nmi_cpu_shutdown(void *dummy)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
|
|
|
unsigned int v;
|
|
|
|
int cpu = smp_processor_id();
|
2009-07-09 16:29:34 +02:00
|
|
|
struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
|
2008-01-30 13:32:33 +01:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
/* restoring APIC_LVTPC can trigger an apic error because the delivery
|
|
|
|
* mode and vector nr combination can be illegal. That's by design: on
|
|
|
|
* power on apic lvt contain a zero vector nr which are legal only for
|
|
|
|
* NMI delivery mode. So inhibit apic err before restoring lvtpc
|
|
|
|
*/
|
|
|
|
v = apic_read(APIC_LVTERR);
|
|
|
|
apic_write(APIC_LVTERR, v | APIC_LVT_MASKED);
|
2008-03-25 23:06:59 +01:00
|
|
|
apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu));
|
2005-04-17 00:20:36 +02:00
|
|
|
apic_write(APIC_LVTERR, v);
|
2009-07-09 18:33:02 +02:00
|
|
|
nmi_cpu_restore_registers(msrs);
|
2010-05-05 17:47:17 +02:00
|
|
|
if (model->cpu_down)
|
|
|
|
model->cpu_down();
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2010-04-29 14:55:55 +02:00
|
|
|
static void nmi_cpu_up(void *dummy)
|
|
|
|
{
|
|
|
|
if (nmi_enabled)
|
|
|
|
nmi_cpu_setup(dummy);
|
|
|
|
if (ctr_running)
|
|
|
|
nmi_cpu_start(dummy);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nmi_cpu_down(void *dummy)
|
|
|
|
{
|
|
|
|
if (ctr_running)
|
|
|
|
nmi_cpu_stop(dummy);
|
|
|
|
if (nmi_enabled)
|
|
|
|
nmi_cpu_shutdown(dummy);
|
|
|
|
}
|
|
|
|
|
2008-01-30 13:32:33 +01:00
|
|
|
static int nmi_create_files(struct super_block *sb, struct dentry *root)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
2009-07-08 13:49:38 +02:00
|
|
|
for (i = 0; i < model->num_virt_counters; ++i) {
|
2008-01-30 13:32:33 +01:00
|
|
|
struct dentry *dir;
|
2006-06-26 09:24:34 +02:00
|
|
|
char buf[4];
|
2008-01-30 13:32:33 +01:00
|
|
|
|
|
|
|
/* quick little hack to _not_ expose a counter if it is not
|
2006-09-26 10:52:26 +02:00
|
|
|
* available for use. This should protect userspace app.
|
|
|
|
* NOTE: assumes 1:1 mapping here (that counters are organized
|
|
|
|
* sequentially in their struct assignment).
|
|
|
|
*/
|
2009-07-10 18:15:21 +02:00
|
|
|
if (!avail_to_resrv_perfctr_nmi_bit(op_x86_virt_to_phys(i)))
|
2006-09-26 10:52:26 +02:00
|
|
|
continue;
|
|
|
|
|
2006-06-26 09:24:34 +02:00
|
|
|
snprintf(buf, sizeof(buf), "%d", i);
|
2005-04-17 00:20:36 +02:00
|
|
|
dir = oprofilefs_mkdir(sb, root, buf);
|
2008-01-30 13:32:33 +01:00
|
|
|
oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user);
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2008-01-30 13:32:33 +01:00
|
|
|
|
2008-09-05 12:17:40 +02:00
|
|
|
static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
int cpu = (unsigned long)data;
|
|
|
|
switch (action) {
|
|
|
|
case CPU_DOWN_FAILED:
|
|
|
|
case CPU_ONLINE:
|
2010-04-29 14:55:55 +02:00
|
|
|
smp_call_function_single(cpu, nmi_cpu_up, NULL, 0);
|
2008-09-05 12:17:40 +02:00
|
|
|
break;
|
|
|
|
case CPU_DOWN_PREPARE:
|
2010-04-29 14:55:55 +02:00
|
|
|
smp_call_function_single(cpu, nmi_cpu_down, NULL, 1);
|
2008-09-05 12:17:40 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct notifier_block oprofile_cpu_nb = {
|
|
|
|
.notifier_call = oprofile_cpu_notifier
|
|
|
|
};
|
|
|
|
|
2010-05-03 15:52:26 +02:00
|
|
|
static int nmi_setup(void)
|
|
|
|
{
|
|
|
|
int err = 0;
|
|
|
|
int cpu;
|
|
|
|
|
|
|
|
if (!allocate_msrs())
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/* We need to serialize save and setup for HT because the subset
|
|
|
|
* of msrs are distinct for save and setup operations
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Assume saved/restored counters are the same on all CPUs */
|
|
|
|
err = model->fill_in_addresses(&per_cpu(cpu_msrs, 0));
|
|
|
|
if (err)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
|
|
if (!cpu)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
memcpy(per_cpu(cpu_msrs, cpu).counters,
|
|
|
|
per_cpu(cpu_msrs, 0).counters,
|
|
|
|
sizeof(struct op_msr) * model->num_counters);
|
|
|
|
|
|
|
|
memcpy(per_cpu(cpu_msrs, cpu).controls,
|
|
|
|
per_cpu(cpu_msrs, 0).controls,
|
|
|
|
sizeof(struct op_msr) * model->num_controls);
|
|
|
|
|
|
|
|
mux_clone(cpu);
|
|
|
|
}
|
|
|
|
|
|
|
|
nmi_enabled = 0;
|
|
|
|
ctr_running = 0;
|
|
|
|
barrier();
|
|
|
|
err = register_die_notifier(&profile_exceptions_nb);
|
|
|
|
if (err)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
get_online_cpus();
|
2010-05-03 15:00:25 +02:00
|
|
|
register_cpu_notifier(&oprofile_cpu_nb);
|
2010-05-03 15:52:26 +02:00
|
|
|
on_each_cpu(nmi_cpu_setup, NULL, 1);
|
|
|
|
nmi_enabled = 1;
|
|
|
|
put_online_cpus();
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
|
|
free_msrs();
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nmi_shutdown(void)
|
|
|
|
{
|
|
|
|
struct op_msrs *msrs;
|
|
|
|
|
|
|
|
get_online_cpus();
|
2010-05-03 15:00:25 +02:00
|
|
|
unregister_cpu_notifier(&oprofile_cpu_nb);
|
2010-05-03 15:52:26 +02:00
|
|
|
on_each_cpu(nmi_cpu_shutdown, NULL, 1);
|
|
|
|
nmi_enabled = 0;
|
|
|
|
ctr_running = 0;
|
|
|
|
put_online_cpus();
|
|
|
|
barrier();
|
|
|
|
unregister_die_notifier(&profile_exceptions_nb);
|
|
|
|
msrs = &get_cpu_var(cpu_msrs);
|
|
|
|
model->shutdown(msrs);
|
|
|
|
free_msrs();
|
|
|
|
put_cpu_var(cpu_msrs);
|
|
|
|
}
|
|
|
|
|
2008-09-05 12:17:40 +02:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
2011-03-23 22:15:54 +01:00
|
|
|
static int nmi_suspend(void)
|
2008-09-05 12:17:40 +02:00
|
|
|
{
|
|
|
|
/* Only one CPU left, just stop that one */
|
|
|
|
if (nmi_enabled == 1)
|
|
|
|
nmi_cpu_stop(NULL);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-03-23 22:15:54 +01:00
|
|
|
static void nmi_resume(void)
|
2008-09-05 12:17:40 +02:00
|
|
|
{
|
|
|
|
if (nmi_enabled == 1)
|
|
|
|
nmi_cpu_start(NULL);
|
|
|
|
}
|
|
|
|
|
2011-03-23 22:15:54 +01:00
|
|
|
static struct syscore_ops oprofile_syscore_ops = {
|
2008-09-05 12:17:40 +02:00
|
|
|
.resume = nmi_resume,
|
|
|
|
.suspend = nmi_suspend,
|
|
|
|
};
|
|
|
|
|
2011-03-23 22:15:54 +01:00
|
|
|
static void __init init_suspend_resume(void)
|
2008-09-05 12:17:40 +02:00
|
|
|
{
|
2011-03-23 22:15:54 +01:00
|
|
|
register_syscore_ops(&oprofile_syscore_ops);
|
2008-09-05 12:17:40 +02:00
|
|
|
}
|
|
|
|
|
2011-03-23 22:15:54 +01:00
|
|
|
static void exit_suspend_resume(void)
|
2008-09-05 12:17:40 +02:00
|
|
|
{
|
2011-03-23 22:15:54 +01:00
|
|
|
unregister_syscore_ops(&oprofile_syscore_ops);
|
2008-09-05 12:17:40 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
2010-09-01 14:50:50 +02:00
|
|
|
|
2011-03-23 22:15:54 +01:00
|
|
|
static inline void init_suspend_resume(void) { }
|
|
|
|
static inline void exit_suspend_resume(void) { }
|
2010-09-01 14:50:50 +02:00
|
|
|
|
2008-09-05 12:17:40 +02:00
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
2008-01-30 13:32:33 +01:00
|
|
|
static int __init p4_init(char **cpu_type)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
|
|
|
__u8 cpu_model = boot_cpu_data.x86_model;
|
|
|
|
|
2009-04-27 17:44:12 +02:00
|
|
|
if (cpu_model > 6 || cpu_model == 5)
|
2005-04-17 00:20:36 +02:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
#ifndef CONFIG_SMP
|
|
|
|
*cpu_type = "i386/p4";
|
|
|
|
model = &op_p4_spec;
|
|
|
|
return 1;
|
|
|
|
#else
|
|
|
|
switch (smp_num_siblings) {
|
2008-01-30 13:32:33 +01:00
|
|
|
case 1:
|
|
|
|
*cpu_type = "i386/p4";
|
|
|
|
model = &op_p4_spec;
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
*cpu_type = "i386/p4-ht";
|
|
|
|
model = &op_p4_ht2_spec;
|
|
|
|
return 1;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
printk(KERN_INFO "oprofile: P4 HyperThreading detected with > 2 threads\n");
|
|
|
|
printk(KERN_INFO "oprofile: Reverting to timer mode.\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-05-06 12:10:23 +02:00
|
|
|
static int force_arch_perfmon;
|
|
|
|
static int force_cpu_type(const char *str, struct kernel_param *kp)
|
|
|
|
{
|
2009-06-23 11:48:14 +02:00
|
|
|
if (!strcmp(str, "arch_perfmon")) {
|
2009-05-06 12:10:23 +02:00
|
|
|
force_arch_perfmon = 1;
|
|
|
|
printk(KERN_INFO "oprofile: forcing architectural perfmon\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
module_param_call(cpu_type, force_cpu_type, NULL, NULL, 0);
|
2009-04-27 17:44:11 +02:00
|
|
|
|
2008-01-30 13:32:33 +01:00
|
|
|
static int __init ppro_init(char **cpu_type)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
|
|
|
__u8 cpu_model = boot_cpu_data.x86_model;
|
2009-07-09 15:12:35 +02:00
|
|
|
struct op_x86_model_spec *spec = &op_ppro_spec; /* default */
|
2005-04-17 00:20:36 +02:00
|
|
|
|
2009-04-27 17:44:11 +02:00
|
|
|
if (force_arch_perfmon && cpu_has_arch_perfmon)
|
|
|
|
return 0;
|
|
|
|
|
2010-05-07 18:41:40 +02:00
|
|
|
/*
|
|
|
|
* Documentation on identifying Intel processors by CPU family
|
|
|
|
* and model can be found in the Intel Software Developer's
|
|
|
|
* Manuals (SDM):
|
|
|
|
*
|
|
|
|
* http://www.intel.com/products/processor/manuals/
|
|
|
|
*
|
|
|
|
* As of May 2010 the documentation for this was in the:
|
|
|
|
* "Intel 64 and IA-32 Architectures Software Developer's
|
|
|
|
* Manual Volume 3B: System Programming Guide", "Table B-1
|
|
|
|
* CPUID Signature Values of DisplayFamily_DisplayModel".
|
|
|
|
*/
|
2008-07-25 02:29:00 +02:00
|
|
|
switch (cpu_model) {
|
|
|
|
case 0 ... 2:
|
|
|
|
*cpu_type = "i386/ppro";
|
|
|
|
break;
|
|
|
|
case 3 ... 5:
|
|
|
|
*cpu_type = "i386/pii";
|
|
|
|
break;
|
|
|
|
case 6 ... 8:
|
2008-11-30 21:39:10 +01:00
|
|
|
case 10 ... 11:
|
2008-07-25 02:29:00 +02:00
|
|
|
*cpu_type = "i386/piii";
|
|
|
|
break;
|
|
|
|
case 9:
|
2008-11-30 21:39:10 +01:00
|
|
|
case 13:
|
2008-07-25 02:29:00 +02:00
|
|
|
*cpu_type = "i386/p6_mobile";
|
|
|
|
break;
|
|
|
|
case 14:
|
2006-05-15 18:44:24 +02:00
|
|
|
*cpu_type = "i386/core";
|
2008-07-25 02:29:00 +02:00
|
|
|
break;
|
2010-09-08 16:34:28 +02:00
|
|
|
case 0x0f:
|
|
|
|
case 0x16:
|
|
|
|
case 0x17:
|
2010-09-21 09:26:35 +02:00
|
|
|
case 0x1d:
|
2008-07-25 02:29:00 +02:00
|
|
|
*cpu_type = "i386/core_2";
|
|
|
|
break;
|
2010-05-07 18:41:40 +02:00
|
|
|
case 0x1a:
|
2010-08-05 02:27:05 +02:00
|
|
|
case 0x1e:
|
2010-01-21 23:26:27 +01:00
|
|
|
case 0x2e:
|
2009-06-12 18:32:07 +02:00
|
|
|
spec = &op_arch_perfmon_spec;
|
2009-04-27 17:44:13 +02:00
|
|
|
*cpu_type = "i386/core_i7";
|
|
|
|
break;
|
2010-05-07 18:41:40 +02:00
|
|
|
case 0x1c:
|
2009-04-27 17:44:13 +02:00
|
|
|
*cpu_type = "i386/atom";
|
|
|
|
break;
|
2008-07-25 02:29:00 +02:00
|
|
|
default:
|
|
|
|
/* Unknown */
|
2005-04-17 00:20:36 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-06-12 18:32:07 +02:00
|
|
|
model = spec;
|
2005-04-17 00:20:36 +02:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2005-09-07 00:17:26 +02:00
|
|
|
int __init op_nmi_init(struct oprofile_operations *ops)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
|
|
|
__u8 vendor = boot_cpu_data.x86_vendor;
|
|
|
|
__u8 family = boot_cpu_data.x86;
|
2008-08-18 14:50:31 +02:00
|
|
|
char *cpu_type = NULL;
|
2008-07-22 21:08:48 +02:00
|
|
|
int ret = 0;
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
if (!cpu_has_apic)
|
|
|
|
return -ENODEV;
|
2008-01-30 13:32:33 +01:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
switch (vendor) {
|
2008-01-30 13:32:33 +01:00
|
|
|
case X86_VENDOR_AMD:
|
|
|
|
/* Needs to be at least an Athlon (or hammer in 32bit mode) */
|
2005-04-17 00:20:36 +02:00
|
|
|
|
2008-01-30 13:32:33 +01:00
|
|
|
switch (family) {
|
|
|
|
case 6:
|
|
|
|
cpu_type = "i386/athlon";
|
|
|
|
break;
|
|
|
|
case 0xf:
|
2009-01-11 13:01:16 +01:00
|
|
|
/*
|
|
|
|
* Actually it could be i386/hammer too, but
|
|
|
|
* give user space an consistent name.
|
|
|
|
*/
|
2008-01-30 13:32:33 +01:00
|
|
|
cpu_type = "x86-64/hammer";
|
|
|
|
break;
|
|
|
|
case 0x10:
|
|
|
|
cpu_type = "x86-64/family10";
|
|
|
|
break;
|
2008-07-22 21:08:47 +02:00
|
|
|
case 0x11:
|
|
|
|
cpu_type = "x86-64/family11h";
|
|
|
|
break;
|
2010-08-31 10:44:17 +02:00
|
|
|
case 0x12:
|
|
|
|
cpu_type = "x86-64/family12h";
|
|
|
|
break;
|
2010-08-26 12:30:17 +02:00
|
|
|
case 0x14:
|
|
|
|
cpu_type = "x86-64/family14h";
|
|
|
|
break;
|
2010-08-31 10:44:38 +02:00
|
|
|
case 0x15:
|
|
|
|
cpu_type = "x86-64/family15h";
|
|
|
|
break;
|
2009-01-11 13:01:16 +01:00
|
|
|
default:
|
|
|
|
return -ENODEV;
|
2008-01-30 13:32:33 +01:00
|
|
|
}
|
2009-01-11 13:01:16 +01:00
|
|
|
model = &op_amd_spec;
|
2008-01-30 13:32:33 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case X86_VENDOR_INTEL:
|
|
|
|
switch (family) {
|
|
|
|
/* Pentium IV */
|
|
|
|
case 0xf:
|
2008-08-18 14:50:31 +02:00
|
|
|
p4_init(&cpu_type);
|
2005-04-17 00:20:36 +02:00
|
|
|
break;
|
2008-01-30 13:32:33 +01:00
|
|
|
|
|
|
|
/* A P6-class processor */
|
|
|
|
case 6:
|
2008-08-18 14:50:31 +02:00
|
|
|
ppro_init(&cpu_type);
|
2005-04-17 00:20:36 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2008-08-18 14:50:31 +02:00
|
|
|
break;
|
2008-01-30 13:32:33 +01:00
|
|
|
}
|
2008-08-18 14:50:31 +02:00
|
|
|
|
2008-10-12 21:12:34 +02:00
|
|
|
if (cpu_type)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (!cpu_has_arch_perfmon)
|
2008-08-18 14:50:31 +02:00
|
|
|
return -ENODEV;
|
2008-10-12 21:12:34 +02:00
|
|
|
|
|
|
|
/* use arch perfmon as fallback */
|
|
|
|
cpu_type = "i386/arch_perfmon";
|
|
|
|
model = &op_arch_perfmon_spec;
|
2008-01-30 13:32:33 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return -ENODEV;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2008-07-22 21:09:01 +02:00
|
|
|
/* default values, can be overwritten by model */
|
2009-07-07 19:25:39 +02:00
|
|
|
ops->create_files = nmi_create_files;
|
|
|
|
ops->setup = nmi_setup;
|
|
|
|
ops->shutdown = nmi_shutdown;
|
|
|
|
ops->start = nmi_start;
|
|
|
|
ops->stop = nmi_stop;
|
|
|
|
ops->cpu_type = cpu_type;
|
2008-07-22 21:09:01 +02:00
|
|
|
|
2008-07-22 21:08:48 +02:00
|
|
|
if (model->init)
|
|
|
|
ret = model->init(ops);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2009-07-06 14:43:55 +02:00
|
|
|
if (!model->num_virt_counters)
|
|
|
|
model->num_virt_counters = model->num_counters;
|
|
|
|
|
2009-07-09 16:02:44 +02:00
|
|
|
mux_init(ops);
|
|
|
|
|
2011-03-23 22:15:54 +01:00
|
|
|
init_suspend_resume();
|
2010-08-30 10:56:18 +02:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
printk(KERN_INFO "oprofile: using NMI interrupt.\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-09-07 00:17:26 +02:00
|
|
|
void op_nmi_exit(void)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
2011-03-23 22:15:54 +01:00
|
|
|
exit_suspend_resume();
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|