2006-11-30 16:23:18 +01:00
|
|
|
/*
|
2008-08-05 17:14:15 +02:00
|
|
|
* arch/arm/mach-at91/include/mach/at91_shdwc.h
|
2006-11-30 16:23:18 +01:00
|
|
|
*
|
2008-09-18 22:44:20 +02:00
|
|
|
* Copyright (C) 2007 Andrew Victor
|
|
|
|
* Copyright (C) 2007 Atmel Corporation.
|
|
|
|
*
|
2006-11-30 16:23:18 +01:00
|
|
|
* Shutdown Controller (SHDWC) - System peripherals regsters.
|
|
|
|
* Based on AT91SAM9261 datasheet revision D.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
|
|
* (at your option) any later version.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef AT91_SHDWC_H
|
|
|
|
#define AT91_SHDWC_H
|
|
|
|
|
2011-10-31 18:23:20 +01:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
extern void __iomem *at91_shdwc_base;
|
|
|
|
|
|
|
|
#define at91_shdwc_read(field) \
|
|
|
|
__raw_readl(at91_shdwc_base + field)
|
|
|
|
|
|
|
|
#define at91_shdwc_write(field, value) \
|
2013-04-07 16:49:59 +02:00
|
|
|
__raw_writel(value, at91_shdwc_base + field)
|
2011-10-31 18:23:20 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
|
2007-05-31 11:16:00 +02:00
|
|
|
#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
|
|
|
|
#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
|
2006-11-30 16:23:18 +01:00
|
|
|
|
2011-10-31 18:23:20 +01:00
|
|
|
#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
|
2006-11-30 16:23:18 +01:00
|
|
|
#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
|
|
|
|
#define AT91_SHDW_WKMODE0_NONE 0
|
|
|
|
#define AT91_SHDW_WKMODE0_HIGH 1
|
|
|
|
#define AT91_SHDW_WKMODE0_LOW 2
|
|
|
|
#define AT91_SHDW_WKMODE0_ANYLEVEL 3
|
2012-03-02 14:01:00 +01:00
|
|
|
#define AT91_SHDW_CPTWK0_MAX 0xf /* Maximum Counter On Wake Up 0 */
|
|
|
|
#define AT91_SHDW_CPTWK0 (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
|
2008-04-02 22:52:19 +02:00
|
|
|
#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
|
2006-11-30 16:23:18 +01:00
|
|
|
#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
|
2012-03-02 14:01:00 +01:00
|
|
|
#define AT91_SHDW_RTCWKEN (1 << 17) /* Real Time Clock Wake-up Enable */
|
2006-11-30 16:23:18 +01:00
|
|
|
|
2011-10-31 18:23:20 +01:00
|
|
|
#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
|
2006-11-30 16:23:18 +01:00
|
|
|
#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
|
|
|
|
#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
|
2008-04-02 22:52:19 +02:00
|
|
|
#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
|
2006-11-30 16:23:18 +01:00
|
|
|
|
|
|
|
#endif
|