2008-10-16 11:32:24 +02:00
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/*
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* Common interrupt code for 32 and 64 bit
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*/
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#include <linux/cpu.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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2010-11-12 06:45:26 +01:00
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#include <linux/of.h>
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2008-10-16 11:32:24 +02:00
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#include <linux/seq_file.h>
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2009-01-04 11:52:17 +01:00
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#include <linux/smp.h>
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2009-02-06 23:09:41 +01:00
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#include <linux/ftrace.h>
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2011-03-25 15:20:14 +01:00
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#include <linux/delay.h>
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2011-05-26 18:22:53 +02:00
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#include <linux/export.h>
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2008-10-16 11:32:24 +02:00
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2009-02-17 13:58:15 +01:00
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#include <asm/apic.h>
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2008-10-16 11:32:24 +02:00
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#include <asm/io_apic.h>
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2008-12-23 15:15:17 +01:00
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#include <asm/irq.h>
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2009-02-06 23:09:41 +01:00
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#include <asm/idle.h>
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2009-05-27 21:56:52 +02:00
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#include <asm/mce.h>
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2009-04-10 20:33:10 +02:00
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#include <asm/hw_irq.h>
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2014-05-13 17:39:34 +02:00
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#include <asm/desc.h>
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2013-06-21 16:29:05 +02:00
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#define CREATE_TRACE_POINTS
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x86, trace: Add irq vector tracepoints
[Purpose of this patch]
As Vaibhav explained in the thread below, tracepoints for irq vectors
are useful.
http://www.spinics.net/lists/mm-commits/msg85707.html
<snip>
The current interrupt traces from irq_handler_entry and irq_handler_exit
provide when an interrupt is handled. They provide good data about when
the system has switched to kernel space and how it affects the currently
running processes.
There are some IRQ vectors which trigger the system into kernel space,
which are not handled in generic IRQ handlers. Tracing such events gives
us the information about IRQ interaction with other system events.
The trace also tells where the system is spending its time. We want to
know which cores are handling interrupts and how they are affecting other
processes in the system. Also, the trace provides information about when
the cores are idle and which interrupts are changing that state.
<snip>
On the other hand, my usecase is tracing just local timer event and
getting a value of instruction pointer.
I suggested to add an argument local timer event to get instruction pointer before.
But there is another way to get it with external module like systemtap.
So, I don't need to add any argument to irq vector tracepoints now.
[Patch Description]
Vaibhav's patch shared a trace point ,irq_vector_entry/irq_vector_exit, in all events.
But there is an above use case to trace specific irq_vector rather than tracing all events.
In this case, we are concerned about overhead due to unwanted events.
So, add following tracepoints instead of introducing irq_vector_entry/exit.
so that we can enable them independently.
- local_timer_vector
- reschedule_vector
- call_function_vector
- call_function_single_vector
- irq_work_entry_vector
- error_apic_vector
- thermal_apic_vector
- threshold_apic_vector
- spurious_apic_vector
- x86_platform_ipi_vector
Also, introduce a logic switching IDT at enabling/disabling time so that a time penalty
makes a zero when tracepoints are disabled. Detailed explanations are as follows.
- Create trace irq handlers with entering_irq()/exiting_irq().
- Create a new IDT, trace_idt_table, at boot time by adding a logic to
_set_gate(). It is just a copy of original idt table.
- Register the new handlers for tracpoints to the new IDT by introducing
macros to alloc_intr_gate() called at registering time of irq_vector handlers.
- Add checking, whether irq vector tracing is on/off, into load_current_idt().
This has to be done below debug checking for these reasons.
- Switching to debug IDT may be kicked while tracing is enabled.
- On the other hands, switching to trace IDT is kicked only when debugging
is disabled.
In addition, the new IDT is created only when CONFIG_TRACING is enabled to avoid being
used for other purposes.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C323ED.5050708@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 17:46:53 +02:00
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#include <asm/trace/irq_vectors.h>
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2008-10-16 11:32:24 +02:00
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atomic_t irq_err_count;
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2009-03-04 19:56:05 +01:00
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/* Function pointer for generic interrupt vector handling */
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2009-10-14 16:22:57 +02:00
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void (*x86_platform_ipi_callback)(void) = NULL;
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2009-03-04 19:56:05 +01:00
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2008-10-16 12:18:50 +02:00
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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2009-04-12 18:47:39 +02:00
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if (printk_ratelimit())
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pr_err("unexpected IRQ trap at vector %02x\n", irq);
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2008-10-16 12:18:50 +02:00
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/*
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* Currently unexpected vectors happen only on SMP and APIC.
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* We _must_ ack these because every local APIC has only N
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* irq slots per priority level, and a 'hanging, unacked' IRQ
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* holds up an irq slot - in excessive cases (when multiple
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* unexpected vectors occur) that might lock up the APIC
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* completely.
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* But only ack when the APIC is enabled -AK
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*/
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2009-04-12 18:47:41 +02:00
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ack_APIC_irq();
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2008-10-16 12:18:50 +02:00
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}
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2009-01-18 16:38:57 +01:00
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#define irq_stats(x) (&per_cpu(irq_stat, x))
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2008-10-16 11:32:24 +02:00
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/*
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2010-12-16 17:59:57 +01:00
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* /proc/interrupts printing for arch specific interrupts
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2008-10-16 11:32:24 +02:00
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*/
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2010-12-16 17:59:57 +01:00
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int arch_show_interrupts(struct seq_file *p, int prec)
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2008-10-16 11:32:24 +02:00
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{
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int j;
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: ", prec, "NMI");
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2008-10-16 11:32:24 +02:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
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seq_printf(p, " Non-maskable interrupts\n");
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#ifdef CONFIG_X86_LOCAL_APIC
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: ", prec, "LOC");
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2008-10-16 11:32:24 +02:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
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seq_printf(p, " Local timer interrupts\n");
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2009-03-22 21:38:34 +01:00
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seq_printf(p, "%*s: ", prec, "SPU");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
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seq_printf(p, " Spurious interrupts\n");
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2009-10-14 12:50:39 +02:00
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seq_printf(p, "%*s: ", prec, "PMI");
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2008-12-03 10:39:53 +01:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
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2009-10-14 12:50:39 +02:00
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seq_printf(p, " Performance monitoring interrupts\n");
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2010-10-14 08:01:34 +02:00
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seq_printf(p, "%*s: ", prec, "IWI");
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2009-04-06 11:45:03 +02:00
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for_each_online_cpu(j)
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2010-10-14 08:01:34 +02:00
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seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs);
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seq_printf(p, " IRQ work interrupts\n");
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2011-12-13 03:51:53 +01:00
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seq_printf(p, "%*s: ", prec, "RTR");
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for_each_online_cpu(j)
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2011-12-15 03:32:24 +01:00
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seq_printf(p, "%10u ", irq_stats(j)->icr_read_retry_count);
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2011-12-13 03:51:53 +01:00
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seq_printf(p, " APIC ICR read retries\n");
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2008-10-16 11:32:24 +02:00
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#endif
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2009-10-14 16:22:57 +02:00
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if (x86_platform_ipi_callback) {
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2009-03-25 02:50:34 +01:00
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seq_printf(p, "%*s: ", prec, "PLT");
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2009-03-04 19:56:05 +01:00
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for_each_online_cpu(j)
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2009-10-14 16:22:57 +02:00
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seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
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2009-03-04 19:56:05 +01:00
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seq_printf(p, " Platform interrupts\n");
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}
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2008-10-16 11:32:24 +02:00
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#ifdef CONFIG_SMP
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: ", prec, "RES");
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2008-10-16 11:32:24 +02:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
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seq_printf(p, " Rescheduling interrupts\n");
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: ", prec, "CAL");
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2008-10-16 11:32:24 +02:00
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for_each_online_cpu(j)
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2012-09-26 04:11:28 +02:00
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seq_printf(p, "%10u ", irq_stats(j)->irq_call_count -
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irq_stats(j)->irq_tlb_count);
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2008-10-16 11:32:24 +02:00
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seq_printf(p, " Function call interrupts\n");
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: ", prec, "TLB");
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2008-10-16 11:32:24 +02:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
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seq_printf(p, " TLB shootdowns\n");
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#endif
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2009-11-20 15:03:05 +01:00
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#ifdef CONFIG_X86_THERMAL_VECTOR
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: ", prec, "TRM");
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2008-10-16 11:32:24 +02:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
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seq_printf(p, " Thermal event interrupts\n");
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2009-11-20 15:03:05 +01:00
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#endif
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#ifdef CONFIG_X86_MCE_THRESHOLD
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: ", prec, "THR");
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2008-10-16 11:32:24 +02:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
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seq_printf(p, " Threshold APIC interrupts\n");
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2009-05-27 21:56:52 +02:00
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#endif
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2009-07-09 00:31:41 +02:00
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#ifdef CONFIG_X86_MCE
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2009-05-27 21:56:52 +02:00
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seq_printf(p, "%*s: ", prec, "MCE");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
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seq_printf(p, " Machine check exceptions\n");
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2009-05-27 21:56:57 +02:00
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seq_printf(p, "%*s: ", prec, "MCP");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
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seq_printf(p, " Machine check polls\n");
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2008-10-16 11:32:24 +02:00
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#endif
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2014-04-02 08:51:42 +02:00
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#if IS_ENABLED(CONFIG_HYPERV) || defined(CONFIG_XEN)
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2014-02-23 22:40:20 +01:00
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seq_printf(p, "%*s: ", prec, "THR");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_hv_callback_count);
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seq_printf(p, " Hypervisor callback interrupts\n");
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#endif
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
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2008-10-16 11:32:24 +02:00
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#if defined(CONFIG_X86_IO_APIC)
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2009-03-12 13:45:15 +01:00
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seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
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2008-10-16 11:32:24 +02:00
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#endif
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return 0;
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}
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/*
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* /proc/stat helpers
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*/
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u64 arch_irq_stat_cpu(unsigned int cpu)
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{
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u64 sum = irq_stats(cpu)->__nmi_count;
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#ifdef CONFIG_X86_LOCAL_APIC
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sum += irq_stats(cpu)->apic_timer_irqs;
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2009-03-22 21:38:34 +01:00
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sum += irq_stats(cpu)->irq_spurious_count;
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2008-12-03 10:39:53 +01:00
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sum += irq_stats(cpu)->apic_perf_irqs;
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2010-10-14 08:01:34 +02:00
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sum += irq_stats(cpu)->apic_irq_work_irqs;
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2011-12-15 03:32:24 +01:00
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sum += irq_stats(cpu)->icr_read_retry_count;
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2008-10-16 11:32:24 +02:00
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#endif
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2009-10-14 16:22:57 +02:00
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if (x86_platform_ipi_callback)
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sum += irq_stats(cpu)->x86_platform_ipis;
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2008-10-16 11:32:24 +02:00
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#ifdef CONFIG_SMP
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sum += irq_stats(cpu)->irq_resched_count;
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sum += irq_stats(cpu)->irq_call_count;
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#endif
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2009-11-20 15:03:05 +01:00
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#ifdef CONFIG_X86_THERMAL_VECTOR
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2008-10-16 11:32:24 +02:00
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sum += irq_stats(cpu)->irq_thermal_count;
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2009-11-20 15:03:05 +01:00
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#endif
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#ifdef CONFIG_X86_MCE_THRESHOLD
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2008-10-16 11:32:24 +02:00
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sum += irq_stats(cpu)->irq_threshold_count;
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2009-06-02 09:53:23 +02:00
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#endif
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2009-07-09 00:31:41 +02:00
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#ifdef CONFIG_X86_MCE
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2009-06-02 09:53:23 +02:00
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sum += per_cpu(mce_exception_count, cpu);
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sum += per_cpu(mce_poll_count, cpu);
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2008-10-16 11:32:24 +02:00
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#endif
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return sum;
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}
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u64 arch_irq_stat(void)
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{
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u64 sum = atomic_read(&irq_err_count);
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return sum;
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}
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2008-12-23 15:15:17 +01:00
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2009-02-06 23:09:41 +01:00
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/*
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* do_IRQ handles all normal device IRQ's (the special
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* SMP cross-CPU interrupts have their own specific
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* handlers).
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*/
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2013-08-06 00:02:37 +02:00
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__visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
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2009-02-06 23:09:41 +01:00
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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/* high bit used in ret_from_ code */
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unsigned vector = ~regs->orig_ax;
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unsigned irq;
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irq_enter();
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2011-10-07 18:22:09 +02:00
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exit_idle();
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2009-02-06 23:09:41 +01:00
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2010-12-18 16:28:55 +01:00
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irq = __this_cpu_read(vector_irq[vector]);
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2009-02-06 23:09:41 +01:00
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if (!handle_irq(irq, regs)) {
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2009-04-12 18:47:41 +02:00
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ack_APIC_irq();
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2009-02-06 23:09:41 +01:00
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2014-01-05 17:10:52 +01:00
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if (irq != VECTOR_RETRIGGERED) {
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pr_emerg_ratelimited("%s: %d.%d No irq handler for vector (irq %d)\n",
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__func__, smp_processor_id(),
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vector, irq);
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} else {
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__this_cpu_write(vector_irq[vector], VECTOR_UNDEFINED);
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}
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2009-02-06 23:09:41 +01:00
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}
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irq_exit();
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set_irq_regs(old_regs);
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return 1;
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}
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2009-03-04 19:56:05 +01:00
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/*
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2009-10-14 16:22:57 +02:00
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* Handler for X86_PLATFORM_IPI_VECTOR.
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2009-03-04 19:56:05 +01:00
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*/
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x86, trace: Introduce entering/exiting_irq()
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 17:45:17 +02:00
|
|
|
void __smp_x86_platform_ipi(void)
|
2009-03-04 19:56:05 +01:00
|
|
|
{
|
2009-10-14 16:22:57 +02:00
|
|
|
inc_irq_stat(x86_platform_ipis);
|
2009-03-04 19:56:05 +01:00
|
|
|
|
2009-10-14 16:22:57 +02:00
|
|
|
if (x86_platform_ipi_callback)
|
|
|
|
x86_platform_ipi_callback();
|
x86, trace: Introduce entering/exiting_irq()
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 17:45:17 +02:00
|
|
|
}
|
2009-03-04 19:56:05 +01:00
|
|
|
|
2013-08-06 00:02:37 +02:00
|
|
|
__visible void smp_x86_platform_ipi(struct pt_regs *regs)
|
x86, trace: Introduce entering/exiting_irq()
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 17:45:17 +02:00
|
|
|
{
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
2009-03-04 19:56:05 +01:00
|
|
|
|
x86, trace: Introduce entering/exiting_irq()
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 17:45:17 +02:00
|
|
|
entering_ack_irq();
|
|
|
|
__smp_x86_platform_ipi();
|
|
|
|
exiting_irq();
|
2009-03-04 19:56:05 +01:00
|
|
|
set_irq_regs(old_regs);
|
|
|
|
}
|
|
|
|
|
2013-04-11 13:25:11 +02:00
|
|
|
#ifdef CONFIG_HAVE_KVM
|
|
|
|
/*
|
|
|
|
* Handler for POSTED_INTERRUPT_VECTOR.
|
|
|
|
*/
|
2013-08-06 00:02:37 +02:00
|
|
|
__visible void smp_kvm_posted_intr_ipi(struct pt_regs *regs)
|
2013-04-11 13:25:11 +02:00
|
|
|
{
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
|
|
|
|
ack_APIC_irq();
|
|
|
|
|
|
|
|
irq_enter();
|
|
|
|
|
|
|
|
exit_idle();
|
|
|
|
|
|
|
|
inc_irq_stat(kvm_posted_intr_ipis);
|
|
|
|
|
|
|
|
irq_exit();
|
|
|
|
|
|
|
|
set_irq_regs(old_regs);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2013-08-06 00:02:37 +02:00
|
|
|
__visible void smp_trace_x86_platform_ipi(struct pt_regs *regs)
|
x86, trace: Add irq vector tracepoints
[Purpose of this patch]
As Vaibhav explained in the thread below, tracepoints for irq vectors
are useful.
http://www.spinics.net/lists/mm-commits/msg85707.html
<snip>
The current interrupt traces from irq_handler_entry and irq_handler_exit
provide when an interrupt is handled. They provide good data about when
the system has switched to kernel space and how it affects the currently
running processes.
There are some IRQ vectors which trigger the system into kernel space,
which are not handled in generic IRQ handlers. Tracing such events gives
us the information about IRQ interaction with other system events.
The trace also tells where the system is spending its time. We want to
know which cores are handling interrupts and how they are affecting other
processes in the system. Also, the trace provides information about when
the cores are idle and which interrupts are changing that state.
<snip>
On the other hand, my usecase is tracing just local timer event and
getting a value of instruction pointer.
I suggested to add an argument local timer event to get instruction pointer before.
But there is another way to get it with external module like systemtap.
So, I don't need to add any argument to irq vector tracepoints now.
[Patch Description]
Vaibhav's patch shared a trace point ,irq_vector_entry/irq_vector_exit, in all events.
But there is an above use case to trace specific irq_vector rather than tracing all events.
In this case, we are concerned about overhead due to unwanted events.
So, add following tracepoints instead of introducing irq_vector_entry/exit.
so that we can enable them independently.
- local_timer_vector
- reschedule_vector
- call_function_vector
- call_function_single_vector
- irq_work_entry_vector
- error_apic_vector
- thermal_apic_vector
- threshold_apic_vector
- spurious_apic_vector
- x86_platform_ipi_vector
Also, introduce a logic switching IDT at enabling/disabling time so that a time penalty
makes a zero when tracepoints are disabled. Detailed explanations are as follows.
- Create trace irq handlers with entering_irq()/exiting_irq().
- Create a new IDT, trace_idt_table, at boot time by adding a logic to
_set_gate(). It is just a copy of original idt table.
- Register the new handlers for tracpoints to the new IDT by introducing
macros to alloc_intr_gate() called at registering time of irq_vector handlers.
- Add checking, whether irq vector tracing is on/off, into load_current_idt().
This has to be done below debug checking for these reasons.
- Switching to debug IDT may be kicked while tracing is enabled.
- On the other hands, switching to trace IDT is kicked only when debugging
is disabled.
In addition, the new IDT is created only when CONFIG_TRACING is enabled to avoid being
used for other purposes.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C323ED.5050708@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 17:46:53 +02:00
|
|
|
{
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
|
|
|
|
entering_ack_irq();
|
|
|
|
trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR);
|
|
|
|
__smp_x86_platform_ipi();
|
|
|
|
trace_x86_platform_ipi_exit(X86_PLATFORM_IPI_VECTOR);
|
|
|
|
exiting_irq();
|
|
|
|
set_irq_regs(old_regs);
|
|
|
|
}
|
|
|
|
|
2008-12-23 15:15:17 +01:00
|
|
|
EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
|
2009-10-26 23:24:31 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
2014-01-28 14:22:11 +01:00
|
|
|
|
|
|
|
/* These two declarations are only used in check_irq_vectors_for_cpu_disable()
|
|
|
|
* below, which is protected by stop_machine(). Putting them on the stack
|
|
|
|
* results in a stack frame overflow. Dynamically allocating could result in a
|
|
|
|
* failure so declare these two cpumasks as global.
|
|
|
|
*/
|
|
|
|
static struct cpumask affinity_new, online_new;
|
|
|
|
|
x86: Add check for number of available vectors before CPU down
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=64791
When a cpu is downed on a system, the irqs on the cpu are assigned to
other cpus. It is possible, however, that when a cpu is downed there
aren't enough free vectors on the remaining cpus to account for the
vectors from the cpu that is being downed.
This results in an interesting "overflow" condition where irqs are
"assigned" to a CPU but are not handled.
For example, when downing cpus on a 1-64 logical processor system:
<snip>
[ 232.021745] smpboot: CPU 61 is now offline
[ 238.480275] smpboot: CPU 62 is now offline
[ 245.991080] ------------[ cut here ]------------
[ 245.996270] WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:264 dev_watchdog+0x246/0x250()
[ 246.005688] NETDEV WATCHDOG: p786p1 (ixgbe): transmit queue 0 timed out
[ 246.013070] Modules linked in: lockd sunrpc iTCO_wdt iTCO_vendor_support sb_edac ixgbe microcode e1000e pcspkr joydev edac_core lpc_ich ioatdma ptp mdio mfd_core i2c_i801 dca pps_core i2c_core wmi acpi_cpufreq isci libsas scsi_transport_sas
[ 246.037633] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.12.0+ #14
[ 246.044451] Hardware name: Intel Corporation S4600LH ........../SVRBD-ROW_T, BIOS SE5C600.86B.01.08.0003.022620131521 02/26/2013
[ 246.057371] 0000000000000009 ffff88081fa03d40 ffffffff8164fbf6 ffff88081fa0ee48
[ 246.065728] ffff88081fa03d90 ffff88081fa03d80 ffffffff81054ecc ffff88081fa13040
[ 246.074073] 0000000000000000 ffff88200cce0000 0000000000000040 0000000000000000
[ 246.082430] Call Trace:
[ 246.085174] <IRQ> [<ffffffff8164fbf6>] dump_stack+0x46/0x58
[ 246.091633] [<ffffffff81054ecc>] warn_slowpath_common+0x8c/0xc0
[ 246.098352] [<ffffffff81054fb6>] warn_slowpath_fmt+0x46/0x50
[ 246.104786] [<ffffffff815710d6>] dev_watchdog+0x246/0x250
[ 246.110923] [<ffffffff81570e90>] ? dev_deactivate_queue.constprop.31+0x80/0x80
[ 246.119097] [<ffffffff8106092a>] call_timer_fn+0x3a/0x110
[ 246.125224] [<ffffffff8106280f>] ? update_process_times+0x6f/0x80
[ 246.132137] [<ffffffff81570e90>] ? dev_deactivate_queue.constprop.31+0x80/0x80
[ 246.140308] [<ffffffff81061db0>] run_timer_softirq+0x1f0/0x2a0
[ 246.146933] [<ffffffff81059a80>] __do_softirq+0xe0/0x220
[ 246.152976] [<ffffffff8165fedc>] call_softirq+0x1c/0x30
[ 246.158920] [<ffffffff810045f5>] do_softirq+0x55/0x90
[ 246.164670] [<ffffffff81059d35>] irq_exit+0xa5/0xb0
[ 246.170227] [<ffffffff8166062a>] smp_apic_timer_interrupt+0x4a/0x60
[ 246.177324] [<ffffffff8165f40a>] apic_timer_interrupt+0x6a/0x70
[ 246.184041] <EOI> [<ffffffff81505a1b>] ? cpuidle_enter_state+0x5b/0xe0
[ 246.191559] [<ffffffff81505a17>] ? cpuidle_enter_state+0x57/0xe0
[ 246.198374] [<ffffffff81505b5d>] cpuidle_idle_call+0xbd/0x200
[ 246.204900] [<ffffffff8100b7ae>] arch_cpu_idle+0xe/0x30
[ 246.210846] [<ffffffff810a47b0>] cpu_startup_entry+0xd0/0x250
[ 246.217371] [<ffffffff81646b47>] rest_init+0x77/0x80
[ 246.223028] [<ffffffff81d09e8e>] start_kernel+0x3ee/0x3fb
[ 246.229165] [<ffffffff81d0989f>] ? repair_env_string+0x5e/0x5e
[ 246.235787] [<ffffffff81d095a5>] x86_64_start_reservations+0x2a/0x2c
[ 246.242990] [<ffffffff81d0969f>] x86_64_start_kernel+0xf8/0xfc
[ 246.249610] ---[ end trace fb74fdef54d79039 ]---
[ 246.254807] ixgbe 0000:c2:00.0 p786p1: initiating reset due to tx timeout
[ 246.262489] ixgbe 0000:c2:00.0 p786p1: Reset adapter
Last login: Mon Nov 11 08:35:14 from 10.18.17.119
[root@(none) ~]# [ 246.792676] ixgbe 0000:c2:00.0 p786p1: detected SFP+: 5
[ 249.231598] ixgbe 0000:c2:00.0 p786p1: NIC Link is Up 10 Gbps, Flow Control: RX/TX
[ 246.792676] ixgbe 0000:c2:00.0 p786p1: detected SFP+: 5
[ 249.231598] ixgbe 0000:c2:00.0 p786p1: NIC Link is Up 10 Gbps, Flow Control: RX/TX
(last lines keep repeating. ixgbe driver is dead until module reload.)
If the downed cpu has more vectors than are free on the remaining cpus on the
system, it is possible that some vectors are "orphaned" even though they are
assigned to a cpu. In this case, since the ixgbe driver had a watchdog, the
watchdog fired and notified that something was wrong.
This patch adds a function, check_vectors(), to compare the number of vectors
on the CPU going down and compares it to the number of vectors available on
the system. If there aren't enough vectors for the CPU to go down, an
error is returned and propogated back to userspace.
v2: Do not need to look at percpu irqs
v3: Need to check affinity to prevent counting of MSIs in IOAPIC Lowest
Priority Mode
v4: Additional changes suggested by Gong Chen.
v5/v6/v7/v8: Updated comment text
Signed-off-by: Prarit Bhargava <prarit@redhat.com>
Link: http://lkml.kernel.org/r/1389613861-3853-1-git-send-email-prarit@redhat.com
Reviewed-by: Gong Chen <gong.chen@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Michel Lespinasse <walken@google.com>
Cc: Seiji Aguchi <seiji.aguchi@hds.com>
Cc: Yang Zhang <yang.z.zhang@Intel.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Janet Morgan <janet.morgan@intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Ruiv Wang <ruiv.wang@gmail.com>
Cc: Gong Chen <gong.chen@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: <stable@vger.kernel.org>
2014-01-13 12:51:01 +01:00
|
|
|
/*
|
|
|
|
* This cpu is going to be removed and its vectors migrated to the remaining
|
|
|
|
* online cpus. Check to see if there are enough vectors in the remaining cpus.
|
|
|
|
* This function is protected by stop_machine().
|
|
|
|
*/
|
|
|
|
int check_irq_vectors_for_cpu_disable(void)
|
|
|
|
{
|
|
|
|
int irq, cpu;
|
|
|
|
unsigned int this_cpu, vector, this_count, count;
|
|
|
|
struct irq_desc *desc;
|
|
|
|
struct irq_data *data;
|
|
|
|
|
|
|
|
this_cpu = smp_processor_id();
|
|
|
|
cpumask_copy(&online_new, cpu_online_mask);
|
|
|
|
cpu_clear(this_cpu, online_new);
|
|
|
|
|
|
|
|
this_count = 0;
|
|
|
|
for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
|
|
|
|
irq = __this_cpu_read(vector_irq[vector]);
|
|
|
|
if (irq >= 0) {
|
|
|
|
desc = irq_to_desc(irq);
|
|
|
|
data = irq_desc_get_irq_data(desc);
|
|
|
|
cpumask_copy(&affinity_new, data->affinity);
|
|
|
|
cpu_clear(this_cpu, affinity_new);
|
|
|
|
|
|
|
|
/* Do not count inactive or per-cpu irqs. */
|
|
|
|
if (!irq_has_action(irq) || irqd_is_per_cpu(data))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A single irq may be mapped to multiple
|
|
|
|
* cpu's vector_irq[] (for example IOAPIC cluster
|
|
|
|
* mode). In this case we have two
|
|
|
|
* possibilities:
|
|
|
|
*
|
|
|
|
* 1) the resulting affinity mask is empty; that is
|
|
|
|
* this the down'd cpu is the last cpu in the irq's
|
|
|
|
* affinity mask, or
|
|
|
|
*
|
|
|
|
* 2) the resulting affinity mask is no longer
|
|
|
|
* a subset of the online cpus but the affinity
|
|
|
|
* mask is not zero; that is the down'd cpu is the
|
|
|
|
* last online cpu in a user set affinity mask.
|
|
|
|
*/
|
|
|
|
if (cpumask_empty(&affinity_new) ||
|
|
|
|
!cpumask_subset(&affinity_new, &online_new))
|
|
|
|
this_count++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
count = 0;
|
|
|
|
for_each_online_cpu(cpu) {
|
|
|
|
if (cpu == this_cpu)
|
|
|
|
continue;
|
2014-05-13 17:39:34 +02:00
|
|
|
/*
|
|
|
|
* We scan from FIRST_EXTERNAL_VECTOR to first system
|
|
|
|
* vector. If the vector is marked in the used vectors
|
|
|
|
* bitmap or an irq is assigned to it, we don't count
|
|
|
|
* it as available.
|
|
|
|
*/
|
|
|
|
for (vector = FIRST_EXTERNAL_VECTOR;
|
|
|
|
vector < first_system_vector; vector++) {
|
|
|
|
if (!test_bit(vector, used_vectors) &&
|
|
|
|
per_cpu(vector_irq, cpu)[vector] < 0)
|
|
|
|
count++;
|
x86: Add check for number of available vectors before CPU down
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=64791
When a cpu is downed on a system, the irqs on the cpu are assigned to
other cpus. It is possible, however, that when a cpu is downed there
aren't enough free vectors on the remaining cpus to account for the
vectors from the cpu that is being downed.
This results in an interesting "overflow" condition where irqs are
"assigned" to a CPU but are not handled.
For example, when downing cpus on a 1-64 logical processor system:
<snip>
[ 232.021745] smpboot: CPU 61 is now offline
[ 238.480275] smpboot: CPU 62 is now offline
[ 245.991080] ------------[ cut here ]------------
[ 245.996270] WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:264 dev_watchdog+0x246/0x250()
[ 246.005688] NETDEV WATCHDOG: p786p1 (ixgbe): transmit queue 0 timed out
[ 246.013070] Modules linked in: lockd sunrpc iTCO_wdt iTCO_vendor_support sb_edac ixgbe microcode e1000e pcspkr joydev edac_core lpc_ich ioatdma ptp mdio mfd_core i2c_i801 dca pps_core i2c_core wmi acpi_cpufreq isci libsas scsi_transport_sas
[ 246.037633] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.12.0+ #14
[ 246.044451] Hardware name: Intel Corporation S4600LH ........../SVRBD-ROW_T, BIOS SE5C600.86B.01.08.0003.022620131521 02/26/2013
[ 246.057371] 0000000000000009 ffff88081fa03d40 ffffffff8164fbf6 ffff88081fa0ee48
[ 246.065728] ffff88081fa03d90 ffff88081fa03d80 ffffffff81054ecc ffff88081fa13040
[ 246.074073] 0000000000000000 ffff88200cce0000 0000000000000040 0000000000000000
[ 246.082430] Call Trace:
[ 246.085174] <IRQ> [<ffffffff8164fbf6>] dump_stack+0x46/0x58
[ 246.091633] [<ffffffff81054ecc>] warn_slowpath_common+0x8c/0xc0
[ 246.098352] [<ffffffff81054fb6>] warn_slowpath_fmt+0x46/0x50
[ 246.104786] [<ffffffff815710d6>] dev_watchdog+0x246/0x250
[ 246.110923] [<ffffffff81570e90>] ? dev_deactivate_queue.constprop.31+0x80/0x80
[ 246.119097] [<ffffffff8106092a>] call_timer_fn+0x3a/0x110
[ 246.125224] [<ffffffff8106280f>] ? update_process_times+0x6f/0x80
[ 246.132137] [<ffffffff81570e90>] ? dev_deactivate_queue.constprop.31+0x80/0x80
[ 246.140308] [<ffffffff81061db0>] run_timer_softirq+0x1f0/0x2a0
[ 246.146933] [<ffffffff81059a80>] __do_softirq+0xe0/0x220
[ 246.152976] [<ffffffff8165fedc>] call_softirq+0x1c/0x30
[ 246.158920] [<ffffffff810045f5>] do_softirq+0x55/0x90
[ 246.164670] [<ffffffff81059d35>] irq_exit+0xa5/0xb0
[ 246.170227] [<ffffffff8166062a>] smp_apic_timer_interrupt+0x4a/0x60
[ 246.177324] [<ffffffff8165f40a>] apic_timer_interrupt+0x6a/0x70
[ 246.184041] <EOI> [<ffffffff81505a1b>] ? cpuidle_enter_state+0x5b/0xe0
[ 246.191559] [<ffffffff81505a17>] ? cpuidle_enter_state+0x57/0xe0
[ 246.198374] [<ffffffff81505b5d>] cpuidle_idle_call+0xbd/0x200
[ 246.204900] [<ffffffff8100b7ae>] arch_cpu_idle+0xe/0x30
[ 246.210846] [<ffffffff810a47b0>] cpu_startup_entry+0xd0/0x250
[ 246.217371] [<ffffffff81646b47>] rest_init+0x77/0x80
[ 246.223028] [<ffffffff81d09e8e>] start_kernel+0x3ee/0x3fb
[ 246.229165] [<ffffffff81d0989f>] ? repair_env_string+0x5e/0x5e
[ 246.235787] [<ffffffff81d095a5>] x86_64_start_reservations+0x2a/0x2c
[ 246.242990] [<ffffffff81d0969f>] x86_64_start_kernel+0xf8/0xfc
[ 246.249610] ---[ end trace fb74fdef54d79039 ]---
[ 246.254807] ixgbe 0000:c2:00.0 p786p1: initiating reset due to tx timeout
[ 246.262489] ixgbe 0000:c2:00.0 p786p1: Reset adapter
Last login: Mon Nov 11 08:35:14 from 10.18.17.119
[root@(none) ~]# [ 246.792676] ixgbe 0000:c2:00.0 p786p1: detected SFP+: 5
[ 249.231598] ixgbe 0000:c2:00.0 p786p1: NIC Link is Up 10 Gbps, Flow Control: RX/TX
[ 246.792676] ixgbe 0000:c2:00.0 p786p1: detected SFP+: 5
[ 249.231598] ixgbe 0000:c2:00.0 p786p1: NIC Link is Up 10 Gbps, Flow Control: RX/TX
(last lines keep repeating. ixgbe driver is dead until module reload.)
If the downed cpu has more vectors than are free on the remaining cpus on the
system, it is possible that some vectors are "orphaned" even though they are
assigned to a cpu. In this case, since the ixgbe driver had a watchdog, the
watchdog fired and notified that something was wrong.
This patch adds a function, check_vectors(), to compare the number of vectors
on the CPU going down and compares it to the number of vectors available on
the system. If there aren't enough vectors for the CPU to go down, an
error is returned and propogated back to userspace.
v2: Do not need to look at percpu irqs
v3: Need to check affinity to prevent counting of MSIs in IOAPIC Lowest
Priority Mode
v4: Additional changes suggested by Gong Chen.
v5/v6/v7/v8: Updated comment text
Signed-off-by: Prarit Bhargava <prarit@redhat.com>
Link: http://lkml.kernel.org/r/1389613861-3853-1-git-send-email-prarit@redhat.com
Reviewed-by: Gong Chen <gong.chen@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Michel Lespinasse <walken@google.com>
Cc: Seiji Aguchi <seiji.aguchi@hds.com>
Cc: Yang Zhang <yang.z.zhang@Intel.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Janet Morgan <janet.morgan@intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Ruiv Wang <ruiv.wang@gmail.com>
Cc: Gong Chen <gong.chen@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: <stable@vger.kernel.org>
2014-01-13 12:51:01 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (count < this_count) {
|
|
|
|
pr_warn("CPU %d disable failed: CPU has %u vectors assigned and there are only %u available.\n",
|
|
|
|
this_cpu, this_count, count);
|
|
|
|
return -ERANGE;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-10-26 23:24:31 +01:00
|
|
|
/* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
|
|
|
|
void fixup_irqs(void)
|
|
|
|
{
|
2009-10-26 23:24:36 +01:00
|
|
|
unsigned int irq, vector;
|
2009-10-26 23:24:31 +01:00
|
|
|
static int warned;
|
|
|
|
struct irq_desc *desc;
|
2010-10-08 20:24:58 +02:00
|
|
|
struct irq_data *data;
|
2011-02-10 21:40:36 +01:00
|
|
|
struct irq_chip *chip;
|
2014-04-02 14:11:13 +02:00
|
|
|
int ret;
|
2009-10-26 23:24:31 +01:00
|
|
|
|
|
|
|
for_each_irq_desc(irq, desc) {
|
|
|
|
int break_affinity = 0;
|
|
|
|
int set_affinity = 1;
|
|
|
|
const struct cpumask *affinity;
|
|
|
|
|
|
|
|
if (!desc)
|
|
|
|
continue;
|
|
|
|
if (irq == 2)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* interrupt's are disabled at this point */
|
2009-11-17 16:46:45 +01:00
|
|
|
raw_spin_lock(&desc->lock);
|
2009-10-26 23:24:31 +01:00
|
|
|
|
2011-02-10 21:40:36 +01:00
|
|
|
data = irq_desc_get_irq_data(desc);
|
2010-10-08 20:24:58 +02:00
|
|
|
affinity = data->affinity;
|
2011-05-06 08:43:36 +02:00
|
|
|
if (!irq_has_action(irq) || irqd_is_per_cpu(data) ||
|
2011-02-17 16:54:26 +01:00
|
|
|
cpumask_subset(affinity, cpu_online_mask)) {
|
2009-11-17 16:46:45 +01:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2009-10-26 23:24:31 +01:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2009-10-26 23:24:34 +01:00
|
|
|
/*
|
|
|
|
* Complete the irq move. This cpu is going down and for
|
|
|
|
* non intr-remapping case, we can't wait till this interrupt
|
|
|
|
* arrives at this cpu before completing the irq move.
|
|
|
|
*/
|
|
|
|
irq_force_complete_move(irq);
|
|
|
|
|
2009-10-26 23:24:31 +01:00
|
|
|
if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
|
|
|
|
break_affinity = 1;
|
2012-08-14 08:55:01 +02:00
|
|
|
affinity = cpu_online_mask;
|
2009-10-26 23:24:31 +01:00
|
|
|
}
|
|
|
|
|
2011-02-10 21:40:36 +01:00
|
|
|
chip = irq_data_get_irq_chip(data);
|
|
|
|
if (!irqd_can_move_in_process_context(data) && chip->irq_mask)
|
|
|
|
chip->irq_mask(data);
|
2009-10-26 23:24:31 +01:00
|
|
|
|
2014-04-02 14:11:13 +02:00
|
|
|
if (chip->irq_set_affinity) {
|
|
|
|
ret = chip->irq_set_affinity(data, affinity, true);
|
|
|
|
if (ret == -ENOSPC)
|
|
|
|
pr_crit("IRQ %d set affinity failed because there are no available vectors. The device assigned to this IRQ is unstable.\n", irq);
|
|
|
|
} else {
|
|
|
|
if (!(warned++))
|
|
|
|
set_affinity = 0;
|
|
|
|
}
|
2009-10-26 23:24:31 +01:00
|
|
|
|
2012-03-26 09:11:50 +02:00
|
|
|
/*
|
|
|
|
* We unmask if the irq was not marked masked by the
|
|
|
|
* core code. That respects the lazy irq disable
|
|
|
|
* behaviour.
|
|
|
|
*/
|
2011-05-06 08:43:56 +02:00
|
|
|
if (!irqd_can_move_in_process_context(data) &&
|
2012-03-26 09:11:50 +02:00
|
|
|
!irqd_irq_masked(data) && chip->irq_unmask)
|
2011-02-10 21:40:36 +01:00
|
|
|
chip->irq_unmask(data);
|
2009-10-26 23:24:31 +01:00
|
|
|
|
2009-11-17 16:46:45 +01:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2009-10-26 23:24:31 +01:00
|
|
|
|
|
|
|
if (break_affinity && set_affinity)
|
2012-05-22 04:50:07 +02:00
|
|
|
pr_notice("Broke affinity for irq %i\n", irq);
|
2009-10-26 23:24:31 +01:00
|
|
|
else if (!set_affinity)
|
2012-05-22 04:50:07 +02:00
|
|
|
pr_notice("Cannot set affinity for irq %i\n", irq);
|
2009-10-26 23:24:31 +01:00
|
|
|
}
|
|
|
|
|
2009-10-26 23:24:36 +01:00
|
|
|
/*
|
|
|
|
* We can remove mdelay() and then send spuriuous interrupts to
|
|
|
|
* new cpu targets for all the irqs that were handled previously by
|
|
|
|
* this cpu. While it works, I have seen spurious interrupt messages
|
|
|
|
* (nothing wrong but still...).
|
|
|
|
*
|
|
|
|
* So for now, retain mdelay(1) and check the IRR and then send those
|
|
|
|
* interrupts to new targets as this cpu is already offlined...
|
|
|
|
*/
|
2009-10-26 23:24:31 +01:00
|
|
|
mdelay(1);
|
2009-10-26 23:24:36 +01:00
|
|
|
|
|
|
|
for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
|
|
|
|
unsigned int irr;
|
|
|
|
|
2014-01-05 17:10:52 +01:00
|
|
|
if (__this_cpu_read(vector_irq[vector]) <= VECTOR_UNDEFINED)
|
2009-10-26 23:24:36 +01:00
|
|
|
continue;
|
|
|
|
|
|
|
|
irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
|
|
|
|
if (irr & (1 << (vector % 32))) {
|
2010-12-18 16:28:55 +01:00
|
|
|
irq = __this_cpu_read(vector_irq[vector]);
|
2009-10-26 23:24:36 +01:00
|
|
|
|
2011-02-12 11:51:03 +01:00
|
|
|
desc = irq_to_desc(irq);
|
2011-02-10 21:40:36 +01:00
|
|
|
data = irq_desc_get_irq_data(desc);
|
|
|
|
chip = irq_data_get_irq_chip(data);
|
2009-11-17 16:46:45 +01:00
|
|
|
raw_spin_lock(&desc->lock);
|
2014-01-05 17:10:52 +01:00
|
|
|
if (chip->irq_retrigger) {
|
2011-02-10 21:40:36 +01:00
|
|
|
chip->irq_retrigger(data);
|
2014-01-05 17:10:52 +01:00
|
|
|
__this_cpu_write(vector_irq[vector], VECTOR_RETRIGGERED);
|
|
|
|
}
|
2009-11-17 16:46:45 +01:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2009-10-26 23:24:36 +01:00
|
|
|
}
|
2014-01-05 17:10:52 +01:00
|
|
|
if (__this_cpu_read(vector_irq[vector]) != VECTOR_RETRIGGERED)
|
|
|
|
__this_cpu_write(vector_irq[vector], VECTOR_UNDEFINED);
|
2009-10-26 23:24:36 +01:00
|
|
|
}
|
2009-10-26 23:24:31 +01:00
|
|
|
}
|
|
|
|
#endif
|