2011-06-07 17:02:55 +02:00
|
|
|
/*
|
|
|
|
* Copyright 2010-2011 Calxeda, Inc.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
|
|
* under the terms and conditions of the GNU General Public License,
|
|
|
|
* version 2, as published by the Free Software Foundation.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
|
|
* more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License along with
|
|
|
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*/
|
|
|
|
#include <linux/clk.h>
|
|
|
|
#include <linux/clkdev.h>
|
2013-04-11 01:27:51 +02:00
|
|
|
#include <linux/clocksource.h>
|
2012-08-21 12:31:06 +02:00
|
|
|
#include <linux/dma-mapping.h>
|
2011-06-07 17:02:55 +02:00
|
|
|
#include <linux/io.h>
|
2012-11-05 23:18:28 +01:00
|
|
|
#include <linux/irqchip.h>
|
2011-06-07 17:02:55 +02:00
|
|
|
#include <linux/of.h>
|
|
|
|
#include <linux/of_irq.h>
|
|
|
|
#include <linux/of_platform.h>
|
|
|
|
#include <linux/of_address.h>
|
2012-08-21 12:31:06 +02:00
|
|
|
#include <linux/amba/bus.h>
|
2013-01-04 08:00:55 +01:00
|
|
|
#include <linux/clk-provider.h>
|
2011-06-07 17:02:55 +02:00
|
|
|
|
|
|
|
#include <asm/cacheflush.h>
|
2013-01-31 20:28:42 +01:00
|
|
|
#include <asm/cputype.h>
|
2012-01-20 12:01:12 +01:00
|
|
|
#include <asm/smp_plat.h>
|
2011-06-07 17:02:55 +02:00
|
|
|
#include <asm/hardware/cache-l2x0.h>
|
|
|
|
#include <asm/mach/arch.h>
|
2012-10-27 22:38:22 +02:00
|
|
|
#include <asm/mach/map.h>
|
2011-06-07 17:02:55 +02:00
|
|
|
|
|
|
|
#include "core.h"
|
|
|
|
#include "sysregs.h"
|
|
|
|
|
|
|
|
void __iomem *sregs_base;
|
2012-10-25 19:13:47 +02:00
|
|
|
void __iomem *scu_base_addr;
|
2011-06-07 17:02:55 +02:00
|
|
|
|
|
|
|
static void __init highbank_scu_map_io(void)
|
|
|
|
{
|
|
|
|
unsigned long base;
|
|
|
|
|
|
|
|
/* Get SCU base */
|
|
|
|
asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
|
|
|
|
|
2012-10-25 19:13:47 +02:00
|
|
|
scu_base_addr = ioremap(base, SZ_4K);
|
2011-06-07 17:02:55 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
|
|
|
|
#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
|
|
|
|
|
|
|
|
void highbank_set_cpu_jump(int cpu, void *jump_addr)
|
|
|
|
{
|
2013-01-31 20:28:42 +01:00
|
|
|
cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0);
|
2012-01-09 22:41:58 +01:00
|
|
|
writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
|
2011-06-07 17:02:55 +02:00
|
|
|
__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
|
|
|
|
outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
|
|
|
|
HB_JUMP_TABLE_PHYS(cpu) + 15);
|
|
|
|
}
|
|
|
|
|
2012-06-07 00:20:10 +02:00
|
|
|
static void highbank_l2x0_disable(void)
|
|
|
|
{
|
|
|
|
/* Disable PL310 L2 Cache controller */
|
|
|
|
highbank_smc1(0x102, 0x0);
|
|
|
|
}
|
|
|
|
|
2011-06-07 17:02:55 +02:00
|
|
|
static void __init highbank_init_irq(void)
|
|
|
|
{
|
2012-11-05 23:18:28 +01:00
|
|
|
irqchip_init();
|
2012-06-07 00:20:10 +02:00
|
|
|
|
2012-10-25 19:13:47 +02:00
|
|
|
if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
|
|
|
|
highbank_scu_map_io();
|
|
|
|
|
2012-06-07 00:20:10 +02:00
|
|
|
/* Enable PL310 L2 Cache controller */
|
2013-08-18 03:10:28 +02:00
|
|
|
if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
|
|
|
|
of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
|
|
|
|
highbank_smc1(0x102, 0x1);
|
|
|
|
l2x0_of_init(0, ~0UL);
|
|
|
|
outer_cache.disable = highbank_l2x0_disable;
|
|
|
|
}
|
2011-06-07 17:02:55 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __init highbank_timer_init(void)
|
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
|
|
|
|
/* Map system registers */
|
|
|
|
np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
|
|
|
|
sregs_base = of_iomap(np, 0);
|
|
|
|
WARN_ON(!sregs_base);
|
|
|
|
|
2013-01-04 08:00:55 +01:00
|
|
|
of_clk_init(NULL);
|
2012-01-10 20:44:19 +01:00
|
|
|
|
2013-02-07 04:17:47 +01:00
|
|
|
clocksource_of_init();
|
2011-06-07 17:02:55 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void highbank_power_off(void)
|
|
|
|
{
|
2012-12-30 17:15:04 +01:00
|
|
|
highbank_set_pwr_shutdown();
|
2011-06-07 17:02:55 +02:00
|
|
|
|
|
|
|
while (1)
|
|
|
|
cpu_do_idle();
|
|
|
|
}
|
|
|
|
|
2012-08-21 12:31:06 +02:00
|
|
|
static int highbank_platform_notifier(struct notifier_block *nb,
|
|
|
|
unsigned long event, void *__dev)
|
|
|
|
{
|
|
|
|
struct resource *res;
|
|
|
|
int reg = -1;
|
2013-07-21 21:53:37 +02:00
|
|
|
u32 val;
|
2012-08-21 12:31:06 +02:00
|
|
|
struct device *dev = __dev;
|
|
|
|
|
|
|
|
if (event != BUS_NOTIFY_ADD_DEVICE)
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
|
|
|
|
if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
|
|
|
|
reg = 0xc;
|
|
|
|
else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
|
|
|
|
reg = 0x18;
|
|
|
|
else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
|
|
|
|
reg = 0x20;
|
|
|
|
else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
|
|
|
|
res = platform_get_resource(to_platform_device(dev),
|
|
|
|
IORESOURCE_MEM, 0);
|
|
|
|
if (res) {
|
|
|
|
if (res->start == 0xfff50000)
|
|
|
|
reg = 0;
|
|
|
|
else if (res->start == 0xfff51000)
|
|
|
|
reg = 4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (reg < 0)
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
|
|
|
|
if (of_property_read_bool(dev->of_node, "dma-coherent")) {
|
2013-07-21 21:53:37 +02:00
|
|
|
val = readl(sregs_base + reg);
|
|
|
|
writel(val | 0xff01, sregs_base + reg);
|
2012-08-21 12:31:06 +02:00
|
|
|
set_dma_ops(dev, &arm_coherent_dma_ops);
|
2013-07-21 21:53:37 +02:00
|
|
|
}
|
2012-08-21 12:31:06 +02:00
|
|
|
|
|
|
|
return NOTIFY_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct notifier_block highbank_amba_nb = {
|
|
|
|
.notifier_call = highbank_platform_notifier,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct notifier_block highbank_platform_nb = {
|
|
|
|
.notifier_call = highbank_platform_notifier,
|
|
|
|
};
|
|
|
|
|
2011-06-07 17:02:55 +02:00
|
|
|
static void __init highbank_init(void)
|
|
|
|
{
|
|
|
|
pm_power_off = highbank_power_off;
|
2012-09-17 16:55:12 +02:00
|
|
|
highbank_pm_init();
|
2011-06-07 17:02:55 +02:00
|
|
|
|
2012-08-21 12:31:06 +02:00
|
|
|
bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
|
|
|
|
bus_register_notifier(&amba_bustype, &highbank_amba_nb);
|
|
|
|
|
2011-06-07 17:02:55 +02:00
|
|
|
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char *highbank_match[] __initconst = {
|
|
|
|
"calxeda,highbank",
|
2012-10-25 19:19:52 +02:00
|
|
|
"calxeda,ecx-2000",
|
2011-06-07 17:02:55 +02:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
DT_MACHINE_START(HIGHBANK, "Highbank")
|
2013-08-01 22:50:55 +02:00
|
|
|
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
|
|
|
|
.dma_zone_size = (4ULL * SZ_1G),
|
|
|
|
#endif
|
2012-09-05 16:36:18 +02:00
|
|
|
.smp = smp_ops(highbank_smp_ops),
|
2011-06-07 17:02:55 +02:00
|
|
|
.init_irq = highbank_init_irq,
|
2012-11-08 20:40:59 +01:00
|
|
|
.init_time = highbank_timer_init,
|
2011-06-07 17:02:55 +02:00
|
|
|
.init_machine = highbank_init,
|
|
|
|
.dt_compat = highbank_match,
|
2011-11-05 12:16:05 +01:00
|
|
|
.restart = highbank_restart,
|
2011-06-07 17:02:55 +02:00
|
|
|
MACHINE_END
|