89 lines
1.9 KiB
C
89 lines
1.9 KiB
C
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#define EM_GPIO_0 (1 << 0)
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#define EM_GPIO_1 (1 << 1)
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#define EM_GPIO_2 (1 << 2)
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#define EM_GPIO_3 (1 << 3)
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#define EM_GPIO_4 (1 << 4)
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#define EM_GPIO_5 (1 << 5)
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#define EM_GPIO_6 (1 << 6)
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#define EM_GPIO_7 (1 << 7)
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#define EM_GPO_0 (1 << 0)
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#define EM_GPO_1 (1 << 1)
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#define EM_GPO_2 (1 << 2)
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#define EM_GPO_3 (1 << 3)
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/* em2800 registers */
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#define EM2800_AUDIOSRC_REG 0x08
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/* em28xx registers */
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/* GPIO/GPO registers */
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#define EM_R04_GPO 0x04 /* em2880-em2883 only */
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#define EM_R08_GPIO 0x08 /* em2820 or upper */
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#define I2C_CLK_REG 0x06
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#define CHIPID_REG 0x0a
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#define USBSUSP_REG 0x0c /* */
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#define AUDIOSRC_REG 0x0e
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#define XCLK_REG 0x0f
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#define VINMODE_REG 0x10
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#define VINCTRL_REG 0x11
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#define VINENABLE_REG 0x12 /* */
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#define GAMMA_REG 0x14
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#define RGAIN_REG 0x15
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#define GGAIN_REG 0x16
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#define BGAIN_REG 0x17
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#define ROFFSET_REG 0x18
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#define GOFFSET_REG 0x19
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#define BOFFSET_REG 0x1a
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#define OFLOW_REG 0x1b
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#define HSTART_REG 0x1c
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#define VSTART_REG 0x1d
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#define CWIDTH_REG 0x1e
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#define CHEIGHT_REG 0x1f
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#define YGAIN_REG 0x20
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#define YOFFSET_REG 0x21
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#define UVGAIN_REG 0x22
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#define UOFFSET_REG 0x23
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#define VOFFSET_REG 0x24
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#define SHARPNESS_REG 0x25
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#define COMPR_REG 0x26
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#define OUTFMT_REG 0x27
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#define XMIN_REG 0x28
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#define XMAX_REG 0x29
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#define YMIN_REG 0x2a
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#define YMAX_REG 0x2b
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#define HSCALELOW_REG 0x30
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#define HSCALEHIGH_REG 0x31
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#define VSCALELOW_REG 0x32
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#define VSCALEHIGH_REG 0x33
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#define AC97LSB_REG 0x40
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#define AC97MSB_REG 0x41
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#define AC97ADDR_REG 0x42
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#define AC97BUSY_REG 0x43
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/* em202 registers */
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#define MASTER_AC97 0x02
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#define LINE_IN_AC97 0x10
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#define VIDEO_AC97 0x14
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/* register settings */
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#define EM2800_AUDIO_SRC_TUNER 0x0d
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#define EM2800_AUDIO_SRC_LINE 0x0c
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#define EM28XX_AUDIO_SRC_TUNER 0xc0
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#define EM28XX_AUDIO_SRC_LINE 0x80
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/* FIXME: Need to be populated with the other chip ID's */
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enum em28xx_chip_id {
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CHIP_ID_EM2883 = 36,
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};
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