[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
/*
|
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|
* Clock management for AT32AP CPUs
|
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|
|
*
|
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|
* Copyright (C) 2006 Atmel Corporation
|
|
|
|
*
|
2007-02-05 11:42:07 +01:00
|
|
|
* Based on arch/arm/mach-at91/clock.c
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
* Copyright (C) 2005 David Brownell
|
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|
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* Copyright (C) 2005 Ivan Kokshaysky
|
|
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*
|
|
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|
* This program is free software; you can redistribute it and/or modify
|
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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|
#include <linux/clk.h>
|
|
|
|
#include <linux/err.h>
|
2011-08-01 18:55:26 +02:00
|
|
|
#include <linux/export.h>
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
#include <linux/device.h>
|
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|
|
#include <linux/string.h>
|
2008-09-22 21:40:55 +02:00
|
|
|
#include <linux/list.h>
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
|
2008-07-31 16:06:58 +02:00
|
|
|
#include <mach/chip.h>
|
|
|
|
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
#include "clock.h"
|
|
|
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|
2008-09-22 21:40:55 +02:00
|
|
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/* at32 clock list */
|
|
|
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static LIST_HEAD(at32_clock_list);
|
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|
2007-04-29 18:10:34 +02:00
|
|
|
static DEFINE_SPINLOCK(clk_lock);
|
2008-09-22 21:40:55 +02:00
|
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|
static DEFINE_SPINLOCK(clk_list_lock);
|
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void at32_clk_register(struct clk *clk)
|
|
|
|
{
|
|
|
|
spin_lock(&clk_list_lock);
|
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/* add the new item to the end of the list */
|
|
|
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list_add_tail(&clk->list, &at32_clock_list);
|
|
|
|
spin_unlock(&clk_list_lock);
|
|
|
|
}
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
|
2011-03-06 20:42:39 +01:00
|
|
|
static struct clk *__clk_get(struct device *dev, const char *id)
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
{
|
2008-09-22 21:40:55 +02:00
|
|
|
struct clk *clk;
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
|
2008-09-22 21:40:55 +02:00
|
|
|
list_for_each_entry(clk, &at32_clock_list, list) {
|
|
|
|
if (clk->dev == dev && strcmp(id, clk->name) == 0) {
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
return clk;
|
2008-09-22 21:40:55 +02:00
|
|
|
}
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return ERR_PTR(-ENOENT);
|
|
|
|
}
|
2011-03-06 20:42:39 +01:00
|
|
|
|
|
|
|
struct clk *clk_get(struct device *dev, const char *id)
|
|
|
|
{
|
|
|
|
struct clk *clk;
|
|
|
|
|
|
|
|
spin_lock(&clk_list_lock);
|
|
|
|
clk = __clk_get(dev, id);
|
|
|
|
spin_unlock(&clk_list_lock);
|
|
|
|
|
|
|
|
return clk;
|
|
|
|
}
|
|
|
|
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
EXPORT_SYMBOL(clk_get);
|
|
|
|
|
|
|
|
void clk_put(struct clk *clk)
|
|
|
|
{
|
|
|
|
/* clocks are static for now, we can't free them */
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_put);
|
|
|
|
|
|
|
|
static void __clk_enable(struct clk *clk)
|
|
|
|
{
|
|
|
|
if (clk->parent)
|
|
|
|
__clk_enable(clk->parent);
|
|
|
|
if (clk->users++ == 0 && clk->mode)
|
|
|
|
clk->mode(clk, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
int clk_enable(struct clk *clk)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
|
|
__clk_enable(clk);
|
|
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_enable);
|
|
|
|
|
|
|
|
static void __clk_disable(struct clk *clk)
|
|
|
|
{
|
2007-02-16 13:19:47 +01:00
|
|
|
if (clk->users == 0) {
|
|
|
|
printk(KERN_ERR "%s: mismatched disable\n", clk->name);
|
|
|
|
WARN_ON(1);
|
|
|
|
return;
|
|
|
|
}
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:32:13 +02:00
|
|
|
|
|
|
|
if (--clk->users == 0 && clk->mode)
|
|
|
|
clk->mode(clk, 0);
|
|
|
|
if (clk->parent)
|
|
|
|
__clk_disable(clk->parent);
|
|
|
|
}
|
|
|
|
|
|
|
|
void clk_disable(struct clk *clk)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
|
|
__clk_disable(clk);
|
|
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_disable);
|
|
|
|
|
|
|
|
unsigned long clk_get_rate(struct clk *clk)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned long rate;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
|
|
rate = clk->get_rate(clk);
|
|
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
|
|
|
|
return rate;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_get_rate);
|
|
|
|
|
|
|
|
long clk_round_rate(struct clk *clk, unsigned long rate)
|
|
|
|
{
|
|
|
|
unsigned long flags, actual_rate;
|
|
|
|
|
|
|
|
if (!clk->set_rate)
|
|
|
|
return -ENOSYS;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
|
|
actual_rate = clk->set_rate(clk, rate, 0);
|
|
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
|
|
|
|
return actual_rate;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_round_rate);
|
|
|
|
|
|
|
|
int clk_set_rate(struct clk *clk, unsigned long rate)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
long ret;
|
|
|
|
|
|
|
|
if (!clk->set_rate)
|
|
|
|
return -ENOSYS;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
|
|
ret = clk->set_rate(clk, rate, 1);
|
|
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
|
|
|
|
return (ret < 0) ? ret : 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_set_rate);
|
|
|
|
|
|
|
|
int clk_set_parent(struct clk *clk, struct clk *parent)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!clk->set_parent)
|
|
|
|
return -ENOSYS;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&clk_lock, flags);
|
|
|
|
ret = clk->set_parent(clk, parent);
|
|
|
|
spin_unlock_irqrestore(&clk_lock, flags);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_set_parent);
|
|
|
|
|
|
|
|
struct clk *clk_get_parent(struct clk *clk)
|
|
|
|
{
|
|
|
|
return clk->parent;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(clk_get_parent);
|
2007-08-10 05:56:07 +02:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
|
|
|
|
/* /sys/kernel/debug/at32ap_clk */
|
|
|
|
|
|
|
|
#include <linux/io.h>
|
|
|
|
#include <linux/debugfs.h>
|
|
|
|
#include <linux/seq_file.h>
|
|
|
|
#include "pm.h"
|
|
|
|
|
|
|
|
|
|
|
|
#define NEST_DELTA 2
|
|
|
|
#define NEST_MAX 6
|
|
|
|
|
|
|
|
struct clkinf {
|
|
|
|
struct seq_file *s;
|
|
|
|
unsigned nest;
|
|
|
|
};
|
|
|
|
|
|
|
|
static void
|
|
|
|
dump_clock(struct clk *parent, struct clkinf *r)
|
|
|
|
{
|
|
|
|
unsigned nest = r->nest;
|
|
|
|
char buf[16 + NEST_MAX];
|
|
|
|
struct clk *clk;
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
/* skip clocks coupled to devices that aren't registered */
|
2009-01-06 19:44:43 +01:00
|
|
|
if (parent->dev && !dev_name(parent->dev) && !parent->users)
|
2007-08-10 05:56:07 +02:00
|
|
|
return;
|
|
|
|
|
|
|
|
/* <nest spaces> name <pad to end> */
|
|
|
|
memset(buf, ' ', sizeof(buf) - 1);
|
|
|
|
buf[sizeof(buf) - 1] = 0;
|
|
|
|
i = strlen(parent->name);
|
|
|
|
memcpy(buf + nest, parent->name,
|
|
|
|
min(i, (unsigned)(sizeof(buf) - 1 - nest)));
|
|
|
|
|
|
|
|
seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
|
|
|
|
buf, parent->set_parent ? '*' : ' ',
|
|
|
|
parent->users,
|
|
|
|
parent->users ? "on" : "off", /* NOTE: not-paranoid!! */
|
|
|
|
clk_get_rate(parent));
|
|
|
|
if (parent->dev)
|
2009-01-06 19:44:43 +01:00
|
|
|
seq_printf(r->s, ", for %s", dev_name(parent->dev));
|
2007-08-10 05:56:07 +02:00
|
|
|
seq_printf(r->s, "\n");
|
|
|
|
|
|
|
|
/* cost of this scan is small, but not linear... */
|
|
|
|
r->nest = nest + NEST_DELTA;
|
2008-09-22 21:40:55 +02:00
|
|
|
|
|
|
|
list_for_each_entry(clk, &at32_clock_list, list) {
|
2007-08-10 05:56:07 +02:00
|
|
|
if (clk->parent == parent)
|
|
|
|
dump_clock(clk, r);
|
|
|
|
}
|
|
|
|
r->nest = nest;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int clk_show(struct seq_file *s, void *unused)
|
|
|
|
{
|
|
|
|
struct clkinf r;
|
|
|
|
int i;
|
2008-09-22 21:40:55 +02:00
|
|
|
struct clk *clk;
|
2007-08-10 05:56:07 +02:00
|
|
|
|
|
|
|
/* show all the power manager registers */
|
|
|
|
seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
|
|
|
|
seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL));
|
|
|
|
seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
|
|
|
|
seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
|
|
|
|
seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
|
|
|
|
seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
|
|
|
|
seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
|
|
|
|
seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1));
|
|
|
|
seq_printf(s, "IMR = %8x\n", pm_readl(IMR));
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
if (i == 5)
|
|
|
|
continue;
|
|
|
|
seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
|
|
|
|
}
|
|
|
|
|
|
|
|
seq_printf(s, "\n");
|
|
|
|
|
|
|
|
r.s = s;
|
|
|
|
r.nest = 0;
|
2008-09-22 21:40:55 +02:00
|
|
|
/* protected from changes on the list while dumping */
|
|
|
|
spin_lock(&clk_list_lock);
|
|
|
|
|
|
|
|
/* show clock tree as derived from the three oscillators */
|
2011-03-06 20:42:39 +01:00
|
|
|
clk = __clk_get(NULL, "osc32k");
|
2008-09-22 21:40:55 +02:00
|
|
|
dump_clock(clk, &r);
|
|
|
|
clk_put(clk);
|
|
|
|
|
2011-03-06 20:42:39 +01:00
|
|
|
clk = __clk_get(NULL, "osc0");
|
2008-09-22 21:40:55 +02:00
|
|
|
dump_clock(clk, &r);
|
|
|
|
clk_put(clk);
|
|
|
|
|
2011-03-06 20:42:39 +01:00
|
|
|
clk = __clk_get(NULL, "osc1");
|
2008-09-22 21:40:55 +02:00
|
|
|
dump_clock(clk, &r);
|
|
|
|
clk_put(clk);
|
|
|
|
|
|
|
|
spin_unlock(&clk_list_lock);
|
2007-08-10 05:56:07 +02:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int clk_open(struct inode *inode, struct file *file)
|
|
|
|
{
|
|
|
|
return single_open(file, clk_show, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct file_operations clk_operations = {
|
|
|
|
.open = clk_open,
|
|
|
|
.read = seq_read,
|
|
|
|
.llseek = seq_lseek,
|
|
|
|
.release = single_release,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init clk_debugfs_init(void)
|
|
|
|
{
|
|
|
|
(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
|
|
|
|
NULL, NULL, &clk_operations);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
postcore_initcall(clk_debugfs_init);
|
|
|
|
|
|
|
|
#endif
|