2008-07-28 20:53:57 +02:00
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#include <linux/hardirq.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/sched.h>
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#include <xen/interface/vcpu.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include "xen-ops.h"
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/*
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* Force a proper event-channel callback from Xen after clearing the
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* callback mask. We do this in a very simple manner, by making a call
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* down into Xen. The pending flag will be checked by Xen on return.
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*/
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void xen_force_evtchn_callback(void)
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{
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(void)HYPERVISOR_xen_version(0, NULL);
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}
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static void __init __xen_init_IRQ(void)
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{
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int i;
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/* Create identity vector->irq map */
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for(i = 0; i < NR_VECTORS; i++) {
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int cpu;
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for_each_possible_cpu(cpu)
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per_cpu(vector_irq, cpu)[i] = i;
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}
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xen_init_IRQ();
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}
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static unsigned long xen_save_fl(void)
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{
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struct vcpu_info *vcpu;
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unsigned long flags;
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percpu: add optimized generic percpu accessors
It is an optimization and a cleanup, and adds the following new
generic percpu methods:
percpu_read()
percpu_write()
percpu_add()
percpu_sub()
percpu_and()
percpu_or()
percpu_xor()
and implements support for them on x86. (other architectures will fall
back to a default implementation)
The advantage is that for example to read a local percpu variable,
instead of this sequence:
return __get_cpu_var(var);
ffffffff8102ca2b: 48 8b 14 fd 80 09 74 mov -0x7e8bf680(,%rdi,8),%rdx
ffffffff8102ca32: 81
ffffffff8102ca33: 48 c7 c0 d8 59 00 00 mov $0x59d8,%rax
ffffffff8102ca3a: 48 8b 04 10 mov (%rax,%rdx,1),%rax
We can get a single instruction by using the optimized variants:
return percpu_read(var);
ffffffff8102ca3f: 65 48 8b 05 91 8f fd mov %gs:0x7efd8f91(%rip),%rax
I also cleaned up the x86-specific APIs and made the x86 code use
these new generic percpu primitives.
tj: * fixed generic percpu_sub() definition as Roel Kluin pointed out
* added percpu_and() for completeness's sake
* made generic percpu ops atomic against preemption
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-15 14:15:53 +01:00
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vcpu = percpu_read(xen_vcpu);
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2008-07-28 20:53:57 +02:00
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/* flag has opposite sense of mask */
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flags = !vcpu->evtchn_upcall_mask;
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/* convert to IF type flag
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-0 -> 0x00000000
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-1 -> 0xffffffff
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*/
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return (-flags) & X86_EFLAGS_IF;
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}
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static void xen_restore_fl(unsigned long flags)
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{
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struct vcpu_info *vcpu;
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/* convert from IF type flag */
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flags = !(flags & X86_EFLAGS_IF);
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/* There's a one instruction preempt window here. We need to
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make sure we're don't switch CPUs between getting the vcpu
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pointer and updating the mask. */
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preempt_disable();
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percpu: add optimized generic percpu accessors
It is an optimization and a cleanup, and adds the following new
generic percpu methods:
percpu_read()
percpu_write()
percpu_add()
percpu_sub()
percpu_and()
percpu_or()
percpu_xor()
and implements support for them on x86. (other architectures will fall
back to a default implementation)
The advantage is that for example to read a local percpu variable,
instead of this sequence:
return __get_cpu_var(var);
ffffffff8102ca2b: 48 8b 14 fd 80 09 74 mov -0x7e8bf680(,%rdi,8),%rdx
ffffffff8102ca32: 81
ffffffff8102ca33: 48 c7 c0 d8 59 00 00 mov $0x59d8,%rax
ffffffff8102ca3a: 48 8b 04 10 mov (%rax,%rdx,1),%rax
We can get a single instruction by using the optimized variants:
return percpu_read(var);
ffffffff8102ca3f: 65 48 8b 05 91 8f fd mov %gs:0x7efd8f91(%rip),%rax
I also cleaned up the x86-specific APIs and made the x86 code use
these new generic percpu primitives.
tj: * fixed generic percpu_sub() definition as Roel Kluin pointed out
* added percpu_and() for completeness's sake
* made generic percpu ops atomic against preemption
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-15 14:15:53 +01:00
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vcpu = percpu_read(xen_vcpu);
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2008-07-28 20:53:57 +02:00
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vcpu->evtchn_upcall_mask = flags;
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preempt_enable_no_resched();
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/* Doesn't matter if we get preempted here, because any
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pending event will get dealt with anyway. */
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if (flags == 0) {
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preempt_check_resched();
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barrier(); /* unmask then check (avoid races) */
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if (unlikely(vcpu->evtchn_upcall_pending))
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xen_force_evtchn_callback();
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}
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}
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static void xen_irq_disable(void)
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{
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/* There's a one instruction preempt window here. We need to
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make sure we're don't switch CPUs between getting the vcpu
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pointer and updating the mask. */
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preempt_disable();
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percpu: add optimized generic percpu accessors
It is an optimization and a cleanup, and adds the following new
generic percpu methods:
percpu_read()
percpu_write()
percpu_add()
percpu_sub()
percpu_and()
percpu_or()
percpu_xor()
and implements support for them on x86. (other architectures will fall
back to a default implementation)
The advantage is that for example to read a local percpu variable,
instead of this sequence:
return __get_cpu_var(var);
ffffffff8102ca2b: 48 8b 14 fd 80 09 74 mov -0x7e8bf680(,%rdi,8),%rdx
ffffffff8102ca32: 81
ffffffff8102ca33: 48 c7 c0 d8 59 00 00 mov $0x59d8,%rax
ffffffff8102ca3a: 48 8b 04 10 mov (%rax,%rdx,1),%rax
We can get a single instruction by using the optimized variants:
return percpu_read(var);
ffffffff8102ca3f: 65 48 8b 05 91 8f fd mov %gs:0x7efd8f91(%rip),%rax
I also cleaned up the x86-specific APIs and made the x86 code use
these new generic percpu primitives.
tj: * fixed generic percpu_sub() definition as Roel Kluin pointed out
* added percpu_and() for completeness's sake
* made generic percpu ops atomic against preemption
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-15 14:15:53 +01:00
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percpu_read(xen_vcpu)->evtchn_upcall_mask = 1;
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2008-07-28 20:53:57 +02:00
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preempt_enable_no_resched();
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}
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static void xen_irq_enable(void)
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{
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struct vcpu_info *vcpu;
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/* We don't need to worry about being preempted here, since
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either a) interrupts are disabled, so no preemption, or b)
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the caller is confused and is trying to re-enable interrupts
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on an indeterminate processor. */
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percpu: add optimized generic percpu accessors
It is an optimization and a cleanup, and adds the following new
generic percpu methods:
percpu_read()
percpu_write()
percpu_add()
percpu_sub()
percpu_and()
percpu_or()
percpu_xor()
and implements support for them on x86. (other architectures will fall
back to a default implementation)
The advantage is that for example to read a local percpu variable,
instead of this sequence:
return __get_cpu_var(var);
ffffffff8102ca2b: 48 8b 14 fd 80 09 74 mov -0x7e8bf680(,%rdi,8),%rdx
ffffffff8102ca32: 81
ffffffff8102ca33: 48 c7 c0 d8 59 00 00 mov $0x59d8,%rax
ffffffff8102ca3a: 48 8b 04 10 mov (%rax,%rdx,1),%rax
We can get a single instruction by using the optimized variants:
return percpu_read(var);
ffffffff8102ca3f: 65 48 8b 05 91 8f fd mov %gs:0x7efd8f91(%rip),%rax
I also cleaned up the x86-specific APIs and made the x86 code use
these new generic percpu primitives.
tj: * fixed generic percpu_sub() definition as Roel Kluin pointed out
* added percpu_and() for completeness's sake
* made generic percpu ops atomic against preemption
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-15 14:15:53 +01:00
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vcpu = percpu_read(xen_vcpu);
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2008-07-28 20:53:57 +02:00
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vcpu->evtchn_upcall_mask = 0;
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/* Doesn't matter if we get preempted here, because any
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pending event will get dealt with anyway. */
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barrier(); /* unmask then check (avoid races) */
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if (unlikely(vcpu->evtchn_upcall_pending))
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xen_force_evtchn_callback();
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}
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static void xen_safe_halt(void)
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{
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/* Blocking includes an implicit local_irq_enable(). */
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if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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BUG();
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}
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static void xen_halt(void)
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{
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if (irqs_disabled())
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HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
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else
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xen_safe_halt();
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}
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static const struct pv_irq_ops xen_irq_ops __initdata = {
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.init_IRQ = __xen_init_IRQ,
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.save_fl = xen_save_fl,
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.restore_fl = xen_restore_fl,
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.irq_disable = xen_irq_disable,
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.irq_enable = xen_irq_enable,
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.safe_halt = xen_safe_halt,
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.halt = xen_halt,
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#ifdef CONFIG_X86_64
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.adjust_exception_frame = xen_adjust_exception_frame,
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#endif
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};
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void __init xen_init_irq_ops()
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{
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pv_irq_ops = xen_irq_ops;
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}
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