2005-04-17 00:20:36 +02:00
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/*
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* Generic Generic NCR5380 driver defines
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*
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* Copyright 1993, Drew Eckhardt
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* Visionary Computing
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* (Unix and Linux consulting and custom programming)
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* drew@colorado.edu
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* +1 (303) 440-4894
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*
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* NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
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* K.Lentin@cs.monash.edu.au
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*/
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#ifndef GENERIC_NCR5380_H
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#define GENERIC_NCR5380_H
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#define __STRVAL(x) #x
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#define STRVAL(x) __STRVAL(x)
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2010-08-11 03:01:16 +02:00
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#ifndef SCSI_G_NCR5380_MEM
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2016-01-03 06:05:48 +01:00
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#define DRV_MODULE_NAME "g_NCR5380"
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2005-04-17 00:20:36 +02:00
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#define NCR5380_map_type int
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#define NCR5380_map_name port
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2016-01-03 06:05:06 +01:00
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#define NCR5380_read(reg) \
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inb(instance->io_port + (reg))
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#define NCR5380_write(reg, value) \
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outb(value, instance->io_port + (reg))
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2005-04-17 00:20:36 +02:00
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2016-01-03 06:06:15 +01:00
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#define NCR5380_implementation_fields \
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int c400_ctl_status; \
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int c400_blk_cnt; \
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2016-01-03 06:06:17 +01:00
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int c400_host_buf; \
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int io_width;
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2006-03-24 12:15:37 +01:00
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2005-04-17 00:20:36 +02:00
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#else
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2010-08-11 03:01:16 +02:00
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/* therefore SCSI_G_NCR5380_MEM */
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2016-01-03 06:05:48 +01:00
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#define DRV_MODULE_NAME "g_NCR5380_mmio"
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2005-04-17 00:20:36 +02:00
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#define NCR5380_map_type unsigned long
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#define NCR5380_map_name base
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#define NCR53C400_mem_base 0x3880
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#define NCR53C400_host_buffer 0x3900
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2016-03-23 11:10:10 +01:00
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#define NCR53C400_region_size 0x3a00
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2005-04-17 00:20:36 +02:00
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2016-01-03 06:05:06 +01:00
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#define NCR5380_read(reg) \
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readb(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
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NCR53C400_mem_base + (reg))
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#define NCR5380_write(reg, value) \
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writeb(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
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NCR53C400_mem_base + (reg))
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2005-04-17 00:20:36 +02:00
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#define NCR5380_implementation_fields \
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2016-01-03 06:06:15 +01:00
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void __iomem *iomem; \
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2016-03-23 11:10:10 +01:00
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resource_size_t iomem_size; \
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2016-01-03 06:06:15 +01:00
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int c400_ctl_status; \
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int c400_blk_cnt; \
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int c400_host_buf;
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2005-04-17 00:20:36 +02:00
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2006-03-24 12:15:37 +01:00
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#endif
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2005-04-17 00:20:36 +02:00
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2016-01-03 06:05:25 +01:00
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#define NCR5380_dma_xfer_len(instance, cmd, phase) \
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generic_NCR5380_dma_xfer_len(cmd)
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2005-04-17 00:20:36 +02:00
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#define NCR5380_intr generic_NCR5380_intr
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#define NCR5380_queue_command generic_NCR5380_queue_command
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#define NCR5380_abort generic_NCR5380_abort
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#define NCR5380_bus_reset generic_NCR5380_bus_reset
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#define NCR5380_pread generic_NCR5380_pread
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#define NCR5380_pwrite generic_NCR5380_pwrite
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2014-11-12 06:11:58 +01:00
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#define NCR5380_info generic_NCR5380_info
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#define NCR5380_show_info generic_NCR5380_show_info
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2005-04-17 00:20:36 +02:00
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#define BOARD_NCR5380 0
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#define BOARD_NCR53C400 1
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#define BOARD_NCR53C400A 2
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#define BOARD_DTC3181E 3
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2016-01-03 06:06:19 +01:00
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#define BOARD_HP_C2502 4
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2005-04-17 00:20:36 +02:00
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#endif /* GENERIC_NCR5380_H */
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