2007-07-10 18:33:01 +02:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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2008-12-01 09:16:08 +01:00
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* Copyright (C) 2006, 07 MIPS Technologies, Inc.
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2007-07-10 18:33:01 +02:00
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* written by Ralf Baechle (ralf@linux-mips.org)
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2008-12-01 09:16:08 +01:00
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* written by Ralf Baechle <ralf@linux-mips.org>
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2007-07-10 18:33:01 +02:00
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*
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2008-11-25 09:33:20 +01:00
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* Copyright (C) 2008 Wind River Systems, Inc.
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* updated by Tiejun Chen <tiejun.chen@windriver.com>
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*
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* 1. Probe driver for the Malta's UART ports:
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2007-07-10 18:33:01 +02:00
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*
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* o 2 ports in the SMC SuperIO
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* o 1 port in the CBUS UART, a discrete 16550 which normally is only used
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* for bringups.
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*
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* We don't use 8250_platform.c on Malta as it would result in the CBUS
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* UART becoming ttyS0.
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2008-11-25 09:33:20 +01:00
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*
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* 2. Register RTC-CMOS platform device on Malta.
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2007-07-10 18:33:01 +02:00
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*/
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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2008-11-25 09:33:20 +01:00
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#include <linux/mc146818rtc.h>
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2008-12-01 09:16:08 +01:00
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#include <linux/module.h>
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2010-10-07 15:08:54 +02:00
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#include <linux/irq.h>
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2008-12-01 09:16:08 +01:00
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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2008-11-25 09:33:20 +01:00
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#include <linux/platform_device.h>
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2012-11-13 10:41:50 +01:00
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#include <asm/mips-boards/maltaint.h>
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2008-12-01 09:16:08 +01:00
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#include <mtd/mtd-abi.h>
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2007-07-10 18:33:01 +02:00
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#define SMC_PORT(base, int) \
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{ \
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.iobase = base, \
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.irq = int, \
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.uartclk = 1843200, \
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.iotype = UPIO_PORT, \
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
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.regshift = 0, \
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}
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#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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static struct plat_serial8250_port uart8250_data[] = {
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SMC_PORT(0x3F8, 4),
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SMC_PORT(0x2F8, 3),
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{
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.mapbase = 0x1f000900, /* The CBUS UART */
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2012-11-13 10:41:50 +01:00
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.irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
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2007-07-10 18:33:01 +02:00
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.uartclk = 3686400, /* Twice the usual clk! */
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.iotype = UPIO_MEM32,
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.flags = CBUS_UART_FLAGS,
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.regshift = 3,
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},
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{ },
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};
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2008-11-25 09:33:20 +01:00
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static struct platform_device malta_uart8250_device = {
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2007-07-10 18:33:01 +02:00
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.name = "serial8250",
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2008-12-01 09:16:08 +01:00
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.id = PLAT8250_DEV_PLATFORM,
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2007-07-10 18:33:01 +02:00
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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2008-11-25 09:33:20 +01:00
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struct resource malta_rtc_resources[] = {
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{
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.start = RTC_PORT(0),
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.end = RTC_PORT(7),
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.flags = IORESOURCE_IO,
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}, {
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.start = RTC_IRQ,
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.end = RTC_IRQ,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device malta_rtc_device = {
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.name = "rtc_cmos",
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.id = -1,
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.resource = malta_rtc_resources,
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.num_resources = ARRAY_SIZE(malta_rtc_resources),
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};
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2008-12-01 09:16:08 +01:00
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static struct mtd_partition malta_mtd_partitions[] = {
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{
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.name = "YAMON",
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.offset = 0x0,
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.size = 0x100000,
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.mask_flags = MTD_WRITEABLE
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}, {
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.name = "User FS",
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.offset = 0x100000,
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.size = 0x2e0000
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}, {
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.name = "Board Config",
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.offset = 0x3e0000,
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.size = 0x020000,
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.mask_flags = MTD_WRITEABLE
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}
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};
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static struct physmap_flash_data malta_flash_data = {
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.width = 4,
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.nr_parts = ARRAY_SIZE(malta_mtd_partitions),
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.parts = malta_mtd_partitions
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};
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static struct resource malta_flash_resource = {
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.start = 0x1e000000,
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.end = 0x1e3fffff,
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.flags = IORESOURCE_MEM
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};
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static struct platform_device malta_flash_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &malta_flash_data,
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},
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.num_resources = 1,
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.resource = &malta_flash_resource,
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};
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2008-11-25 09:33:20 +01:00
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static struct platform_device *malta_devices[] __initdata = {
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&malta_uart8250_device,
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&malta_rtc_device,
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2008-12-01 09:16:08 +01:00
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&malta_flash_device,
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2008-11-25 09:33:20 +01:00
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};
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static int __init malta_add_devices(void)
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2007-07-10 18:33:01 +02:00
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{
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2008-11-25 09:33:20 +01:00
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int err;
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2007-07-10 18:33:01 +02:00
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2008-11-25 09:33:20 +01:00
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err = platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
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if (err)
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return err;
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return 0;
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}
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2007-07-10 18:33:01 +02:00
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2008-11-25 09:33:20 +01:00
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device_initcall(malta_add_devices);
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