2005-04-17 00:20:36 +02:00
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/*
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* This file is designed to contain the BUILD_INTERRUPT specifications for
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* all of the extra named interrupt vectors used by the architecture.
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* Usually this is the Inter Process Interrupts (IPIs)
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*/
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/*
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* The following vectors are part of the Linux architecture, there
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* is no hardware IRQ pin equivalent for them, they are triggered
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* through the ICC by us (IPIs)
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*/
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2009-01-27 17:07:08 +01:00
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#ifdef CONFIG_SMP
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2005-04-17 00:20:36 +02:00
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BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
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BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
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2008-06-26 11:21:54 +02:00
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BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
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2008-08-20 05:50:28 +02:00
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BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
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x86: fix panic with interrupts off (needed for MCE)
For some time each panic() called with interrupts disabled
triggered the !irqs_disabled() WARN_ON in smp_call_function(),
producing ugly backtraces and confusing users.
This is a common situation with machine checks for example which
tend to call panic with interrupts disabled, but will also hit
in other situations e.g. panic during early boot. In fact it
means that panic cannot be called in many circumstances, which
would be bad.
This all started with the new fancy queued smp_call_function,
which is then used by the shutdown path to shut down the other
CPUs.
On closer examination it turned out that the fancy RCU
smp_call_function() does lots of things not suitable in a panic
situation anyways, like allocating memory and relying on complex
system state.
I originally tried to patch this over by checking for panic
there, but it was quite complicated and the original patch
was also not very popular. This also didn't fix some of the
underlying complexity problems.
The new code in post 2.6.29 tries to patch around this by
checking for oops_in_progress, but that is not enough to make
this fully safe and I don't think that's a real solution
because panic has to be reliable.
So instead use an own vector to reboot. This makes the reboot
code extremly straight forward, which is definitely a big plus
in a panic situation where it is important to avoid relying on
too much kernel state. The new simple code is also safe to be
called from interupts off region because it is very very simple.
There can be situations where it is important that panic
is reliable. For example on a fatal machine check the panic
is needed to get the system up again and running as quickly
as possible. So it's important that panic is reliable and
all function it calls simple.
This is why I came up with this simple vector scheme.
It's very hard to beat in simplicity. Vectors are not
particularly precious anymore since all big systems are
using per CPU vectors.
Another possibility would have been to use an NMI similar
to kdump, but there is still the problem that NMIs don't
work reliably on some systems due to BIOS issues. NMIs
would have been able to stop CPUs running with interrupts
off too. In the sake of universal reliability I opted for
using a non NMI vector for now.
I put the reboot vector into the highest priority bucket of
the APIC vectors and moved the 64bit UV_BAU message down
instead into the next lower priority.
[ Impact: bug fix, fixes an old regression ]
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-05-27 21:56:52 +02:00
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BUILD_INTERRUPT(reboot_interrupt,REBOOT_VECTOR)
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2005-04-17 00:20:36 +02:00
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#endif
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2009-10-14 16:22:57 +02:00
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BUILD_INTERRUPT(x86_platform_ipi, X86_PLATFORM_IPI_VECTOR)
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2009-03-04 19:56:05 +01:00
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2005-04-17 00:20:36 +02:00
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/*
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* every pentium local APIC has two 'local interrupts', with a
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* soft-definable vector attached to both interrupts, one of
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* which is a timer interrupt, the other one is error counter
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* overflow. Linux uses the local APIC timer interrupt to get
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* a much simpler SMP time architecture:
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*/
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#ifdef CONFIG_X86_LOCAL_APIC
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2009-01-28 19:34:09 +01:00
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2005-04-17 00:20:36 +02:00
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BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
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BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
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BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
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2010-10-14 08:01:34 +02:00
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#ifdef CONFIG_IRQ_WORK
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BUILD_INTERRUPT(irq_work_interrupt, IRQ_WORK_VECTOR)
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2009-01-28 19:34:09 +01:00
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#endif
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x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-28 19:07:31 +02:00
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#ifdef CONFIG_X86_THERMAL_VECTOR
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2005-04-17 00:20:36 +02:00
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BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
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#endif
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2009-04-28 23:32:56 +02:00
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#ifdef CONFIG_X86_MCE_THRESHOLD
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BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)
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#endif
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2005-04-17 00:20:36 +02:00
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#endif
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