OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
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/*
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* OMAP4 CM instance functions
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*
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* Copyright (C) 2009 Nokia Corporation
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2012-10-21 09:01:11 +02:00
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* Copyright (C) 2008-2011 Texas Instruments, Inc.
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
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* Paul Walmsley
|
2012-10-21 09:01:11 +02:00
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|
|
* Rajendra Nayak <rnayak@ti.com>
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
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* or CM2 hardware modules. For example, the EMU_CM CM instance is in
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* the PRM hardware module. What a mess...
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/io.h>
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2012-10-21 09:01:11 +02:00
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#include "clockdomain.h"
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
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#include "cm.h"
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#include "cm1_44xx.h"
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#include "cm2_44xx.h"
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#include "cm44xx.h"
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2010-12-22 05:05:15 +01:00
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#include "cm-regbits-34xx.h"
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OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
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#include "prcm44xx.h"
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#include "prm44xx.h"
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#include "prcm_mpu44xx.h"
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2012-05-08 07:55:22 +02:00
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#include "prcm-common.h"
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
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2014-03-31 17:15:52 +02:00
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#define OMAP4430_IDLEST_SHIFT 16
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#define OMAP4430_IDLEST_MASK (0x3 << 16)
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#define OMAP4430_CLKTRCTRL_SHIFT 0
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#define OMAP4430_CLKTRCTRL_MASK (0x3 << 0)
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#define OMAP4430_MODULEMODE_SHIFT 0
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#define OMAP4430_MODULEMODE_MASK (0x3 << 0)
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2011-07-10 13:56:30 +02:00
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/*
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* CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
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*
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* 0x0 func: Module is fully functional, including OCP
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* 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
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* abortion
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* 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
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* using separate functional clock
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* 0x3 disabled: Module is disabled and cannot be accessed
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*
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*/
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#define CLKCTRL_IDLEST_FUNCTIONAL 0x0
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#define CLKCTRL_IDLEST_INTRANSITION 0x1
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#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2
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#define CLKCTRL_IDLEST_DISABLED 0x3
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2012-05-08 07:55:22 +02:00
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static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS];
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/**
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* omap_cm_base_init - Populates the cm partitions
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*
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* Populates the base addresses of the _cm_bases
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* array used for read/write of cm module registers.
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*/
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2014-11-06 13:39:40 +01:00
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static void omap_cm_base_init(void)
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2012-05-08 07:55:22 +02:00
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{
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_cm_bases[OMAP4430_PRM_PARTITION] = prm_base;
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_cm_bases[OMAP4430_CM1_PARTITION] = cm_base;
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_cm_bases[OMAP4430_CM2_PARTITION] = cm2_base;
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_cm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base;
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}
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
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2011-07-10 13:56:30 +02:00
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/* Private functions */
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2014-10-27 16:39:25 +01:00
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static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
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2011-07-10 13:56:30 +02:00
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/**
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* _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
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* @part: PRCM partition ID that the CM_CLKCTRL register exists in
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* @inst: CM instance register offset (*_INST macro)
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* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
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*
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* Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
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* bit 0.
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*/
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2014-10-27 16:39:23 +01:00
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static u32 _clkctrl_idlest(u8 part, u16 inst, u16 clkctrl_offs)
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2011-07-10 13:56:30 +02:00
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{
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u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
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v &= OMAP4430_IDLEST_MASK;
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v >>= OMAP4430_IDLEST_SHIFT;
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return v;
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}
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/**
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* _is_module_ready - can module registers be accessed without causing an abort?
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* @part: PRCM partition ID that the CM_CLKCTRL register exists in
|
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* @inst: CM instance register offset (*_INST macro)
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* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
|
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*
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* Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
|
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* *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
|
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*/
|
2014-10-27 16:39:23 +01:00
|
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static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
|
2011-07-10 13:56:30 +02:00
|
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|
{
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u32 v;
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|
2014-10-27 16:39:23 +01:00
|
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v = _clkctrl_idlest(part, inst, clkctrl_offs);
|
2011-07-10 13:56:30 +02:00
|
|
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return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
|
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v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
|
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|
|
}
|
|
|
|
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
/* Read a register in a CM instance */
|
2014-10-27 16:39:25 +01:00
|
|
|
static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
{
|
|
|
|
BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
|
|
|
|
part == OMAP4430_INVALID_PRCM_PARTITION ||
|
|
|
|
!_cm_bases[part]);
|
2014-04-15 19:37:46 +02:00
|
|
|
return readl_relaxed(_cm_bases[part] + inst + idx);
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Write into a register in a CM instance */
|
2014-10-27 16:39:25 +01:00
|
|
|
static void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
{
|
|
|
|
BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
|
|
|
|
part == OMAP4430_INVALID_PRCM_PARTITION ||
|
|
|
|
!_cm_bases[part]);
|
2014-04-15 19:37:46 +02:00
|
|
|
writel_relaxed(val, _cm_bases[part] + inst + idx);
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Read-modify-write a register in CM1. Caller must lock */
|
2014-10-27 16:39:25 +01:00
|
|
|
static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
|
|
|
|
s16 idx)
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
{
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
v = omap4_cminst_read_inst_reg(part, inst, idx);
|
|
|
|
v &= ~mask;
|
|
|
|
v |= bits;
|
|
|
|
omap4_cminst_write_inst_reg(v, part, inst, idx);
|
|
|
|
|
|
|
|
return v;
|
|
|
|
}
|
|
|
|
|
2014-10-27 16:39:25 +01:00
|
|
|
static u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
|
2011-02-25 23:48:14 +01:00
|
|
|
{
|
|
|
|
return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
|
|
|
|
}
|
|
|
|
|
2014-10-27 16:39:25 +01:00
|
|
|
static u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
|
|
|
|
s16 idx)
|
2011-02-25 23:48:14 +01:00
|
|
|
{
|
|
|
|
return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
|
|
|
|
}
|
|
|
|
|
2014-10-27 16:39:25 +01:00
|
|
|
static u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
|
2011-02-25 23:48:14 +01:00
|
|
|
{
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
v = omap4_cminst_read_inst_reg(part, inst, idx);
|
|
|
|
v &= mask;
|
|
|
|
v >>= __ffs(mask);
|
|
|
|
|
|
|
|
return v;
|
|
|
|
}
|
|
|
|
|
2010-12-22 05:05:15 +01:00
|
|
|
/*
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield
|
|
|
|
* @c: CLKTRCTRL register bitfield (LSB = bit 0, i.e., unshifted)
|
|
|
|
* @part: PRCM partition ID that the CM_CLKSTCTRL register exists in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @cdoffs: Clockdomain register offset (*_CDOFFS macro)
|
|
|
|
*
|
|
|
|
* @c must be the unshifted value for CLKTRCTRL - i.e., this function
|
|
|
|
* will handle the shift itself.
|
|
|
|
*/
|
2013-10-12 12:14:21 +02:00
|
|
|
static void _clktrctrl_write(u8 c, u8 part, u16 inst, u16 cdoffs)
|
2010-12-22 05:05:15 +01:00
|
|
|
{
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
|
|
|
|
v &= ~OMAP4430_CLKTRCTRL_MASK;
|
|
|
|
v |= c << OMAP4430_CLKTRCTRL_SHIFT;
|
|
|
|
omap4_cminst_write_inst_reg(v, part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap4_cminst_is_clkdm_in_hwsup - is a clockdomain in hwsup idle mode?
|
|
|
|
* @part: PRCM partition ID that the CM_CLKSTCTRL register exists in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @cdoffs: Clockdomain register offset (*_CDOFFS macro)
|
|
|
|
*
|
|
|
|
* Returns true if the clockdomain referred to by (@part, @inst, @cdoffs)
|
|
|
|
* is in hardware-supervised idle mode, or 0 otherwise.
|
|
|
|
*/
|
2014-10-27 16:39:24 +01:00
|
|
|
static bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
|
2010-12-22 05:05:15 +01:00
|
|
|
{
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
|
|
|
|
v &= OMAP4430_CLKTRCTRL_MASK;
|
|
|
|
v >>= OMAP4430_CLKTRCTRL_SHIFT;
|
|
|
|
|
|
|
|
return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap4_cminst_clkdm_enable_hwsup - put a clockdomain in hwsup-idle mode
|
|
|
|
* @part: PRCM partition ID that the clockdomain registers exist in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @cdoffs: Clockdomain register offset (*_CDOFFS macro)
|
|
|
|
*
|
|
|
|
* Put a clockdomain referred to by (@part, @inst, @cdoffs) into
|
|
|
|
* hardware-supervised idle mode. No return value.
|
|
|
|
*/
|
2014-10-27 16:39:24 +01:00
|
|
|
static void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
|
2010-12-22 05:05:15 +01:00
|
|
|
{
|
|
|
|
_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap4_cminst_clkdm_disable_hwsup - put a clockdomain in swsup-idle mode
|
|
|
|
* @part: PRCM partition ID that the clockdomain registers exist in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @cdoffs: Clockdomain register offset (*_CDOFFS macro)
|
|
|
|
*
|
|
|
|
* Put a clockdomain referred to by (@part, @inst, @cdoffs) into
|
|
|
|
* software-supervised idle mode, i.e., controlled manually by the
|
|
|
|
* Linux OMAP clockdomain code. No return value.
|
|
|
|
*/
|
2014-10-27 16:39:24 +01:00
|
|
|
static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
|
2010-12-22 05:05:15 +01:00
|
|
|
{
|
|
|
|
_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
|
|
|
|
* @part: PRCM partition ID that the clockdomain registers exist in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @cdoffs: Clockdomain register offset (*_CDOFFS macro)
|
|
|
|
*
|
|
|
|
* Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle,
|
|
|
|
* waking it up. No return value.
|
|
|
|
*/
|
2014-10-27 16:39:24 +01:00
|
|
|
static void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
|
2010-12-22 05:05:15 +01:00
|
|
|
{
|
|
|
|
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
*
|
|
|
|
*/
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
|
2014-10-27 16:39:24 +01:00
|
|
|
static void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
|
2014-02-28 20:43:46 +01:00
|
|
|
{
|
|
|
|
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
|
|
|
|
}
|
|
|
|
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
/**
|
2011-07-10 13:56:30 +02:00
|
|
|
* omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
|
|
|
|
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
|
2014-10-27 16:39:23 +01:00
|
|
|
* @bit_shift: bit shift for the register, ignored for OMAP4+
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
*
|
|
|
|
* Wait for the module IDLEST to be functional. If the idle state is in any
|
|
|
|
* the non functional state (trans, idle or disabled), module and thus the
|
|
|
|
* sysconfig cannot be accessed and will probably lead to an "imprecise
|
|
|
|
* external abort"
|
|
|
|
*/
|
2014-10-27 16:39:23 +01:00
|
|
|
static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
|
|
|
|
u8 bit_shift)
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
{
|
|
|
|
int i = 0;
|
|
|
|
|
2011-07-10 13:56:30 +02:00
|
|
|
if (!clkctrl_offs)
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
return 0;
|
|
|
|
|
2014-10-27 16:39:23 +01:00
|
|
|
omap_test_timeout(_is_module_ready(part, inst, clkctrl_offs),
|
2011-07-10 13:56:30 +02:00
|
|
|
MAX_MODULE_READY_TIME, i);
|
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this. Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.
To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*. The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument. Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.
As far as I can see, there's really no good way to handle these types
of register access inconsistencies. This patch seemed like the least
bad approach.
Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code. PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.
While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.
Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22 05:05:14 +01:00
|
|
|
|
|
|
|
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
|
|
|
|
}
|
|
|
|
|
2011-07-10 13:56:30 +02:00
|
|
|
/**
|
|
|
|
* omap4_cminst_wait_module_idle - wait for a module to be in 'disabled'
|
|
|
|
* state
|
|
|
|
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
|
2014-10-27 16:39:23 +01:00
|
|
|
* @bit_shift: Bit shift for the register, ignored for OMAP4+
|
2011-07-10 13:56:30 +02:00
|
|
|
*
|
|
|
|
* Wait for the module IDLEST to be disabled. Some PRCM transition,
|
|
|
|
* like reset assertion or parent clock de-activation must wait the
|
|
|
|
* module to be fully disabled.
|
|
|
|
*/
|
2014-10-27 16:39:23 +01:00
|
|
|
static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
|
|
|
|
u8 bit_shift)
|
2011-07-10 13:56:30 +02:00
|
|
|
{
|
|
|
|
int i = 0;
|
|
|
|
|
|
|
|
if (!clkctrl_offs)
|
|
|
|
return 0;
|
|
|
|
|
2014-10-27 16:39:23 +01:00
|
|
|
omap_test_timeout((_clkctrl_idlest(part, inst, clkctrl_offs) ==
|
2011-07-10 13:56:30 +02:00
|
|
|
CLKCTRL_IDLEST_DISABLED),
|
2012-06-17 19:57:53 +02:00
|
|
|
MAX_MODULE_DISABLE_TIME, i);
|
2011-07-10 13:56:30 +02:00
|
|
|
|
2012-06-17 19:57:53 +02:00
|
|
|
return (i < MAX_MODULE_DISABLE_TIME) ? 0 : -EBUSY;
|
2011-07-10 13:56:30 +02:00
|
|
|
}
|
2011-07-10 13:56:32 +02:00
|
|
|
|
|
|
|
/**
|
|
|
|
* omap4_cminst_module_enable - Enable the modulemode inside CLKCTRL
|
|
|
|
* @mode: Module mode (SW or HW)
|
|
|
|
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
|
|
|
|
*
|
|
|
|
* No return value.
|
|
|
|
*/
|
2014-10-27 16:39:24 +01:00
|
|
|
static void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
|
|
|
|
u16 clkctrl_offs)
|
2011-07-10 13:56:32 +02:00
|
|
|
{
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
|
|
|
|
v &= ~OMAP4430_MODULEMODE_MASK;
|
|
|
|
v |= mode << OMAP4430_MODULEMODE_SHIFT;
|
|
|
|
omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* omap4_cminst_module_disable - Disable the module inside CLKCTRL
|
|
|
|
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
|
|
|
|
* @inst: CM instance register offset (*_INST macro)
|
|
|
|
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
|
|
|
|
*
|
|
|
|
* No return value.
|
|
|
|
*/
|
2014-10-27 16:39:24 +01:00
|
|
|
static void omap4_cminst_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
|
2011-07-10 13:56:32 +02:00
|
|
|
{
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
|
|
|
|
v &= ~OMAP4430_MODULEMODE_MASK;
|
|
|
|
omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs);
|
|
|
|
}
|
2012-10-21 09:01:11 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Clockdomain low-level functions
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1,
|
|
|
|
struct clockdomain *clkdm2)
|
|
|
|
{
|
|
|
|
omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit),
|
|
|
|
clkdm1->prcm_partition,
|
|
|
|
clkdm1->cm_inst, clkdm1->clkdm_offs +
|
|
|
|
OMAP4_CM_STATICDEP);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1,
|
|
|
|
struct clockdomain *clkdm2)
|
|
|
|
{
|
|
|
|
omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit),
|
|
|
|
clkdm1->prcm_partition,
|
|
|
|
clkdm1->cm_inst, clkdm1->clkdm_offs +
|
|
|
|
OMAP4_CM_STATICDEP);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1,
|
|
|
|
struct clockdomain *clkdm2)
|
|
|
|
{
|
|
|
|
return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition,
|
|
|
|
clkdm1->cm_inst,
|
|
|
|
clkdm1->clkdm_offs +
|
|
|
|
OMAP4_CM_STATICDEP,
|
|
|
|
(1 << clkdm2->dep_bit));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
|
|
|
|
{
|
|
|
|
struct clkdm_dep *cd;
|
|
|
|
u32 mask = 0;
|
|
|
|
|
|
|
|
if (!clkdm->prcm_partition)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
|
|
|
|
if (!cd->clkdm)
|
|
|
|
continue; /* only happens if data is erroneous */
|
|
|
|
|
|
|
|
mask |= 1 << cd->clkdm->dep_bit;
|
2013-01-26 08:58:17 +01:00
|
|
|
cd->wkdep_usecount = 0;
|
2012-10-21 09:01:11 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition,
|
|
|
|
clkdm->cm_inst, clkdm->clkdm_offs +
|
|
|
|
OMAP4_CM_STATICDEP);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap4_clkdm_sleep(struct clockdomain *clkdm)
|
|
|
|
{
|
2014-02-28 20:43:46 +01:00
|
|
|
if (clkdm->flags & CLKDM_CAN_HWSUP)
|
|
|
|
omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
|
|
|
|
clkdm->cm_inst,
|
|
|
|
clkdm->clkdm_offs);
|
|
|
|
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
|
|
|
|
omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
|
|
|
|
clkdm->cm_inst,
|
|
|
|
clkdm->clkdm_offs);
|
|
|
|
else
|
|
|
|
return -EINVAL;
|
|
|
|
|
2012-10-21 09:01:11 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap4_clkdm_wakeup(struct clockdomain *clkdm)
|
|
|
|
{
|
|
|
|
omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition,
|
|
|
|
clkdm->cm_inst, clkdm->clkdm_offs);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap4_clkdm_allow_idle(struct clockdomain *clkdm)
|
|
|
|
{
|
|
|
|
omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
|
|
|
|
clkdm->cm_inst, clkdm->clkdm_offs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap4_clkdm_deny_idle(struct clockdomain *clkdm)
|
|
|
|
{
|
|
|
|
if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
|
|
|
|
omap4_clkdm_wakeup(clkdm);
|
|
|
|
else
|
|
|
|
omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
|
|
|
|
clkdm->cm_inst,
|
|
|
|
clkdm->clkdm_offs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)
|
|
|
|
{
|
|
|
|
if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
|
|
|
|
return omap4_clkdm_wakeup(clkdm);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap4_clkdm_clk_disable(struct clockdomain *clkdm)
|
|
|
|
{
|
|
|
|
bool hwsup = false;
|
|
|
|
|
|
|
|
if (!clkdm->prcm_partition)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The CLKDM_MISSING_IDLE_REPORTING flag documentation has
|
|
|
|
* more details on the unpleasant problem this is working
|
|
|
|
* around
|
|
|
|
*/
|
|
|
|
if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
|
|
|
|
!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
|
|
|
|
omap4_clkdm_allow_idle(clkdm);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
|
|
|
|
clkdm->cm_inst, clkdm->clkdm_offs);
|
|
|
|
|
|
|
|
if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
|
|
|
|
omap4_clkdm_sleep(clkdm);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct clkdm_ops omap4_clkdm_operations = {
|
|
|
|
.clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep,
|
|
|
|
.clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep,
|
|
|
|
.clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep,
|
|
|
|
.clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps,
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|
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.clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep,
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|
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.clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep,
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|
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.clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep,
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|
|
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.clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps,
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|
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.clkdm_sleep = omap4_clkdm_sleep,
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|
|
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.clkdm_wakeup = omap4_clkdm_wakeup,
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|
|
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.clkdm_allow_idle = omap4_clkdm_allow_idle,
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|
|
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.clkdm_deny_idle = omap4_clkdm_deny_idle,
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|
|
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.clkdm_clk_enable = omap4_clkdm_clk_enable,
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|
|
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.clkdm_clk_disable = omap4_clkdm_clk_disable,
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|
|
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};
|
2013-10-12 12:16:03 +02:00
|
|
|
|
|
|
|
struct clkdm_ops am43xx_clkdm_operations = {
|
|
|
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.clkdm_sleep = omap4_clkdm_sleep,
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|
|
|
.clkdm_wakeup = omap4_clkdm_wakeup,
|
|
|
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.clkdm_allow_idle = omap4_clkdm_allow_idle,
|
|
|
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.clkdm_deny_idle = omap4_clkdm_deny_idle,
|
|
|
|
.clkdm_clk_enable = omap4_clkdm_clk_enable,
|
|
|
|
.clkdm_clk_disable = omap4_clkdm_clk_disable,
|
|
|
|
};
|
2014-10-27 16:39:23 +01:00
|
|
|
|
2014-10-27 16:39:23 +01:00
|
|
|
static struct cm_ll_data omap4xxx_cm_ll_data = {
|
|
|
|
.wait_module_ready = &omap4_cminst_wait_module_ready,
|
2014-10-27 16:39:23 +01:00
|
|
|
.wait_module_idle = &omap4_cminst_wait_module_idle,
|
2014-10-27 16:39:24 +01:00
|
|
|
.module_enable = &omap4_cminst_module_enable,
|
|
|
|
.module_disable = &omap4_cminst_module_disable,
|
2014-10-27 16:39:23 +01:00
|
|
|
};
|
2014-10-27 16:39:23 +01:00
|
|
|
|
2014-11-21 14:51:37 +01:00
|
|
|
int __init omap4_cm_init(const struct omap_prcm_init_data *data)
|
2014-10-27 16:39:23 +01:00
|
|
|
{
|
2014-11-06 13:39:40 +01:00
|
|
|
omap_cm_base_init();
|
|
|
|
|
2014-10-27 16:39:23 +01:00
|
|
|
return cm_register(&omap4xxx_cm_ll_data);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit omap4_cm_exit(void)
|
|
|
|
{
|
|
|
|
cm_unregister(&omap4xxx_cm_ll_data);
|
|
|
|
}
|
|
|
|
__exitcall(omap4_cm_exit);
|