2006-08-30 00:12:40 +02:00
|
|
|
/*
|
|
|
|
* pata_via.c - VIA PATA for new ATA layer
|
|
|
|
* (C) 2005-2006 Red Hat Inc
|
|
|
|
*
|
|
|
|
* Documentation
|
|
|
|
* Most chipset documentation available under NDA only
|
|
|
|
*
|
|
|
|
* VIA version guide
|
|
|
|
* VIA VT82C561 - early design, uses ata_generic currently
|
|
|
|
* VIA VT82C576 - MWDMA, 33Mhz
|
|
|
|
* VIA VT82C586 - MWDMA, 33Mhz
|
|
|
|
* VIA VT82C586a - Added UDMA to 33Mhz
|
|
|
|
* VIA VT82C586b - UDMA33
|
|
|
|
* VIA VT82C596a - Nonfunctional UDMA66
|
|
|
|
* VIA VT82C596b - Working UDMA66
|
|
|
|
* VIA VT82C686 - Nonfunctional UDMA66
|
|
|
|
* VIA VT82C686a - Working UDMA66
|
|
|
|
* VIA VT82C686b - Updated to UDMA100
|
|
|
|
* VIA VT8231 - UDMA100
|
|
|
|
* VIA VT8233 - UDMA100
|
|
|
|
* VIA VT8233a - UDMA133
|
|
|
|
* VIA VT8233c - UDMA100
|
|
|
|
* VIA VT8235 - UDMA133
|
|
|
|
* VIA VT8237 - UDMA133
|
2010-01-18 18:17:12 +01:00
|
|
|
* VIA VT8237A - UDMA133
|
2007-01-31 18:14:38 +01:00
|
|
|
* VIA VT8237S - UDMA133
|
2006-12-04 17:38:25 +01:00
|
|
|
* VIA VT8251 - UDMA133
|
2006-08-30 00:12:40 +02:00
|
|
|
*
|
|
|
|
* Most registers remain compatible across chips. Others start reserved
|
|
|
|
* and acquire sensible semantics if set to 1 (eg cable detect). A few
|
|
|
|
* exceptions exist, notably around the FIFO settings.
|
|
|
|
*
|
|
|
|
* One additional quirk of the VIA design is that like ALi they use few
|
|
|
|
* PCI IDs for a lot of chips.
|
|
|
|
*
|
|
|
|
* Based heavily on:
|
|
|
|
*
|
|
|
|
* Version 3.38
|
|
|
|
*
|
|
|
|
* VIA IDE driver for Linux. Supported southbridges:
|
|
|
|
*
|
|
|
|
* vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
|
|
|
|
* vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
|
|
|
|
* vt8235, vt8237
|
|
|
|
*
|
|
|
|
* Copyright (c) 2000-2002 Vojtech Pavlik
|
|
|
|
*
|
|
|
|
* Based on the work of:
|
|
|
|
* Michel Aubry
|
|
|
|
* Jeff Garzik
|
|
|
|
* Andre Hedrick
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/pci.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/blkdev.h>
|
|
|
|
#include <linux/delay.h>
|
|
|
|
#include <scsi/scsi_host.h>
|
|
|
|
#include <linux/libata.h>
|
2007-05-23 23:39:01 +02:00
|
|
|
#include <linux/dmi.h>
|
2006-08-30 00:12:40 +02:00
|
|
|
|
|
|
|
#define DRV_NAME "pata_via"
|
2009-04-17 13:21:21 +02:00
|
|
|
#define DRV_VERSION "0.3.4"
|
2006-08-30 00:12:40 +02:00
|
|
|
|
|
|
|
enum {
|
2010-01-18 18:17:12 +01:00
|
|
|
VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
|
|
|
|
VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
|
|
|
|
VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
|
|
|
|
VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
|
|
|
|
VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
|
|
|
|
VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
|
|
|
|
VIA_NO_ENABLES = 0x40, /* Has no enablebits */
|
|
|
|
VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
|
2006-08-30 00:12:40 +02:00
|
|
|
};
|
|
|
|
|
2009-01-23 08:37:39 +01:00
|
|
|
enum {
|
|
|
|
VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */
|
|
|
|
};
|
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
/*
|
|
|
|
* VIA SouthBridge chips.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static const struct via_isa_bridge {
|
|
|
|
const char *name;
|
|
|
|
u16 id;
|
|
|
|
u8 rev_min;
|
|
|
|
u8 rev_max;
|
2010-01-18 18:17:12 +01:00
|
|
|
u8 udma_mask;
|
|
|
|
u8 flags;
|
2006-08-30 00:12:40 +02:00
|
|
|
} via_isa_bridges[] = {
|
2010-01-18 18:17:12 +01:00
|
|
|
{ "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
|
|
|
|
{ "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
|
|
|
|
{ "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
|
|
|
{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
|
|
|
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
|
|
|
{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
|
|
|
|
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
|
|
|
|
{ "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
|
|
|
|
{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
|
|
|
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
|
|
|
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
|
|
|
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
|
|
|
{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
|
|
|
|
{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
|
|
|
|
{ "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
|
|
|
|
{ "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
|
|
|
|
{ "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
|
|
|
|
{ "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
|
|
|
|
{ "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
|
|
|
|
{ "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
|
|
|
|
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
|
|
|
|
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
|
|
|
|
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
|
|
|
|
{ "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
|
|
|
|
{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
|
|
|
|
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
|
|
|
|
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
|
|
|
|
{ "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
2006-08-30 00:12:40 +02:00
|
|
|
{ NULL }
|
|
|
|
};
|
|
|
|
|
2009-04-17 13:21:21 +02:00
|
|
|
struct via_port {
|
|
|
|
u8 cached_device;
|
|
|
|
};
|
2007-05-23 23:39:01 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Cable special cases
|
|
|
|
*/
|
|
|
|
|
2007-10-03 21:15:40 +02:00
|
|
|
static const struct dmi_system_id cable_dmi_table[] = {
|
2007-05-23 23:39:01 +02:00
|
|
|
{
|
|
|
|
.ident = "Acer Ferrari 3400",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
|
|
|
|
DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
|
|
|
|
},
|
|
|
|
},
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
static int via_cable_override(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
/* Systems by DMI */
|
|
|
|
if (dmi_check_system(cable_dmi_table))
|
|
|
|
return 1;
|
2007-08-22 23:57:48 +02:00
|
|
|
/* Arima W730-K8/Targa Visionary 811/... */
|
|
|
|
if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
|
|
|
|
return 1;
|
2007-05-23 23:39:01 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
/**
|
|
|
|
* via_cable_detect - cable detection
|
|
|
|
* @ap: ATA port
|
|
|
|
*
|
|
|
|
* Perform cable detection. Actually for the VIA case the BIOS
|
|
|
|
* already did this for us. We read the values provided by the
|
|
|
|
* BIOS. If you are using an 8235 in a non-PC configuration you
|
|
|
|
* may need to update this code.
|
|
|
|
*
|
|
|
|
* Hotplug also impacts on this.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int via_cable_detect(struct ata_port *ap) {
|
2007-03-07 17:56:54 +01:00
|
|
|
const struct via_isa_bridge *config = ap->host->private_data;
|
2006-08-30 00:12:40 +02:00
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
|
|
|
u32 ata66;
|
|
|
|
|
2007-05-23 23:39:01 +02:00
|
|
|
if (via_cable_override(pdev))
|
|
|
|
return ATA_CBL_PATA40_SHORT;
|
|
|
|
|
2008-02-07 02:18:53 +01:00
|
|
|
if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
|
|
|
|
return ATA_CBL_SATA;
|
|
|
|
|
2007-03-07 17:56:54 +01:00
|
|
|
/* Early chips are 40 wire */
|
2010-01-18 18:17:12 +01:00
|
|
|
if (config->udma_mask < ATA_UDMA4)
|
2007-03-07 17:56:54 +01:00
|
|
|
return ATA_CBL_PATA40;
|
|
|
|
/* UDMA 66 chips have only drive side logic */
|
2010-01-18 18:17:12 +01:00
|
|
|
else if (config->udma_mask < ATA_UDMA5)
|
2007-03-07 17:56:54 +01:00
|
|
|
return ATA_CBL_PATA_UNK;
|
|
|
|
/* UDMA 100 or later */
|
2006-08-30 00:12:40 +02:00
|
|
|
pci_read_config_dword(pdev, 0x50, &ata66);
|
|
|
|
/* Check both the drive cable reporting bits, we might not have
|
|
|
|
two drives */
|
|
|
|
if (ata66 & (0x10100000 >> (16 * ap->port_no)))
|
|
|
|
return ATA_CBL_PATA80;
|
2007-07-26 19:38:06 +02:00
|
|
|
/* Check with ACPI so we can spot BIOS reported SATA bridges */
|
2007-12-18 08:33:06 +01:00
|
|
|
if (ata_acpi_init_gtm(ap) &&
|
|
|
|
ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
|
2007-07-26 19:38:06 +02:00
|
|
|
return ATA_CBL_PATA80;
|
2007-03-07 17:56:54 +01:00
|
|
|
return ATA_CBL_PATA40;
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
|
|
|
|
2007-08-06 11:36:23 +02:00
|
|
|
static int via_pre_reset(struct ata_link *link, unsigned long deadline)
|
2006-08-30 00:12:40 +02:00
|
|
|
{
|
2007-08-06 11:36:23 +02:00
|
|
|
struct ata_port *ap = link->ap;
|
2006-08-30 00:12:40 +02:00
|
|
|
const struct via_isa_bridge *config = ap->host->private_data;
|
|
|
|
|
|
|
|
if (!(config->flags & VIA_NO_ENABLES)) {
|
|
|
|
static const struct pci_bits via_enable_bits[] = {
|
|
|
|
{ 0x40, 1, 0x02, 0x02 },
|
|
|
|
{ 0x40, 1, 0x01, 0x01 }
|
|
|
|
};
|
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
2006-09-26 18:53:38 +02:00
|
|
|
if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
|
|
|
|
return -ENOENT;
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 08:50:52 +01:00
|
|
|
|
2008-04-07 15:47:16 +02:00
|
|
|
return ata_sff_prereset(link, deadline);
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
2010-01-18 18:17:03 +01:00
|
|
|
* via_do_set_mode - set transfer mode data
|
2006-08-30 00:12:40 +02:00
|
|
|
* @ap: ATA interface
|
|
|
|
* @adev: ATA device
|
|
|
|
* @mode: ATA mode being programmed
|
|
|
|
* @set_ast: Set to program address setup
|
|
|
|
* @udma_type: UDMA mode/format of registers
|
|
|
|
*
|
|
|
|
* Program the VIA registers for DMA and PIO modes. Uses the ata timing
|
|
|
|
* support in order to compute modes.
|
|
|
|
*
|
|
|
|
* FIXME: Hotplug will require we serialize multiple mode changes
|
|
|
|
* on the two channels.
|
|
|
|
*/
|
|
|
|
|
2010-01-18 18:17:12 +01:00
|
|
|
static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
|
|
|
|
int mode, int set_ast, int udma_type)
|
2006-08-30 00:12:40 +02:00
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
|
|
|
struct ata_device *peer = ata_dev_pair(adev);
|
|
|
|
struct ata_timing t, p;
|
2010-01-18 18:17:12 +01:00
|
|
|
static int via_clock = 33333; /* Bus clock in kHZ */
|
2006-08-30 00:12:40 +02:00
|
|
|
unsigned long T = 1000000000 / via_clock;
|
2010-01-18 18:17:12 +01:00
|
|
|
unsigned long UT = T;
|
2006-08-30 00:12:40 +02:00
|
|
|
int ut;
|
|
|
|
int offset = 3 - (2*ap->port_no) - adev->devno;
|
|
|
|
|
2010-01-18 18:17:12 +01:00
|
|
|
switch (udma_type) {
|
|
|
|
case ATA_UDMA4:
|
|
|
|
UT = T / 2; break;
|
|
|
|
case ATA_UDMA5:
|
|
|
|
UT = T / 3; break;
|
|
|
|
case ATA_UDMA6:
|
|
|
|
UT = T / 4; break;
|
|
|
|
}
|
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
/* Calculate the timing values we require */
|
|
|
|
ata_timing_compute(adev, mode, &t, T, UT);
|
|
|
|
|
|
|
|
/* We share 8bit timing so we must merge the constraints */
|
|
|
|
if (peer) {
|
|
|
|
if (peer->pio_mode) {
|
|
|
|
ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
|
|
|
|
ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Address setup is programmable but breaks on UDMA133 setups */
|
|
|
|
if (set_ast) {
|
|
|
|
u8 setup; /* 2 bits per drive */
|
|
|
|
int shift = 2 * offset;
|
|
|
|
|
|
|
|
pci_read_config_byte(pdev, 0x4C, &setup);
|
|
|
|
setup &= ~(3 << shift);
|
2010-01-18 18:17:03 +01:00
|
|
|
setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
|
2006-08-30 00:12:40 +02:00
|
|
|
pci_write_config_byte(pdev, 0x4C, setup);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Load the PIO mode bits */
|
|
|
|
pci_write_config_byte(pdev, 0x4F - ap->port_no,
|
2008-05-15 01:17:00 +02:00
|
|
|
((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
|
2006-08-30 00:12:40 +02:00
|
|
|
pci_write_config_byte(pdev, 0x48 + offset,
|
2008-05-15 01:17:00 +02:00
|
|
|
((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
|
2006-08-30 00:12:40 +02:00
|
|
|
|
|
|
|
/* Load the UDMA bits according to type */
|
2010-01-18 18:17:12 +01:00
|
|
|
switch (udma_type) {
|
|
|
|
case ATA_UDMA2:
|
|
|
|
default:
|
|
|
|
ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
|
|
|
|
break;
|
|
|
|
case ATA_UDMA4:
|
|
|
|
ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
|
|
|
|
break;
|
|
|
|
case ATA_UDMA5:
|
|
|
|
ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
|
|
|
|
break;
|
|
|
|
case ATA_UDMA6:
|
|
|
|
ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
|
|
|
|
break;
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
2007-09-02 21:01:32 +02:00
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
/* Set UDMA unless device is not UDMA capable */
|
2009-12-03 20:32:13 +01:00
|
|
|
if (udma_type) {
|
|
|
|
u8 udma_etc;
|
2007-09-02 21:01:32 +02:00
|
|
|
|
2009-12-03 20:32:13 +01:00
|
|
|
pci_read_config_byte(pdev, 0x50 + offset, &udma_etc);
|
2007-09-02 21:01:32 +02:00
|
|
|
|
2009-12-03 20:32:13 +01:00
|
|
|
/* clear transfer mode bit */
|
|
|
|
udma_etc &= ~0x20;
|
|
|
|
|
|
|
|
if (t.udma) {
|
|
|
|
/* preserve 80-wire cable detection bit */
|
|
|
|
udma_etc &= 0x10;
|
|
|
|
udma_etc |= ut;
|
|
|
|
}
|
|
|
|
|
|
|
|
pci_write_config_byte(pdev, 0x50 + offset, udma_etc);
|
2007-09-02 21:01:32 +02:00
|
|
|
}
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
|
|
|
|
{
|
|
|
|
const struct via_isa_bridge *config = ap->host->private_data;
|
|
|
|
int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
|
|
|
|
|
2010-01-18 18:17:12 +01:00
|
|
|
via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
|
|
|
|
{
|
|
|
|
const struct via_isa_bridge *config = ap->host->private_data;
|
|
|
|
int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
|
|
|
|
|
2010-01-18 18:17:12 +01:00
|
|
|
via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
|
|
|
|
2009-11-30 14:22:43 +01:00
|
|
|
/**
|
|
|
|
* via_mode_filter - filter buggy device/mode pairs
|
|
|
|
* @dev: ATA device
|
|
|
|
* @mask: Mode bitmask
|
|
|
|
*
|
|
|
|
* We need to apply some minimal filtering for old controllers and at least
|
|
|
|
* one breed of Transcend SSD. Return the updated mask.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask)
|
|
|
|
{
|
|
|
|
struct ata_host *host = dev->link->ap->host;
|
|
|
|
const struct via_isa_bridge *config = host->private_data;
|
|
|
|
unsigned char model_num[ATA_ID_PROD_LEN + 1];
|
|
|
|
|
|
|
|
if (config->id == PCI_DEVICE_ID_VIA_82C586_0) {
|
|
|
|
ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
|
|
|
|
if (strcmp(model_num, "TS64GSSD25-M") == 0) {
|
|
|
|
ata_dev_printk(dev, KERN_WARNING,
|
|
|
|
"disabling UDMA mode due to reported lockups with this device.\n");
|
|
|
|
mask &= ~ ATA_MASK_UDMA;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ata_bmdma_mode_filter(dev, mask);
|
|
|
|
}
|
|
|
|
|
2008-07-30 21:32:48 +02:00
|
|
|
/**
|
2008-07-31 11:02:35 +02:00
|
|
|
* via_tf_load - send taskfile registers to host controller
|
2008-07-30 21:32:48 +02:00
|
|
|
* @ap: Port to which output is sent
|
|
|
|
* @tf: ATA taskfile register set
|
|
|
|
*
|
|
|
|
* Outputs ATA taskfile to standard ATA host controller.
|
|
|
|
*
|
|
|
|
* Note: This is to fix the internal bug of via chipsets, which
|
2008-07-31 11:02:35 +02:00
|
|
|
* will reset the device register after changing the IEN bit on
|
|
|
|
* ctl register
|
2008-07-30 21:32:48 +02:00
|
|
|
*/
|
2008-07-31 11:02:35 +02:00
|
|
|
static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
|
2008-07-30 21:32:48 +02:00
|
|
|
{
|
2009-04-17 13:21:21 +02:00
|
|
|
struct ata_ioports *ioaddr = &ap->ioaddr;
|
|
|
|
struct via_port *vp = ap->private_data;
|
|
|
|
unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
|
|
|
|
int newctl = 0;
|
|
|
|
|
|
|
|
if (tf->ctl != ap->last_ctl) {
|
|
|
|
iowrite8(tf->ctl, ioaddr->ctl_addr);
|
|
|
|
ap->last_ctl = tf->ctl;
|
|
|
|
ata_wait_idle(ap);
|
|
|
|
newctl = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tf->flags & ATA_TFLAG_DEVICE) {
|
|
|
|
iowrite8(tf->device, ioaddr->device_addr);
|
|
|
|
vp->cached_device = tf->device;
|
|
|
|
} else if (newctl)
|
|
|
|
iowrite8(vp->cached_device, ioaddr->device_addr);
|
|
|
|
|
|
|
|
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
|
|
|
|
WARN_ON_ONCE(!ioaddr->ctl_addr);
|
|
|
|
iowrite8(tf->hob_feature, ioaddr->feature_addr);
|
|
|
|
iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
|
|
|
|
iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
|
|
|
|
iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
|
|
|
|
iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
|
|
|
|
VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
|
|
|
|
tf->hob_feature,
|
|
|
|
tf->hob_nsect,
|
|
|
|
tf->hob_lbal,
|
|
|
|
tf->hob_lbam,
|
|
|
|
tf->hob_lbah);
|
|
|
|
}
|
2008-07-30 21:32:48 +02:00
|
|
|
|
2009-04-17 13:21:21 +02:00
|
|
|
if (is_addr) {
|
|
|
|
iowrite8(tf->feature, ioaddr->feature_addr);
|
|
|
|
iowrite8(tf->nsect, ioaddr->nsect_addr);
|
|
|
|
iowrite8(tf->lbal, ioaddr->lbal_addr);
|
|
|
|
iowrite8(tf->lbam, ioaddr->lbam_addr);
|
|
|
|
iowrite8(tf->lbah, ioaddr->lbah_addr);
|
|
|
|
VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
|
|
|
|
tf->feature,
|
|
|
|
tf->nsect,
|
|
|
|
tf->lbal,
|
|
|
|
tf->lbam,
|
|
|
|
tf->lbah);
|
2008-07-30 21:32:48 +02:00
|
|
|
}
|
2009-04-17 13:21:21 +02:00
|
|
|
|
|
|
|
ata_wait_idle(ap);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int via_port_start(struct ata_port *ap)
|
|
|
|
{
|
|
|
|
struct via_port *vp;
|
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
|
|
|
|
|
|
|
int ret = ata_sff_port_start(ap);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
vp = devm_kzalloc(&pdev->dev, sizeof(struct via_port), GFP_KERNEL);
|
|
|
|
if (vp == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
ap->private_data = vp;
|
|
|
|
return 0;
|
2008-07-30 21:32:48 +02:00
|
|
|
}
|
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
static struct scsi_host_template via_sht = {
|
2008-03-25 04:22:49 +01:00
|
|
|
ATA_BMDMA_SHT(DRV_NAME),
|
2006-08-30 00:12:40 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct ata_port_operations via_port_ops = {
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 04:22:49 +01:00
|
|
|
.inherits = &ata_bmdma_port_ops,
|
|
|
|
.cable_detect = via_cable_detect,
|
2006-08-30 00:12:40 +02:00
|
|
|
.set_piomode = via_set_piomode,
|
|
|
|
.set_dmamode = via_set_dmamode,
|
libata: make reset related methods proper port operations
Currently reset methods are not specified directly in the
ata_port_operations table. If a LLD wants to use custom reset
methods, it should construct and use a error_handler which uses those
reset methods. It's done this way for two reasons.
First, the ops table already contained too many methods and adding
four more of them would noticeably increase the amount of necessary
boilerplate code all over low level drivers.
Second, as ->error_handler uses those reset methods, it can get
confusing. ie. By overriding ->error_handler, those reset ops can be
made useless making layering a bit hazy.
Now that ops table uses inheritance, the first problem doesn't exist
anymore. The second isn't completely solved but is relieved by
providing default values - most drivers can just override what it has
implemented and don't have to concern itself about higher level
callbacks. In fact, there currently is no driver which actually
modifies error handling behavior. Drivers which override
->error_handler just wraps the standard error handler only to prepare
the controller for EH. I don't think making ops layering strict has
any noticeable benefit.
This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and
their PMP counterparts propoer ops. Default ops are provided in the
base ops tables and drivers are converted to override individual reset
methods instead of creating custom error_handler.
* ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs
aren't accessible. sata_promise doesn't need to use separate
error_handlers for PATA and SATA anymore.
* softreset is broken for sata_inic162x and sata_sx4. As libata now
always prefers hardreset, this doesn't really matter but the ops are
forced to NULL using ATA_OP_NULL for documentation purpose.
* pata_hpt374 needs to use different prereset for the first and second
PCI functions. This used to be done by branching from
hpt374_error_handler(). The proper way to do this is to use
separate ops and port_info tables for each function. Converted.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 04:22:50 +01:00
|
|
|
.prereset = via_pre_reset,
|
2008-07-31 11:02:35 +02:00
|
|
|
.sff_tf_load = via_tf_load,
|
2009-04-17 13:21:21 +02:00
|
|
|
.port_start = via_port_start,
|
2009-11-30 14:22:43 +01:00
|
|
|
.mode_filter = via_mode_filter,
|
2006-08-30 00:12:40 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct ata_port_operations via_port_ops_noirq = {
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 04:22:49 +01:00
|
|
|
.inherits = &via_port_ops,
|
2008-04-07 15:47:16 +02:00
|
|
|
.sff_data_xfer = ata_sff_data_xfer_noirq,
|
2006-08-30 00:12:40 +02:00
|
|
|
};
|
|
|
|
|
2006-11-27 17:19:36 +01:00
|
|
|
/**
|
|
|
|
* via_config_fifo - set up the FIFO
|
|
|
|
* @pdev: PCI device
|
|
|
|
* @flags: configuration flags
|
|
|
|
*
|
2007-10-19 23:10:43 +02:00
|
|
|
* Set the FIFO properties for this device if necessary. Used both on
|
2006-11-27 17:19:36 +01:00
|
|
|
* set up and on and the resume path
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
|
|
|
|
{
|
|
|
|
u8 enable;
|
2006-12-11 17:14:06 +01:00
|
|
|
|
2006-11-27 17:19:36 +01:00
|
|
|
/* 0x40 low bits indicate enabled channels */
|
|
|
|
pci_read_config_byte(pdev, 0x40 , &enable);
|
|
|
|
enable &= 3;
|
2006-12-11 17:14:06 +01:00
|
|
|
|
2006-11-27 17:19:36 +01:00
|
|
|
if (flags & VIA_SET_FIFO) {
|
2006-12-20 19:09:10 +01:00
|
|
|
static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
|
2006-11-27 17:19:36 +01:00
|
|
|
u8 fifo;
|
|
|
|
|
|
|
|
pci_read_config_byte(pdev, 0x43, &fifo);
|
|
|
|
|
|
|
|
/* Clear PREQ# until DDACK# for errata */
|
|
|
|
if (flags & VIA_BAD_PREQ)
|
|
|
|
fifo &= 0x7F;
|
|
|
|
else
|
|
|
|
fifo &= 0x9f;
|
|
|
|
/* Turn on FIFO for enabled channels */
|
|
|
|
fifo |= fifo_setting[enable];
|
|
|
|
pci_write_config_byte(pdev, 0x43, fifo);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
/**
|
|
|
|
* via_init_one - discovery callback
|
2006-11-27 17:19:36 +01:00
|
|
|
* @pdev: PCI device
|
2006-08-30 00:12:40 +02:00
|
|
|
* @id: PCI table info
|
|
|
|
*
|
|
|
|
* A VIA IDE interface has been discovered. Figure out what revision
|
|
|
|
* and perform configuration work before handing it to the ATA layer
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
|
{
|
|
|
|
/* Early VIA without UDMA support */
|
2007-05-04 12:43:58 +02:00
|
|
|
static const struct ata_port_info via_mwdma_info = {
|
2007-05-27 15:10:40 +02:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 21:38:24 +01:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2006-08-30 00:12:40 +02:00
|
|
|
.port_ops = &via_port_ops
|
|
|
|
};
|
|
|
|
/* Ditto with IRQ masking required */
|
2007-05-04 12:43:58 +02:00
|
|
|
static const struct ata_port_info via_mwdma_info_borked = {
|
2007-05-27 15:10:40 +02:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 21:38:24 +01:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2006-08-30 00:12:40 +02:00
|
|
|
.port_ops = &via_port_ops_noirq,
|
|
|
|
};
|
|
|
|
/* VIA UDMA 33 devices (and borked 66) */
|
2007-05-04 12:43:58 +02:00
|
|
|
static const struct ata_port_info via_udma33_info = {
|
2007-05-27 15:10:40 +02:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 21:38:24 +01:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2007-07-09 18:16:50 +02:00
|
|
|
.udma_mask = ATA_UDMA2,
|
2006-08-30 00:12:40 +02:00
|
|
|
.port_ops = &via_port_ops
|
|
|
|
};
|
|
|
|
/* VIA UDMA 66 devices */
|
2007-05-04 12:43:58 +02:00
|
|
|
static const struct ata_port_info via_udma66_info = {
|
2007-05-27 15:10:40 +02:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 21:38:24 +01:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2007-07-09 18:16:50 +02:00
|
|
|
.udma_mask = ATA_UDMA4,
|
2006-08-30 00:12:40 +02:00
|
|
|
.port_ops = &via_port_ops
|
|
|
|
};
|
|
|
|
/* VIA UDMA 100 devices */
|
2007-05-04 12:43:58 +02:00
|
|
|
static const struct ata_port_info via_udma100_info = {
|
2007-05-27 15:10:40 +02:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 21:38:24 +01:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2007-07-09 18:16:50 +02:00
|
|
|
.udma_mask = ATA_UDMA5,
|
2006-08-30 00:12:40 +02:00
|
|
|
.port_ops = &via_port_ops
|
|
|
|
};
|
|
|
|
/* UDMA133 with bad AST (All current 133) */
|
2007-05-04 12:43:58 +02:00
|
|
|
static const struct ata_port_info via_udma133_info = {
|
2007-05-27 15:10:40 +02:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2009-03-14 21:38:24 +01:00
|
|
|
.pio_mask = ATA_PIO4,
|
|
|
|
.mwdma_mask = ATA_MWDMA2,
|
2007-07-09 18:16:50 +02:00
|
|
|
.udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
|
2006-08-30 00:12:40 +02:00
|
|
|
.port_ops = &via_port_ops
|
|
|
|
};
|
2008-03-25 04:22:49 +01:00
|
|
|
const struct ata_port_info *ppi[] = { NULL, NULL };
|
2009-11-04 17:11:03 +01:00
|
|
|
struct pci_dev *isa;
|
2006-08-30 00:12:40 +02:00
|
|
|
const struct via_isa_bridge *config;
|
|
|
|
static int printed_version;
|
|
|
|
u8 enable;
|
|
|
|
u32 timing;
|
2009-01-23 08:37:39 +01:00
|
|
|
unsigned long flags = id->driver_data;
|
2008-03-25 04:22:47 +01:00
|
|
|
int rc;
|
2006-08-30 00:12:40 +02:00
|
|
|
|
|
|
|
if (!printed_version++)
|
|
|
|
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
|
|
|
|
|
2008-03-25 04:22:47 +01:00
|
|
|
rc = pcim_enable_device(pdev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
2009-01-23 08:37:39 +01:00
|
|
|
if (flags & VIA_IDFLAG_SINGLE)
|
|
|
|
ppi[1] = &ata_dummy_port_info;
|
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
/* To find out how the IDE will behave and what features we
|
|
|
|
actually have to look at the bridge not the IDE controller */
|
2009-01-23 08:37:39 +01:00
|
|
|
for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
|
|
|
|
config++)
|
2006-08-30 00:12:40 +02:00
|
|
|
if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
|
|
|
|
!!(config->flags & VIA_BAD_ID),
|
|
|
|
config->id, NULL))) {
|
2009-11-04 17:11:03 +01:00
|
|
|
u8 rev = isa->revision;
|
|
|
|
pci_dev_put(isa);
|
2006-08-30 00:12:40 +02:00
|
|
|
|
2009-11-04 17:11:03 +01:00
|
|
|
if (rev >= config->rev_min && rev <= config->rev_max)
|
2006-08-30 00:12:40 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2008-04-29 15:10:57 +02:00
|
|
|
if (!(config->flags & VIA_NO_ENABLES)) {
|
|
|
|
/* 0x40 low bits indicate enabled channels */
|
|
|
|
pci_read_config_byte(pdev, 0x40 , &enable);
|
|
|
|
enable &= 3;
|
|
|
|
if (enable == 0)
|
|
|
|
return -ENODEV;
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialise the FIFO for the enabled channels. */
|
2006-11-27 17:19:36 +01:00
|
|
|
via_config_fifo(pdev, config->flags);
|
2006-12-11 17:14:06 +01:00
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
/* Clock set up */
|
2010-01-18 18:17:12 +01:00
|
|
|
switch (config->udma_mask) {
|
|
|
|
case 0x00:
|
|
|
|
if (config->flags & VIA_NO_UNMASK)
|
|
|
|
ppi[0] = &via_mwdma_info_borked;
|
|
|
|
else
|
|
|
|
ppi[0] = &via_mwdma_info;
|
|
|
|
break;
|
|
|
|
case ATA_UDMA2:
|
|
|
|
ppi[0] = &via_udma33_info;
|
|
|
|
break;
|
|
|
|
case ATA_UDMA4:
|
|
|
|
ppi[0] = &via_udma66_info;
|
|
|
|
break;
|
|
|
|
case ATA_UDMA5:
|
|
|
|
ppi[0] = &via_udma100_info;
|
|
|
|
break;
|
|
|
|
case ATA_UDMA6:
|
|
|
|
ppi[0] = &via_udma133_info;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ON(1);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
2006-08-30 00:12:40 +02:00
|
|
|
|
|
|
|
if (config->flags & VIA_BAD_CLK66) {
|
|
|
|
/* Disable the 66MHz clock on problem devices */
|
|
|
|
pci_read_config_dword(pdev, 0x50, &timing);
|
|
|
|
timing &= ~0x80008;
|
|
|
|
pci_write_config_dword(pdev, 0x50, timing);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We have established the device type, now fire it up */
|
2010-02-23 08:26:06 +01:00
|
|
|
return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config, 0);
|
2006-08-30 00:12:40 +02:00
|
|
|
}
|
|
|
|
|
2007-03-02 09:31:26 +01:00
|
|
|
#ifdef CONFIG_PM
|
2006-11-27 17:19:36 +01:00
|
|
|
/**
|
|
|
|
* via_reinit_one - reinit after resume
|
|
|
|
* @pdev; PCI device
|
|
|
|
*
|
|
|
|
* Called when the VIA PATA device is resumed. We must then
|
|
|
|
* reconfigure the fifo and other setup we may have altered. In
|
|
|
|
* addition the kernel needs to have the resume methods on PCI
|
|
|
|
* quirk supported.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int via_reinit_one(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
u32 timing;
|
|
|
|
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
|
|
|
const struct via_isa_bridge *config = host->private_data;
|
2008-03-25 04:22:47 +01:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = ata_pci_device_do_resume(pdev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2006-12-11 17:14:06 +01:00
|
|
|
|
2006-11-27 17:19:36 +01:00
|
|
|
via_config_fifo(pdev, config->flags);
|
|
|
|
|
2010-01-18 18:17:12 +01:00
|
|
|
if (config->udma_mask == ATA_UDMA4) {
|
2006-11-27 17:19:36 +01:00
|
|
|
/* The 66 MHz devices require we enable the clock */
|
|
|
|
pci_read_config_dword(pdev, 0x50, &timing);
|
|
|
|
timing |= 0x80008;
|
|
|
|
pci_write_config_dword(pdev, 0x50, timing);
|
|
|
|
}
|
|
|
|
if (config->flags & VIA_BAD_CLK66) {
|
|
|
|
/* Disable the 66MHz clock on problem devices */
|
|
|
|
pci_read_config_dword(pdev, 0x50, &timing);
|
|
|
|
timing &= ~0x80008;
|
|
|
|
pci_write_config_dword(pdev, 0x50, timing);
|
|
|
|
}
|
2008-03-25 04:22:47 +01:00
|
|
|
|
|
|
|
ata_host_resume(host);
|
|
|
|
return 0;
|
2006-11-27 17:19:36 +01:00
|
|
|
}
|
2007-03-02 09:31:26 +01:00
|
|
|
#endif
|
2006-11-27 17:19:36 +01:00
|
|
|
|
2006-08-30 00:12:40 +02:00
|
|
|
static const struct pci_device_id via[] = {
|
2009-02-18 01:33:34 +01:00
|
|
|
{ PCI_VDEVICE(VIA, 0x0415), },
|
2007-05-25 11:02:06 +02:00
|
|
|
{ PCI_VDEVICE(VIA, 0x0571), },
|
|
|
|
{ PCI_VDEVICE(VIA, 0x0581), },
|
|
|
|
{ PCI_VDEVICE(VIA, 0x1571), },
|
|
|
|
{ PCI_VDEVICE(VIA, 0x3164), },
|
|
|
|
{ PCI_VDEVICE(VIA, 0x5324), },
|
2009-01-23 08:37:39 +01:00
|
|
|
{ PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE },
|
2006-09-29 02:21:59 +02:00
|
|
|
|
|
|
|
{ },
|
2006-08-30 00:12:40 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct pci_driver via_pci_driver = {
|
2006-09-29 02:21:59 +02:00
|
|
|
.name = DRV_NAME,
|
2006-08-30 00:12:40 +02:00
|
|
|
.id_table = via,
|
|
|
|
.probe = via_init_one,
|
2006-11-27 17:19:36 +01:00
|
|
|
.remove = ata_pci_remove_one,
|
2007-03-02 09:31:26 +01:00
|
|
|
#ifdef CONFIG_PM
|
2006-11-27 17:19:36 +01:00
|
|
|
.suspend = ata_pci_device_suspend,
|
|
|
|
.resume = via_reinit_one,
|
2007-03-02 09:31:26 +01:00
|
|
|
#endif
|
2006-08-30 00:12:40 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init via_init(void)
|
|
|
|
{
|
|
|
|
return pci_register_driver(&via_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit via_exit(void)
|
|
|
|
{
|
|
|
|
pci_unregister_driver(&via_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Alan Cox");
|
|
|
|
MODULE_DESCRIPTION("low-level driver for VIA PATA");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pci, via);
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
|
|
|
|
module_init(via_init);
|
|
|
|
module_exit(via_exit);
|