2005-04-17 00:20:36 +02:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
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2013-01-22 12:59:30 +01:00
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* Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
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2005-04-17 00:20:36 +02:00
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* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
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*/
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2006-11-16 03:56:12 +01:00
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2005-04-17 00:20:36 +02:00
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#include <linux/types.h>
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2006-11-16 03:56:12 +01:00
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#include <linux/dma-mapping.h>
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2005-04-17 00:20:36 +02:00
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#include <linux/mm.h>
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2016-08-21 21:58:14 +02:00
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#include <linux/export.h>
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2007-10-23 12:32:34 +02:00
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#include <linux/scatterlist.h>
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2007-10-29 20:35:33 +01:00
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#include <linux/string.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 09:04:11 +01:00
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#include <linux/gfp.h>
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2010-10-14 01:57:35 +02:00
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#include <linux/highmem.h>
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2014-07-16 17:51:32 +02:00
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#include <linux/dma-contiguous.h>
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2005-04-17 00:20:36 +02:00
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#include <asm/cache.h>
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2013-09-17 10:25:47 +02:00
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#include <asm/cpu-type.h>
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2005-04-17 00:20:36 +02:00
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#include <asm/io.h>
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2006-11-16 03:56:12 +01:00
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#include <dma-coherence.h>
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2016-10-05 19:18:16 +02:00
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#if defined(CONFIG_DMA_MAYBE_COHERENT) && !defined(CONFIG_DMA_PERDEV_COHERENT)
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2016-10-05 19:18:14 +02:00
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/* User defined DMA coherency from command line. */
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enum coherent_io_user_state coherentio = IO_COHERENCE_DEFAULT;
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2013-03-25 19:47:29 +01:00
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EXPORT_SYMBOL_GPL(coherentio);
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int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
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static int __init setcoherentio(char *str)
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{
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2016-10-05 19:18:14 +02:00
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coherentio = IO_COHERENCE_ENABLED;
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2013-03-25 19:47:29 +01:00
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pr_info("Hardware DMA cache coherency (command line)\n");
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return 0;
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}
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early_param("coherentio", setcoherentio);
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static int __init setnocoherentio(char *str)
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{
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2016-10-05 19:18:14 +02:00
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coherentio = IO_COHERENCE_DISABLED;
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2013-03-25 19:47:29 +01:00
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pr_info("Software DMA cache coherency (command line)\n");
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return 0;
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}
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early_param("nocoherentio", setnocoherentio);
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2013-09-27 14:41:44 +02:00
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#endif
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2013-03-25 19:47:29 +01:00
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2010-10-14 01:57:35 +02:00
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static inline struct page *dma_addr_to_page(struct device *dev,
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2009-04-24 02:25:12 +02:00
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dma_addr_t dma_addr)
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2007-03-19 17:36:42 +01:00
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{
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2010-10-14 01:57:35 +02:00
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return pfn_to_page(
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plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
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2007-03-19 17:36:42 +01:00
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}
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2005-04-17 00:20:36 +02:00
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/*
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2013-08-27 22:57:51 +02:00
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* The affected CPUs below in 'cpu_needs_post_dma_flush()' can
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* speculatively fill random cachelines with stale data at any time,
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* requiring an extra flush post-DMA.
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*
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2005-04-17 00:20:36 +02:00
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* Warning on the terminology - Linux calls an uncached area coherent;
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* MIPS terminology calls memory areas with hardware maintained coherency
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* coherent.
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2014-11-11 22:22:03 +01:00
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*
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* Note that the R14000 and R16000 should also be checked for in this
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* condition. However this function is only called on non-I/O-coherent
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* systems and only the R10000 and R12000 are used in such systems, the
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* SGI IP28 Indigo² rsp. SGI IP32 aka O2.
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2005-04-17 00:20:36 +02:00
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*/
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2013-08-27 22:57:51 +02:00
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static inline int cpu_needs_post_dma_flush(struct device *dev)
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2006-11-16 03:56:12 +01:00
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{
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return !plat_device_is_coherent(dev) &&
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2013-09-03 14:01:54 +02:00
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(boot_cpu_type() == CPU_R10000 ||
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2013-09-06 19:08:25 +02:00
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boot_cpu_type() == CPU_R12000 ||
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boot_cpu_type() == CPU_BMIPS5000);
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2006-11-16 03:56:12 +01:00
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}
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2007-11-03 03:05:43 +01:00
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static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
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{
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2010-09-02 23:22:23 +02:00
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gfp_t dma_flag;
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2007-11-03 03:05:43 +01:00
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/* ignore region specifiers */
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gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
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2010-09-02 23:22:23 +02:00
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#ifdef CONFIG_ISA
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2007-11-03 03:05:43 +01:00
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if (dev == NULL)
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2010-09-02 23:22:23 +02:00
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dma_flag = __GFP_DMA;
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2007-11-03 03:05:43 +01:00
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else
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#endif
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2010-09-02 23:22:23 +02:00
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#if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
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2015-12-21 16:21:42 +01:00
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if (dev == NULL || dev->coherent_dma_mask < DMA_BIT_MASK(32))
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2010-09-02 23:22:23 +02:00
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dma_flag = __GFP_DMA;
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else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
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dma_flag = __GFP_DMA32;
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else
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#endif
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#if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
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2015-12-21 16:21:42 +01:00
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if (dev == NULL || dev->coherent_dma_mask < DMA_BIT_MASK(64))
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2010-09-02 23:22:23 +02:00
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dma_flag = __GFP_DMA32;
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else
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#endif
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#if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
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2015-12-21 16:21:42 +01:00
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if (dev == NULL ||
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dev->coherent_dma_mask < DMA_BIT_MASK(sizeof(phys_addr_t) * 8))
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2010-09-02 23:22:23 +02:00
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dma_flag = __GFP_DMA;
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2007-11-03 03:05:43 +01:00
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else
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#endif
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2010-09-02 23:22:23 +02:00
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dma_flag = 0;
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2007-11-03 03:05:43 +01:00
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/* Don't invoke OOM killer */
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gfp |= __GFP_NORETRY;
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2010-09-02 23:22:23 +02:00
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return gfp | dma_flag;
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2007-11-03 03:05:43 +01:00
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}
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2015-09-10 00:39:42 +02:00
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static void *mips_dma_alloc_noncoherent(struct device *dev, size_t size,
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2005-10-21 09:21:23 +02:00
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dma_addr_t * dma_handle, gfp_t gfp)
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2005-04-17 00:20:36 +02:00
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{
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void *ret;
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2006-11-16 03:56:12 +01:00
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2007-11-03 03:05:43 +01:00
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gfp = massage_gfp_flags(dev, gfp);
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2005-04-17 00:20:36 +02:00
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ret = (void *) __get_free_pages(gfp, get_order(size));
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if (ret != NULL) {
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memset(ret, 0, size);
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2006-11-16 03:56:12 +01:00
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*dma_handle = plat_map_dma_mem(dev, ret, size);
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2005-04-17 00:20:36 +02:00
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}
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return ret;
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}
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2010-10-01 22:27:32 +02:00
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static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
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2016-08-03 22:46:00 +02:00
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dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
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2005-04-17 00:20:36 +02:00
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{
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void *ret;
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2014-07-16 17:51:32 +02:00
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struct page *page = NULL;
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unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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2005-04-17 00:20:36 +02:00
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2015-09-10 00:39:42 +02:00
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/*
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* XXX: seems like the coherent and non-coherent implementations could
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* be consolidated.
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*/
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2016-08-03 22:46:00 +02:00
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if (attrs & DMA_ATTR_NON_CONSISTENT)
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2015-09-10 00:39:42 +02:00
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return mips_dma_alloc_noncoherent(dev, size, dma_handle, gfp);
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2007-11-03 03:05:43 +01:00
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gfp = massage_gfp_flags(dev, gfp);
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2006-11-16 03:56:12 +01:00
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2015-12-11 22:41:09 +01:00
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if (IS_ENABLED(CONFIG_DMA_CMA) && gfpflags_allow_blocking(gfp))
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2017-02-24 23:58:44 +01:00
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page = dma_alloc_from_contiguous(dev, count, get_order(size),
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gfp);
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2014-07-16 17:51:32 +02:00
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if (!page)
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page = alloc_pages(gfp, get_order(size));
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if (!page)
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return NULL;
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ret = page_address(page);
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memset(ret, 0, size);
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*dma_handle = plat_map_dma_mem(dev, ret, size);
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if (!plat_device_is_coherent(dev)) {
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dma_cache_wback_inv((unsigned long) ret, size);
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2016-10-05 19:18:15 +02:00
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ret = UNCAC_ADDR(ret);
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2005-04-17 00:20:36 +02:00
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}
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return ret;
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}
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2015-09-10 00:39:42 +02:00
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static void mips_dma_free_noncoherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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2005-04-17 00:20:36 +02:00
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{
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2009-04-24 02:03:43 +02:00
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plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
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2005-04-17 00:20:36 +02:00
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free_pages((unsigned long) vaddr, get_order(size));
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}
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2010-10-01 22:27:32 +02:00
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static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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2016-08-03 22:46:00 +02:00
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dma_addr_t dma_handle, unsigned long attrs)
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2005-04-17 00:20:36 +02:00
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{
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unsigned long addr = (unsigned long) vaddr;
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2014-07-16 17:51:32 +02:00
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unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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struct page *page = NULL;
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2009-06-03 17:16:04 +02:00
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2016-08-03 22:46:00 +02:00
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if (attrs & DMA_ATTR_NON_CONSISTENT) {
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2015-09-10 00:39:42 +02:00
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mips_dma_free_noncoherent(dev, size, vaddr, dma_handle);
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return;
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}
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2009-04-24 02:03:43 +02:00
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plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
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2008-12-11 03:14:45 +01:00
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2016-10-05 19:18:15 +02:00
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if (!plat_device_is_coherent(dev))
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2006-11-16 03:56:12 +01:00
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addr = CAC_ADDR(addr);
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2014-07-16 17:51:32 +02:00
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page = virt_to_page((void *) addr);
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if (!dma_release_from_contiguous(dev, page, count))
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__free_pages(page, get_order(size));
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2005-04-17 00:20:36 +02:00
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}
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2015-07-30 13:03:42 +02:00
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static int mips_dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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2016-08-03 22:46:00 +02:00
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unsigned long attrs)
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2015-07-30 13:03:42 +02:00
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{
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unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
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unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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unsigned long addr = (unsigned long)cpu_addr;
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unsigned long off = vma->vm_pgoff;
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unsigned long pfn;
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int ret = -ENXIO;
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2016-10-05 19:18:15 +02:00
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if (!plat_device_is_coherent(dev))
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2015-07-30 13:03:42 +02:00
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addr = CAC_ADDR(addr);
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pfn = page_to_pfn(virt_to_page((void *)addr));
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2016-08-03 22:46:00 +02:00
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if (attrs & DMA_ATTR_WRITE_COMBINE)
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2015-07-30 13:03:42 +02:00
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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else
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
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return ret;
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if (off < count && user_count <= (count - off)) {
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ret = remap_pfn_range(vma, vma->vm_start,
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pfn + off,
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user_count << PAGE_SHIFT,
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vma->vm_page_prot);
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}
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return ret;
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}
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2010-10-14 01:57:35 +02:00
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static inline void __dma_sync_virtual(void *addr, size_t size,
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2005-04-17 00:20:36 +02:00
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_TO_DEVICE:
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2010-10-14 01:57:35 +02:00
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dma_cache_wback((unsigned long)addr, size);
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2005-04-17 00:20:36 +02:00
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break;
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case DMA_FROM_DEVICE:
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2010-10-14 01:57:35 +02:00
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dma_cache_inv((unsigned long)addr, size);
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2005-04-17 00:20:36 +02:00
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break;
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case DMA_BIDIRECTIONAL:
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2010-10-14 01:57:35 +02:00
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dma_cache_wback_inv((unsigned long)addr, size);
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2005-04-17 00:20:36 +02:00
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break;
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default:
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BUG();
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}
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}
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2010-10-14 01:57:35 +02:00
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/*
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* A single sg entry may refer to multiple physically contiguous
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* pages. But we still need to process highmem pages individually.
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* If highmem is not configured then the bulk of this loop gets
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* optimized out.
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*/
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static inline void __dma_sync(struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction direction)
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{
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size_t left = size;
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do {
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size_t len = left;
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if (PageHighMem(page)) {
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void *addr;
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if (offset + len > PAGE_SIZE) {
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if (offset >= PAGE_SIZE) {
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page += offset >> PAGE_SHIFT;
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offset &= ~PAGE_MASK;
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}
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len = PAGE_SIZE - offset;
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}
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addr = kmap_atomic(page);
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__dma_sync_virtual(addr + offset, len, direction);
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kunmap_atomic(addr);
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} else
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__dma_sync_virtual(page_address(page) + offset,
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size, direction);
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offset = 0;
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page++;
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left -= len;
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} while (left);
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}
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|
2010-10-01 22:27:32 +02:00
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static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
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2016-08-03 22:46:00 +02:00
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size_t size, enum dma_data_direction direction, unsigned long attrs)
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2005-04-17 00:20:36 +02:00
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{
|
2016-12-15 00:04:58 +01:00
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if (cpu_needs_post_dma_flush(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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2010-10-14 01:57:35 +02:00
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__dma_sync(dma_addr_to_page(dev, dma_addr),
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dma_addr & ~PAGE_MASK, size, direction);
|
2015-03-27 15:10:30 +01:00
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plat_post_dma_flush(dev);
|
2009-04-24 02:03:43 +02:00
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plat_unmap_dma_mem(dev, dma_addr, size, direction);
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2005-04-17 00:20:36 +02:00
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}
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|
2015-05-01 15:56:38 +02:00
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static int mips_dma_map_sg(struct device *dev, struct scatterlist *sglist,
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2016-08-03 22:46:00 +02:00
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int nents, enum dma_data_direction direction, unsigned long attrs)
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2005-04-17 00:20:36 +02:00
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{
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int i;
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2015-05-01 15:56:38 +02:00
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struct scatterlist *sg;
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2005-04-17 00:20:36 +02:00
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|
2015-05-01 15:56:38 +02:00
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for_each_sg(sglist, sg, nents, i) {
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2016-12-15 00:04:58 +01:00
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if (!plat_device_is_coherent(dev) &&
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!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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2010-10-14 01:57:35 +02:00
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__dma_sync(sg_page(sg), sg->offset, sg->length,
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direction);
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2013-06-10 08:28:08 +02:00
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#ifdef CONFIG_NEED_SG_DMA_LENGTH
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sg->dma_length = sg->length;
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#endif
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2010-10-14 01:57:35 +02:00
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sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
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sg->offset;
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2005-04-17 00:20:36 +02:00
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}
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return nents;
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}
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2010-10-01 22:27:32 +02:00
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static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction direction,
|
2016-08-03 22:46:00 +02:00
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unsigned long attrs)
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2005-04-17 00:20:36 +02:00
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{
|
2016-12-15 00:04:58 +01:00
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if (!plat_device_is_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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2010-10-14 01:57:35 +02:00
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__dma_sync(page, offset, size, direction);
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2005-04-17 00:20:36 +02:00
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2010-10-14 01:57:35 +02:00
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return plat_map_dma_mem_page(dev, page) + offset;
|
2005-04-17 00:20:36 +02:00
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}
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|
2015-05-01 15:56:38 +02:00
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static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
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2010-10-01 22:27:32 +02:00
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int nhwentries, enum dma_data_direction direction,
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2016-08-03 22:46:00 +02:00
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unsigned long attrs)
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2005-04-17 00:20:36 +02:00
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{
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int i;
|
2015-05-01 15:56:38 +02:00
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struct scatterlist *sg;
|
2005-04-17 00:20:36 +02:00
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|
2015-05-01 15:56:38 +02:00
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for_each_sg(sglist, sg, nhwentries, i) {
|
2006-11-16 03:56:12 +01:00
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if (!plat_device_is_coherent(dev) &&
|
2016-12-15 00:04:58 +01:00
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!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
|
2010-10-14 01:57:35 +02:00
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direction != DMA_TO_DEVICE)
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__dma_sync(sg_page(sg), sg->offset, sg->length,
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direction);
|
2009-04-24 02:03:43 +02:00
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plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
|
2005-04-17 00:20:36 +02:00
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}
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}
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|
2010-10-01 22:27:32 +02:00
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static void mips_dma_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
|
2005-04-17 00:20:36 +02:00
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{
|
2013-08-27 22:57:51 +02:00
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if (cpu_needs_post_dma_flush(dev))
|
2010-10-14 01:57:35 +02:00
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__dma_sync(dma_addr_to_page(dev, dma_handle),
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dma_handle & ~PAGE_MASK, size, direction);
|
2015-03-27 15:10:30 +01:00
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plat_post_dma_flush(dev);
|
2005-04-17 00:20:36 +02:00
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}
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|
2010-10-01 22:27:32 +02:00
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static void mips_dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
|
2005-04-17 00:20:36 +02:00
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{
|
2010-10-14 01:57:35 +02:00
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if (!plat_device_is_coherent(dev))
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__dma_sync(dma_addr_to_page(dev, dma_handle),
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dma_handle & ~PAGE_MASK, size, direction);
|
2005-04-17 00:20:36 +02:00
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}
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|
2010-10-01 22:27:32 +02:00
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static void mips_dma_sync_sg_for_cpu(struct device *dev,
|
2015-05-01 15:56:38 +02:00
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struct scatterlist *sglist, int nelems,
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enum dma_data_direction direction)
|
2005-04-17 00:20:36 +02:00
|
|
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{
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|
|
int i;
|
2015-05-01 15:56:38 +02:00
|
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|
struct scatterlist *sg;
|
2005-09-04 00:56:17 +02:00
|
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|
2015-05-01 15:56:38 +02:00
|
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if (cpu_needs_post_dma_flush(dev)) {
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for_each_sg(sglist, sg, nelems, i) {
|
2010-10-14 01:57:35 +02:00
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__dma_sync(sg_page(sg), sg->offset, sg->length,
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direction);
|
2015-05-01 15:56:38 +02:00
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}
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}
|
2015-03-27 15:10:30 +01:00
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|
plat_post_dma_flush(dev);
|
2005-04-17 00:20:36 +02:00
|
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}
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|
2010-10-01 22:27:32 +02:00
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static void mips_dma_sync_sg_for_device(struct device *dev,
|
2015-05-01 15:56:38 +02:00
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struct scatterlist *sglist, int nelems,
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enum dma_data_direction direction)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
|
|
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int i;
|
2015-05-01 15:56:38 +02:00
|
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struct scatterlist *sg;
|
2005-04-17 00:20:36 +02:00
|
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|
|
2015-05-01 15:56:38 +02:00
|
|
|
if (!plat_device_is_coherent(dev)) {
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for_each_sg(sglist, sg, nelems, i) {
|
2010-10-14 01:57:35 +02:00
|
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__dma_sync(sg_page(sg), sg->offset, sg->length,
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direction);
|
2015-05-01 15:56:38 +02:00
|
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}
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}
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
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|
|
2010-10-01 22:27:32 +02:00
|
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int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
2005-04-17 00:20:36 +02:00
|
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{
|
2013-08-15 11:28:30 +02:00
|
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return 0;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
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|
|
2010-10-01 22:27:32 +02:00
|
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int mips_dma_supported(struct device *dev, u64 mask)
|
2005-04-17 00:20:36 +02:00
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{
|
2008-12-12 00:33:36 +01:00
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return plat_dma_supported(dev, mask);
|
2005-04-17 00:20:36 +02:00
|
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}
|
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|
|
2010-12-09 20:14:09 +01:00
|
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|
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
2010-10-01 22:27:32 +02:00
|
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enum dma_data_direction direction)
|
2005-04-17 00:20:36 +02:00
|
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{
|
2006-11-16 03:56:12 +01:00
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BUG_ON(direction == DMA_NONE);
|
2005-04-17 00:20:36 +02:00
|
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|
2006-11-16 03:56:12 +01:00
|
|
|
if (!plat_device_is_coherent(dev))
|
2010-10-14 01:57:35 +02:00
|
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__dma_sync_virtual(vaddr, size, direction);
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
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|
|
2010-12-09 20:14:09 +01:00
|
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|
EXPORT_SYMBOL(dma_cache_sync);
|
|
|
|
|
2017-01-20 22:04:01 +01:00
|
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|
static const struct dma_map_ops mips_default_dma_map_ops = {
|
2012-03-27 14:32:21 +02:00
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|
.alloc = mips_dma_alloc_coherent,
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|
|
.free = mips_dma_free_coherent,
|
2015-07-30 13:03:42 +02:00
|
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|
.mmap = mips_dma_mmap,
|
2010-10-01 22:27:32 +02:00
|
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|
.map_page = mips_dma_map_page,
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.unmap_page = mips_dma_unmap_page,
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.map_sg = mips_dma_map_sg,
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.unmap_sg = mips_dma_unmap_sg,
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.sync_single_for_cpu = mips_dma_sync_single_for_cpu,
|
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.sync_single_for_device = mips_dma_sync_single_for_device,
|
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|
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.sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
|
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|
|
.sync_sg_for_device = mips_dma_sync_sg_for_device,
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.mapping_error = mips_dma_mapping_error,
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.dma_supported = mips_dma_supported
|
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|
|
};
|
|
|
|
|
2017-01-20 22:04:01 +01:00
|
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|
const struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
|
2010-10-01 22:27:32 +02:00
|
|
|
EXPORT_SYMBOL(mips_dma_map_ops);
|
|
|
|
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|
|
#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
|
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|
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static int __init mips_dma_init(void)
|
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|
|
{
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|
|
dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
|
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|
|
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|
return 0;
|
|
|
|
}
|
|
|
|
fs_initcall(mips_dma_init);
|