2011-07-10 03:14:06 +02:00
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/*
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* omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
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*
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* Copyright (C) 2009-2011 Nokia Corporation
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* XXX handle crossbar/shared link difference for L3?
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* XXX these should be marked initdata for multi-OMAP kernels
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*/
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#include <asm/sizes.h>
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#include <plat/omap_hwmod.h>
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#include <plat/serial.h>
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#include "omap_hwmod_common_data.h"
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struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
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{
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.pa_start = 0x4809c000,
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.pa_end = 0x4809c1ff,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
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{
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.pa_start = 0x480b4000,
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.pa_end = 0x480b41ff,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
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{
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.pa_start = 0x48070000,
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.pa_end = 0x48070000 + SZ_128 - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
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{
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.pa_start = 0x48072000,
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.pa_end = 0x48072000 + SZ_128 - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_dss_addrs[] = {
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{
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.pa_start = 0x48050000,
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.pa_end = 0x48050000 + SZ_1K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
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{
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.pa_start = 0x48050400,
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.pa_end = 0x48050400 + SZ_1K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
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{
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.pa_start = 0x48050800,
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.pa_end = 0x48050800 + SZ_1K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
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{
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.pa_start = 0x48050C00,
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.pa_end = 0x48050C00 + SZ_1K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
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{
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.pa_start = 0x48086000,
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.pa_end = 0x48086000 + SZ_1K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
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{
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.pa_start = 0x48088000,
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.pa_end = 0x48088000 + SZ_1K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
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{
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.pa_start = 0x4808a000,
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.pa_end = 0x4808a000 + SZ_1K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
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{
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.pa_start = 0x48098000,
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.pa_end = 0x48098000 + SZ_256 - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
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{
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.pa_start = 0x4809a000,
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.pa_end = 0x4809a000 + SZ_256 - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
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{
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.pa_start = 0x480b8000,
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.pa_end = 0x480b8000 + SZ_256 - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
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{
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.pa_start = 0x48056000,
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.pa_end = 0x48056000 + SZ_4K - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
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{
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.pa_start = 0x48094000,
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.pa_end = 0x48094000 + SZ_512 - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
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{
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.name = "mpu",
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.pa_start = 0x48074000,
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.pa_end = 0x480740ff,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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2012-05-08 19:34:27 +02:00
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struct omap_hwmod_addr_space omap2_hdq1w_addr_space[] = {
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{
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.pa_start = 0x480b2000,
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.pa_end = 0x480b2fff,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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