2005-11-10 15:26:51 +01:00
|
|
|
/*
|
2011-03-30 00:54:50 +02:00
|
|
|
* linux/arch/arm/mach-omap2/timer.c
|
2005-11-10 15:26:51 +01:00
|
|
|
*
|
|
|
|
* OMAP2 GP timer support.
|
|
|
|
*
|
OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files
Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12. Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management. GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management. GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator. But on HS devices, it
may not be available for Linux use.
It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12.
This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.
Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.
Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
2009-04-24 05:11:10 +02:00
|
|
|
* Copyright (C) 2009 Nokia Corporation
|
|
|
|
*
|
2007-11-13 08:24:02 +01:00
|
|
|
* Update to use new clocksource/clockevent layers
|
|
|
|
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
|
|
|
* Copyright (C) 2007 MontaVista Software, Inc.
|
|
|
|
*
|
|
|
|
* Original driver:
|
2005-11-10 15:26:51 +01:00
|
|
|
* Copyright (C) 2005 Nokia Corporation
|
|
|
|
* Author: Paul Mundt <paul.mundt@nokia.com>
|
2007-10-19 23:21:04 +02:00
|
|
|
* Juha Yrjölä <juha.yrjola@nokia.com>
|
2006-06-27 01:16:12 +02:00
|
|
|
* OMAP Dual-mode timer framework support by Timo Teras
|
2005-11-10 15:26:51 +01:00
|
|
|
*
|
|
|
|
* Some parts based off of TI's 24xx code:
|
|
|
|
*
|
2009-05-28 23:16:04 +02:00
|
|
|
* Copyright (C) 2004-2009 Texas Instruments, Inc.
|
2005-11-10 15:26:51 +01:00
|
|
|
*
|
|
|
|
* Roughly modelled after the OMAP1 MPU timer code.
|
2009-05-28 23:16:04 +02:00
|
|
|
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
2005-11-10 15:26:51 +01:00
|
|
|
*
|
|
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
|
|
* for more details.
|
|
|
|
*/
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/time.h>
|
|
|
|
#include <linux/interrupt.h>
|
|
|
|
#include <linux/err.h>
|
2006-01-07 17:15:52 +01:00
|
|
|
#include <linux/clk.h>
|
2006-06-27 01:16:12 +02:00
|
|
|
#include <linux/delay.h>
|
2006-12-07 02:14:00 +01:00
|
|
|
#include <linux/irq.h>
|
2007-11-13 08:24:02 +01:00
|
|
|
#include <linux/clocksource.h>
|
|
|
|
#include <linux/clockchips.h>
|
2011-09-20 13:30:18 +02:00
|
|
|
#include <linux/slab.h>
|
2012-07-04 15:02:32 +02:00
|
|
|
#include <linux/of.h>
|
2006-01-07 17:15:52 +01:00
|
|
|
|
2005-11-10 15:26:51 +01:00
|
|
|
#include <asm/mach/time.h>
|
2012-01-10 20:44:19 +01:00
|
|
|
#include <asm/smp_twd.h>
|
2011-02-23 03:59:49 +01:00
|
|
|
#include <asm/sched_clock.h>
|
2012-08-28 02:43:01 +02:00
|
|
|
|
2012-08-13 11:09:03 +02:00
|
|
|
#include <asm/arch_timer.h>
|
2011-02-23 08:14:08 +01:00
|
|
|
#include <plat/omap_hwmod.h>
|
2011-09-20 13:30:18 +02:00
|
|
|
#include <plat/omap_device.h>
|
2012-08-28 02:43:01 +02:00
|
|
|
#include <plat/dmtimer.h>
|
2011-09-20 13:30:24 +02:00
|
|
|
#include <plat/omap-pm.h>
|
|
|
|
|
2012-08-31 19:59:07 +02:00
|
|
|
#include "soc.h"
|
2012-08-28 02:43:01 +02:00
|
|
|
#include "common.h"
|
2011-09-20 13:30:24 +02:00
|
|
|
#include "powerdomain.h"
|
2005-11-10 15:26:51 +01:00
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
/* Parent clocks, eventually these will come from the clock framework */
|
|
|
|
|
|
|
|
#define OMAP2_MPU_SOURCE "sys_ck"
|
|
|
|
#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
|
|
|
|
#define OMAP4_MPU_SOURCE "sys_clkin_ck"
|
|
|
|
#define OMAP2_32K_SOURCE "func_32k_ck"
|
|
|
|
#define OMAP3_32K_SOURCE "omap_32k_fck"
|
|
|
|
#define OMAP4_32K_SOURCE "sys_32k_ck"
|
|
|
|
|
|
|
|
#ifdef CONFIG_OMAP_32K_TIMER
|
|
|
|
#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE
|
|
|
|
#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE
|
|
|
|
#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE
|
|
|
|
#define OMAP3_SECURE_TIMER 12
|
|
|
|
#else
|
|
|
|
#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE
|
|
|
|
#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE
|
|
|
|
#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE
|
|
|
|
#define OMAP3_SECURE_TIMER 1
|
|
|
|
#endif
|
2011-01-16 05:32:01 +01:00
|
|
|
|
2012-08-13 10:54:24 +02:00
|
|
|
#define REALTIME_COUNTER_BASE 0x48243200
|
|
|
|
#define INCREMENTER_NUMERATOR_OFFSET 0x10
|
|
|
|
#define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14
|
|
|
|
#define NUMERATOR_DENUMERATOR_MASK 0xfffff000
|
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
/* Clockevent code */
|
|
|
|
|
|
|
|
static struct omap_dm_timer clkev;
|
2007-11-13 08:24:02 +01:00
|
|
|
static struct clock_event_device clockevent_gpt;
|
2005-11-10 15:26:51 +01:00
|
|
|
|
2006-10-06 19:53:39 +02:00
|
|
|
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
2005-11-10 15:26:51 +01:00
|
|
|
{
|
2007-11-13 08:24:02 +01:00
|
|
|
struct clock_event_device *evt = &clockevent_gpt;
|
|
|
|
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
|
2005-11-10 15:26:51 +01:00
|
|
|
|
2007-11-13 08:24:02 +01:00
|
|
|
evt->event_handler(evt);
|
2005-11-10 15:26:51 +01:00
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct irqaction omap2_gp_timer_irq = {
|
2012-05-09 19:07:05 +02:00
|
|
|
.name = "gp_timer",
|
2007-05-08 09:35:39 +02:00
|
|
|
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
2005-11-10 15:26:51 +01:00
|
|
|
.handler = omap2_gp_timer_interrupt,
|
|
|
|
};
|
|
|
|
|
2007-11-13 08:24:02 +01:00
|
|
|
static int omap2_gp_timer_set_next_event(unsigned long cycles,
|
|
|
|
struct clock_event_device *evt)
|
2005-11-10 15:26:51 +01:00
|
|
|
{
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
|
2011-03-30 00:54:48 +02:00
|
|
|
0xffffffff - cycles, 1);
|
2007-11-13 08:24:02 +01:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
|
|
|
|
struct clock_event_device *evt)
|
|
|
|
{
|
|
|
|
u32 period;
|
|
|
|
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_stop(&clkev, 1, clkev.rate);
|
2007-11-13 08:24:02 +01:00
|
|
|
|
|
|
|
switch (mode) {
|
|
|
|
case CLOCK_EVT_MODE_PERIODIC:
|
2011-03-30 00:54:48 +02:00
|
|
|
period = clkev.rate / HZ;
|
2007-11-13 08:24:02 +01:00
|
|
|
period -= 1;
|
2011-03-30 00:54:48 +02:00
|
|
|
/* Looks like we need to first set the load value separately */
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
|
2011-03-30 00:54:48 +02:00
|
|
|
0xffffffff - period, 1);
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_load_start(&clkev,
|
2011-03-30 00:54:48 +02:00
|
|
|
OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
|
|
|
|
0xffffffff - period, 1);
|
2007-11-13 08:24:02 +01:00
|
|
|
break;
|
|
|
|
case CLOCK_EVT_MODE_ONESHOT:
|
|
|
|
break;
|
|
|
|
case CLOCK_EVT_MODE_UNUSED:
|
|
|
|
case CLOCK_EVT_MODE_SHUTDOWN:
|
|
|
|
case CLOCK_EVT_MODE_RESUME:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct clock_event_device clockevent_gpt = {
|
2012-05-09 19:07:05 +02:00
|
|
|
.name = "gp_timer",
|
2007-11-13 08:24:02 +01:00
|
|
|
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
|
|
|
.shift = 32,
|
2012-03-17 10:30:16 +01:00
|
|
|
.rating = 300,
|
2007-11-13 08:24:02 +01:00
|
|
|
.set_next_event = omap2_gp_timer_set_next_event,
|
|
|
|
.set_mode = omap2_gp_timer_set_mode,
|
|
|
|
};
|
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
|
|
|
int gptimer_id,
|
|
|
|
const char *fck_source)
|
2007-11-13 08:24:02 +01:00
|
|
|
{
|
2011-03-30 00:54:48 +02:00
|
|
|
char name[10]; /* 10 = sizeof("gptXX_Xck0") */
|
|
|
|
struct omap_hwmod *oh;
|
2012-04-19 12:01:50 +02:00
|
|
|
struct resource irq_rsrc, mem_rsrc;
|
2011-03-30 00:54:48 +02:00
|
|
|
size_t size;
|
|
|
|
int res = 0;
|
2012-04-19 12:01:50 +02:00
|
|
|
int r;
|
2011-03-30 00:54:48 +02:00
|
|
|
|
|
|
|
sprintf(name, "timer%d", gptimer_id);
|
|
|
|
omap_hwmod_setup_one(name);
|
|
|
|
oh = omap_hwmod_lookup(name);
|
|
|
|
if (!oh)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2012-04-19 12:01:50 +02:00
|
|
|
r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq_rsrc);
|
|
|
|
if (r)
|
|
|
|
return -ENXIO;
|
|
|
|
timer->irq = irq_rsrc.start;
|
|
|
|
|
|
|
|
r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &mem_rsrc);
|
|
|
|
if (r)
|
|
|
|
return -ENXIO;
|
|
|
|
timer->phys_base = mem_rsrc.start;
|
|
|
|
size = mem_rsrc.end - mem_rsrc.start;
|
2011-03-30 00:54:48 +02:00
|
|
|
|
|
|
|
/* Static mapping, never released */
|
|
|
|
timer->io_base = ioremap(timer->phys_base, size);
|
|
|
|
if (!timer->io_base)
|
|
|
|
return -ENXIO;
|
|
|
|
|
|
|
|
/* After the dmtimer is using hwmod these clocks won't be needed */
|
2012-07-05 14:40:59 +02:00
|
|
|
timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
|
2011-03-30 00:54:48 +02:00
|
|
|
if (IS_ERR(timer->fclk))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
omap_hwmod_enable(oh);
|
|
|
|
|
2012-06-05 19:34:51 +02:00
|
|
|
if (omap_dm_timer_reserve_systimer(gptimer_id))
|
|
|
|
return -ENODEV;
|
2011-03-30 00:54:49 +02:00
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
if (gptimer_id != 12) {
|
|
|
|
struct clk *src;
|
|
|
|
|
|
|
|
src = clk_get(NULL, fck_source);
|
|
|
|
if (IS_ERR(src)) {
|
|
|
|
res = -EINVAL;
|
|
|
|
} else {
|
|
|
|
res = __omap_dm_timer_set_source(timer->fclk, src);
|
|
|
|
if (IS_ERR_VALUE(res))
|
|
|
|
pr_warning("%s: timer%i cannot set source\n",
|
|
|
|
__func__, gptimer_id);
|
|
|
|
clk_put(src);
|
|
|
|
}
|
|
|
|
}
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_init_regs(timer);
|
|
|
|
__omap_dm_timer_reset(timer, 1, 1);
|
2011-03-30 00:54:48 +02:00
|
|
|
timer->posted = 1;
|
|
|
|
|
|
|
|
timer->rate = clk_get_rate(timer->fclk);
|
2005-11-10 15:26:51 +01:00
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
timer->reserved = 1;
|
2011-02-23 08:14:08 +01:00
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
return res;
|
|
|
|
}
|
OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files
Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12. Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management. GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management. GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator. But on HS devices, it
may not be available for Linux use.
It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12.
This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.
Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.
Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
2009-04-24 05:11:10 +02:00
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
static void __init omap2_gp_clockevent_init(int gptimer_id,
|
|
|
|
const char *fck_source)
|
|
|
|
{
|
|
|
|
int res;
|
OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files
Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12. Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management. GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management. GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator. But on HS devices, it
may not be available for Linux use.
It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12.
This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.
Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.
Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
2009-04-24 05:11:10 +02:00
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
|
|
|
|
BUG_ON(res);
|
OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files
Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12. Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management. GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management. GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator. But on HS devices, it
may not be available for Linux use.
It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12.
This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.
Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.
Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
2009-04-24 05:11:10 +02:00
|
|
|
|
2012-08-03 17:21:10 +02:00
|
|
|
omap2_gp_timer_irq.dev_id = &clkev;
|
2011-03-30 00:54:48 +02:00
|
|
|
setup_irq(clkev.irq, &omap2_gp_timer_irq);
|
2007-11-13 08:24:02 +01:00
|
|
|
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
|
2011-03-30 00:54:48 +02:00
|
|
|
|
|
|
|
clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
|
2007-11-13 08:24:02 +01:00
|
|
|
clockevent_gpt.shift);
|
|
|
|
clockevent_gpt.max_delta_ns =
|
|
|
|
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
|
|
|
|
clockevent_gpt.min_delta_ns =
|
2009-01-29 17:57:17 +01:00
|
|
|
clockevent_delta2ns(3, &clockevent_gpt);
|
|
|
|
/* Timer internal resynch latency. */
|
2007-11-13 08:24:02 +01:00
|
|
|
|
2012-03-17 10:30:16 +01:00
|
|
|
clockevent_gpt.cpumask = cpu_possible_mask;
|
|
|
|
clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
|
2007-11-13 08:24:02 +01:00
|
|
|
clockevents_register_device(&clockevent_gpt);
|
2011-03-30 00:54:48 +02:00
|
|
|
|
|
|
|
pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
|
|
|
|
gptimer_id, clkev.rate);
|
2007-11-13 08:24:02 +01:00
|
|
|
}
|
|
|
|
|
OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files
Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12. Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management. GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management. GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator. But on HS devices, it
may not be available for Linux use.
It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12.
This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.
Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.
Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
2009-04-24 05:11:10 +02:00
|
|
|
/* Clocksource code */
|
2011-03-30 00:54:49 +02:00
|
|
|
static struct omap_dm_timer clksrc;
|
ARM: OMAP: Make OMAP clocksource source selection using kernel param
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-09 19:07:05 +02:00
|
|
|
static bool use_gptimer_clksrc;
|
2011-03-30 00:54:49 +02:00
|
|
|
|
2007-11-13 08:24:02 +01:00
|
|
|
/*
|
|
|
|
* clocksource
|
|
|
|
*/
|
2009-04-21 21:24:00 +02:00
|
|
|
static cycle_t clocksource_read_cycles(struct clocksource *cs)
|
2007-11-13 08:24:02 +01:00
|
|
|
{
|
2011-09-17 00:44:20 +02:00
|
|
|
return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
|
2007-11-13 08:24:02 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct clocksource clocksource_gpt = {
|
2012-05-09 19:07:05 +02:00
|
|
|
.name = "gp_timer",
|
2007-11-13 08:24:02 +01:00
|
|
|
.rating = 300,
|
|
|
|
.read = clocksource_read_cycles,
|
|
|
|
.mask = CLOCKSOURCE_MASK(32),
|
|
|
|
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
|
|
|
};
|
|
|
|
|
2011-12-15 12:19:23 +01:00
|
|
|
static u32 notrace dmtimer_read_sched_clock(void)
|
2011-02-23 03:59:49 +01:00
|
|
|
{
|
2011-03-30 00:54:49 +02:00
|
|
|
if (clksrc.reserved)
|
2012-01-23 07:48:14 +01:00
|
|
|
return __omap_dm_timer_read_counter(&clksrc, 1);
|
2007-11-13 08:24:02 +01:00
|
|
|
|
2011-12-15 12:19:23 +01:00
|
|
|
return 0;
|
2011-03-30 00:54:49 +02:00
|
|
|
}
|
|
|
|
|
2012-08-28 00:26:14 +02:00
|
|
|
#ifdef CONFIG_OMAP_32K_TIMER
|
2011-03-30 00:54:49 +02:00
|
|
|
/* Setup free-running counter for clocksource */
|
ARM: OMAP: Make OMAP clocksource source selection using kernel param
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-09 19:07:05 +02:00
|
|
|
static int __init omap2_sync32k_clocksource_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct omap_hwmod *oh;
|
|
|
|
void __iomem *vbase;
|
|
|
|
const char *oh_name = "counter_32k";
|
|
|
|
|
|
|
|
/*
|
|
|
|
* First check hwmod data is available for sync32k counter
|
|
|
|
*/
|
|
|
|
oh = omap_hwmod_lookup(oh_name);
|
|
|
|
if (!oh || oh->slaves_cnt == 0)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
omap_hwmod_setup_one(oh_name);
|
|
|
|
|
|
|
|
vbase = omap_hwmod_get_mpu_rt_va(oh);
|
|
|
|
if (!vbase) {
|
|
|
|
pr_warn("%s: failed to get counter_32k resource\n", __func__);
|
|
|
|
return -ENXIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = omap_hwmod_enable(oh);
|
|
|
|
if (ret) {
|
|
|
|
pr_warn("%s: failed to enable counter_32k module (%d)\n",
|
|
|
|
__func__, ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = omap_init_clocksource_32k(vbase);
|
|
|
|
if (ret) {
|
|
|
|
pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
|
|
|
|
__func__, ret);
|
|
|
|
omap_hwmod_idle(oh);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2012-08-28 00:26:14 +02:00
|
|
|
#else
|
|
|
|
static inline int omap2_sync32k_clocksource_init(void)
|
|
|
|
{
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
#endif
|
ARM: OMAP: Make OMAP clocksource source selection using kernel param
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-09 19:07:05 +02:00
|
|
|
|
|
|
|
static void __init omap2_gptimer_clocksource_init(int gptimer_id,
|
2011-03-30 00:54:49 +02:00
|
|
|
const char *fck_source)
|
|
|
|
{
|
|
|
|
int res;
|
|
|
|
|
|
|
|
res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
|
|
|
|
BUG_ON(res);
|
2007-11-13 08:24:02 +01:00
|
|
|
|
2011-09-17 00:44:20 +02:00
|
|
|
__omap_dm_timer_load_start(&clksrc,
|
2011-08-10 15:19:35 +02:00
|
|
|
OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
|
2011-12-15 12:19:23 +01:00
|
|
|
setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
|
2011-02-23 03:59:49 +01:00
|
|
|
|
2011-03-30 00:54:49 +02:00
|
|
|
if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
|
|
|
|
pr_err("Could not register clocksource %s\n",
|
|
|
|
clocksource_gpt.name);
|
ARM: OMAP: Make OMAP clocksource source selection using kernel param
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-09 19:07:05 +02:00
|
|
|
else
|
|
|
|
pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
|
|
|
|
gptimer_id, clksrc.rate);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __init omap2_clocksource_init(int gptimer_id,
|
|
|
|
const char *fck_source)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* First give preference to kernel parameter configuration
|
|
|
|
* by user (clocksource="gp_timer").
|
|
|
|
*
|
|
|
|
* In case of missing kernel parameter for clocksource,
|
|
|
|
* first check for availability for 32k-sync timer, in case
|
|
|
|
* of failure in finding 32k_counter module or registering
|
|
|
|
* it as clocksource, execution will fallback to gp-timer.
|
|
|
|
*/
|
|
|
|
if (use_gptimer_clksrc == true)
|
|
|
|
omap2_gptimer_clocksource_init(gptimer_id, fck_source);
|
|
|
|
else if (omap2_sync32k_clocksource_init())
|
|
|
|
/* Fall back to gp-timer code */
|
|
|
|
omap2_gptimer_clocksource_init(gptimer_id, fck_source);
|
2007-11-13 08:24:02 +01:00
|
|
|
}
|
|
|
|
|
2012-08-13 10:54:24 +02:00
|
|
|
#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
|
|
|
|
/*
|
|
|
|
* The realtime counter also called master counter, is a free-running
|
|
|
|
* counter, which is related to real time. It produces the count used
|
|
|
|
* by the CPU local timer peripherals in the MPU cluster. The timer counts
|
|
|
|
* at a rate of 6.144 MHz. Because the device operates on different clocks
|
|
|
|
* in different power modes, the master counter shifts operation between
|
|
|
|
* clocks, adjusting the increment per clock in hardware accordingly to
|
|
|
|
* maintain a constant count rate.
|
|
|
|
*/
|
|
|
|
static void __init realtime_counter_init(void)
|
|
|
|
{
|
|
|
|
void __iomem *base;
|
|
|
|
static struct clk *sys_clk;
|
|
|
|
unsigned long rate;
|
|
|
|
unsigned int reg, num, den;
|
|
|
|
|
|
|
|
base = ioremap(REALTIME_COUNTER_BASE, SZ_32);
|
|
|
|
if (!base) {
|
|
|
|
pr_err("%s: ioremap failed\n", __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
sys_clk = clk_get(NULL, "sys_clkin_ck");
|
2012-10-09 00:01:41 +02:00
|
|
|
if (IS_ERR(sys_clk)) {
|
2012-08-13 10:54:24 +02:00
|
|
|
pr_err("%s: failed to get system clock handle\n", __func__);
|
|
|
|
iounmap(base);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
rate = clk_get_rate(sys_clk);
|
|
|
|
/* Numerator/denumerator values refer TRM Realtime Counter section */
|
|
|
|
switch (rate) {
|
|
|
|
case 1200000:
|
|
|
|
num = 64;
|
|
|
|
den = 125;
|
|
|
|
break;
|
|
|
|
case 1300000:
|
|
|
|
num = 768;
|
|
|
|
den = 1625;
|
|
|
|
break;
|
|
|
|
case 19200000:
|
|
|
|
num = 8;
|
|
|
|
den = 25;
|
|
|
|
break;
|
|
|
|
case 2600000:
|
|
|
|
num = 384;
|
|
|
|
den = 1625;
|
|
|
|
break;
|
|
|
|
case 2700000:
|
|
|
|
num = 256;
|
|
|
|
den = 1125;
|
|
|
|
break;
|
|
|
|
case 38400000:
|
|
|
|
default:
|
|
|
|
/* Program it for 38.4 MHz */
|
|
|
|
num = 4;
|
|
|
|
den = 25;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Program numerator and denumerator registers */
|
|
|
|
reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
|
|
|
|
NUMERATOR_DENUMERATOR_MASK;
|
|
|
|
reg |= num;
|
|
|
|
__raw_writel(reg, base + INCREMENTER_NUMERATOR_OFFSET);
|
|
|
|
|
|
|
|
reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
|
|
|
|
NUMERATOR_DENUMERATOR_MASK;
|
|
|
|
reg |= den;
|
|
|
|
__raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
|
|
|
|
|
|
|
|
iounmap(base);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void __init realtime_counter_init(void)
|
|
|
|
{}
|
|
|
|
#endif
|
|
|
|
|
2011-03-30 00:54:49 +02:00
|
|
|
#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \
|
|
|
|
clksrc_nr, clksrc_src) \
|
2011-03-30 00:54:48 +02:00
|
|
|
static void __init omap##name##_timer_init(void) \
|
|
|
|
{ \
|
2011-03-30 00:54:48 +02:00
|
|
|
omap2_gp_clockevent_init((clkev_nr), clkev_src); \
|
ARM: OMAP: Make OMAP clocksource source selection using kernel param
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-09 19:07:05 +02:00
|
|
|
omap2_clocksource_init((clksrc_nr), clksrc_src); \
|
2011-03-30 00:54:48 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
#define OMAP_SYS_TIMER(name) \
|
|
|
|
struct sys_timer omap##name##_timer = { \
|
|
|
|
.init = omap##name##_timer_init, \
|
|
|
|
};
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_OMAP2
|
2011-03-30 00:54:49 +02:00
|
|
|
OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
|
2011-03-30 00:54:48 +02:00
|
|
|
OMAP_SYS_TIMER(2)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
2011-03-30 00:54:49 +02:00
|
|
|
OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
|
2011-03-30 00:54:48 +02:00
|
|
|
OMAP_SYS_TIMER(3)
|
2011-03-30 00:54:49 +02:00
|
|
|
OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
|
|
|
|
2, OMAP3_MPU_SOURCE)
|
2011-03-30 00:54:48 +02:00
|
|
|
OMAP_SYS_TIMER(3_secure)
|
|
|
|
#endif
|
|
|
|
|
2012-05-10 21:08:49 +02:00
|
|
|
#ifdef CONFIG_SOC_AM33XX
|
|
|
|
OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE)
|
|
|
|
OMAP_SYS_TIMER(3_am33xx)
|
|
|
|
#endif
|
|
|
|
|
2011-03-30 00:54:48 +02:00
|
|
|
#ifdef CONFIG_ARCH_OMAP4
|
2009-04-28 17:22:00 +02:00
|
|
|
#ifdef CONFIG_LOCAL_TIMERS
|
2012-01-10 20:44:19 +01:00
|
|
|
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
|
2012-10-16 20:19:16 +02:00
|
|
|
OMAP44XX_LOCAL_TWD_BASE, 29);
|
2009-04-28 17:22:00 +02:00
|
|
|
#endif
|
2012-01-10 20:44:19 +01:00
|
|
|
|
|
|
|
static void __init omap4_timer_init(void)
|
|
|
|
{
|
2011-03-30 00:54:48 +02:00
|
|
|
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
|
ARM: OMAP: Make OMAP clocksource source selection using kernel param
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-09 19:07:05 +02:00
|
|
|
omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
|
2012-01-10 20:44:19 +01:00
|
|
|
#ifdef CONFIG_LOCAL_TIMERS
|
|
|
|
/* Local timers are not supprted on OMAP4430 ES1.0 */
|
|
|
|
if (omap_rev() != OMAP4430_REV_ES1_0) {
|
|
|
|
int err;
|
|
|
|
|
2012-07-04 15:02:32 +02:00
|
|
|
if (of_have_populated_dt()) {
|
|
|
|
twd_local_timer_of_register();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2012-01-10 20:44:19 +01:00
|
|
|
err = twd_local_timer_register(&twd_local_timer);
|
|
|
|
if (err)
|
|
|
|
pr_err("twd_local_timer_register failed %d\n", err);
|
|
|
|
}
|
|
|
|
#endif
|
2005-11-10 15:26:51 +01:00
|
|
|
}
|
2011-03-30 00:54:48 +02:00
|
|
|
OMAP_SYS_TIMER(4)
|
|
|
|
#endif
|
2011-09-20 13:30:18 +02:00
|
|
|
|
2012-05-02 09:37:12 +02:00
|
|
|
#ifdef CONFIG_SOC_OMAP5
|
2012-08-13 10:54:24 +02:00
|
|
|
static void __init omap5_timer_init(void)
|
|
|
|
{
|
2012-08-13 11:09:03 +02:00
|
|
|
int err;
|
|
|
|
|
2012-08-13 10:54:24 +02:00
|
|
|
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
|
|
|
|
omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
|
|
|
|
realtime_counter_init();
|
2012-08-13 11:09:03 +02:00
|
|
|
|
|
|
|
err = arch_timer_of_register();
|
|
|
|
if (err)
|
|
|
|
pr_err("%s: arch_timer_register failed %d\n", __func__, err);
|
2012-08-13 10:54:24 +02:00
|
|
|
}
|
2012-05-02 09:37:12 +02:00
|
|
|
OMAP_SYS_TIMER(5)
|
|
|
|
#endif
|
|
|
|
|
2011-09-20 13:30:18 +02:00
|
|
|
/**
|
|
|
|
* omap_timer_init - build and register timer device with an
|
|
|
|
* associated timer hwmod
|
|
|
|
* @oh: timer hwmod pointer to be used to build timer device
|
|
|
|
* @user: parameter that can be passed from calling hwmod API
|
|
|
|
*
|
|
|
|
* Called by omap_hwmod_for_each_by_class to register each of the timer
|
|
|
|
* devices present in the system. The number of timer devices is known
|
|
|
|
* by parsing through the hwmod database for a given class name. At the
|
|
|
|
* end of function call memory is allocated for timer device and it is
|
|
|
|
* registered to the framework ready to be proved by the driver.
|
|
|
|
*/
|
|
|
|
static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
|
|
|
|
{
|
|
|
|
int id;
|
|
|
|
int ret = 0;
|
|
|
|
char *name = "omap_timer";
|
|
|
|
struct dmtimer_platform_data *pdata;
|
2011-10-04 18:47:06 +02:00
|
|
|
struct platform_device *pdev;
|
2011-09-20 13:30:18 +02:00
|
|
|
struct omap_timer_capability_dev_attr *timer_dev_attr;
|
|
|
|
|
|
|
|
pr_debug("%s: %s\n", __func__, oh->name);
|
|
|
|
|
|
|
|
/* on secure device, do not register secure timer */
|
|
|
|
timer_dev_attr = oh->dev_attr;
|
|
|
|
if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
|
|
|
|
if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
|
|
|
|
if (!pdata) {
|
|
|
|
pr_err("%s: No memory for [%s]\n", __func__, oh->name);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Extract the IDs from name field in hwmod database
|
|
|
|
* and use the same for constructing ids' for the
|
|
|
|
* timer devices. In a way, we are avoiding usage of
|
|
|
|
* static variable witin the function to do the same.
|
|
|
|
* CAUTION: We have to be careful and make sure the
|
|
|
|
* name in hwmod database does not change in which case
|
|
|
|
* we might either make corresponding change here or
|
|
|
|
* switch back static variable mechanism.
|
|
|
|
*/
|
|
|
|
sscanf(oh->name, "timer%2d", &id);
|
|
|
|
|
ARM: OMAP: Add DMTIMER capability variable to represent timer features
Although the OMAP timers share a common hardware design, there are some
differences between the timer instances in a given device. For example, a timer
maybe in a power domain that can be powered-of, so can lose its logic state and
need restoring where as another may be in power domain that is always be on.
Another example, is a timer may support different clock sources to drive the
timer. This information is passed to the dmtimer via the following platform data
structure.
struct dmtimer_platform_data {
int (*set_timer_src)(struct platform_device *pdev, int source);
int timer_ip_version;
u32 needs_manual_reset:1;
bool loses_context;
int (*get_context_loss_count)(struct device *dev);
};
The above structure uses multiple variables to represent the timer features.
HWMOD also stores the timer capabilities using a bit-mask that represents the
features supported. By using the same format for representing the timer
features in the platform data as used by HWMOD, we can ...
1. Use the flags defined in the plat/dmtimer.h to represent the features
supported.
2. For devices using HWMOD, we can retrieve the features supported from HWMOD.
3. Eventually, simplify the platform data structure to be ...
struct dmtimer_platform_data {
int (*set_timer_src)(struct platform_device *pdev, int source);
u32 timer_capability;
}
Another benefit from doing this, is that it will simplify the migration of the
dmtimer driver to device-tree. For example, in the current OMAP2+ timer code the
"loses_context" variable is configured at runtime by calling an architecture
specific function. For device tree this creates a problem, because we would need
to call the architecture specific function from within the dmtimer driver.
However, such attributes do not need to be queried at runtime and we can look up
the attributes via HWMOD or device-tree.
This changes a new "capability" variable to the platform data and timer
structure so we can start removing and simplifying the platform data structure.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-05 19:34:52 +02:00
|
|
|
if (timer_dev_attr)
|
|
|
|
pdata->timer_capability = timer_dev_attr->timer_capability;
|
2011-09-22 01:38:51 +02:00
|
|
|
|
2011-10-04 18:47:06 +02:00
|
|
|
pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
|
2011-10-04 23:20:41 +02:00
|
|
|
NULL, 0, 0);
|
2011-09-20 13:30:18 +02:00
|
|
|
|
2011-10-04 18:47:06 +02:00
|
|
|
if (IS_ERR(pdev)) {
|
2011-09-20 13:30:18 +02:00
|
|
|
pr_err("%s: Can't build omap_device for %s: %s.\n",
|
|
|
|
__func__, name, oh->name);
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
kfree(pdata);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2011-09-20 13:30:20 +02:00
|
|
|
|
|
|
|
/**
|
|
|
|
* omap2_dm_timer_init - top level regular device initialization
|
|
|
|
*
|
|
|
|
* Uses dedicated hwmod api to parse through hwmod database for
|
|
|
|
* given class name and then build and register the timer device.
|
|
|
|
*/
|
|
|
|
static int __init omap2_dm_timer_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
|
|
|
|
if (unlikely(ret)) {
|
|
|
|
pr_err("%s: device registration failed.\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
arch_initcall(omap2_dm_timer_init);
|
ARM: OMAP: Make OMAP clocksource source selection using kernel param
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-05-09 19:07:05 +02:00
|
|
|
|
|
|
|
/**
|
|
|
|
* omap2_override_clocksource - clocksource override with user configuration
|
|
|
|
*
|
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* Allows user to override default clocksource, using kernel parameter
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* clocksource="gp_timer" (For all OMAP2PLUS architectures)
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*
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* Note that, here we are using same standard kernel parameter "clocksource=",
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* and not introducing any OMAP specific interface.
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*/
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static int __init omap2_override_clocksource(char *str)
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{
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if (!str)
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return 0;
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/*
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* For OMAP architecture, we only have two options
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* - sync_32k (default)
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* - gp_timer (sys_clk based)
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*/
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if (!strcmp(str, "gp_timer"))
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use_gptimer_clksrc = true;
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return 0;
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}
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early_param("clocksource", omap2_override_clocksource);
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