2005-04-17 00:20:36 +02:00
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/*
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* linux/kernel/irq/proc.c
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*
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* Copyright (C) 1992, 1998-2004 Linus Torvalds, Ingo Molnar
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*
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* This file contains the /proc/irq/ handling code.
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*/
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#include <linux/irq.h>
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#include <linux/proc_fs.h>
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#include <linux/interrupt.h>
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2006-01-08 10:02:17 +01:00
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#include "internals.h"
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2006-06-29 11:24:42 +02:00
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static struct proc_dir_entry *root_irq_dir;
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2005-04-17 00:20:36 +02:00
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#ifdef CONFIG_SMP
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 00:16:15 +02:00
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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void proc_set_irq_affinity(unsigned int irq, cpumask_t mask_val)
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{
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2006-06-23 11:04:22 +02:00
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set_balance_irq_affinity(irq, mask_val);
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 00:16:15 +02:00
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/*
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* Save these away for later use. Re-progam when the
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* interrupt is pending
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*/
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set_pending_irq(irq, mask_val);
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}
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#else
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void proc_set_irq_affinity(unsigned int irq, cpumask_t mask_val)
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2005-04-17 00:20:36 +02:00
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{
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2006-06-23 11:04:22 +02:00
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set_balance_irq_affinity(irq, mask_val);
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2006-06-29 11:24:38 +02:00
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irq_desc[irq].affinity = mask_val;
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[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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irq_desc[irq].chip->set_affinity(irq, mask_val);
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2005-04-17 00:20:36 +02:00
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}
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 00:16:15 +02:00
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#endif
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2005-04-17 00:20:36 +02:00
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static int irq_affinity_read_proc(char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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2006-06-29 11:24:38 +02:00
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int len = cpumask_scnprintf(page, count, irq_desc[(long)data].affinity);
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2005-04-17 00:20:36 +02:00
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if (count - len < 2)
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return -EINVAL;
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len += sprintf(page + len, "\n");
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return len;
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}
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int no_irq_affinity;
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static int irq_affinity_write_proc(struct file *file, const char __user *buffer,
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unsigned long count, void *data)
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{
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unsigned int irq = (int)(long)data, full_count = count, err;
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cpumask_t new_value, tmp;
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[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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if (!irq_desc[irq].chip->set_affinity || no_irq_affinity)
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2005-04-17 00:20:36 +02:00
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return -EIO;
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err = cpumask_parse(buffer, count, new_value);
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if (err)
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return err;
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/*
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* Do not allow disabling IRQs completely - it's a too easy
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* way to make the system unusable accidentally :-) At least
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* one online CPU still has to be targeted.
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*/
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cpus_and(tmp, new_value, cpu_online_map);
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if (cpus_empty(tmp))
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2006-01-06 09:12:21 +01:00
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/* Special case for empty set - allow the architecture
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code to set default SMP affinity. */
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return select_smp_affinity(irq) ? -EINVAL : full_count;
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2005-04-17 00:20:36 +02:00
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proc_set_irq_affinity(irq, new_value);
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return full_count;
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}
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#endif
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#define MAX_NAMELEN 128
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static int name_unique(unsigned int irq, struct irqaction *new_action)
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{
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struct irq_desc *desc = irq_desc + irq;
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struct irqaction *action;
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for (action = desc->action ; action; action = action->next)
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if ((action != new_action) && action->name &&
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!strcmp(new_action->name, action->name))
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return 0;
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return 1;
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}
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void register_handler_proc(unsigned int irq, struct irqaction *action)
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{
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char name [MAX_NAMELEN];
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2006-06-29 11:24:42 +02:00
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if (!irq_desc[irq].dir || action->dir || !action->name ||
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2005-04-17 00:20:36 +02:00
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!name_unique(irq, action))
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return;
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memset(name, 0, MAX_NAMELEN);
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snprintf(name, MAX_NAMELEN, "%s", action->name);
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/* create /proc/irq/1234/handler/ */
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2006-06-29 11:24:42 +02:00
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action->dir = proc_mkdir(name, irq_desc[irq].dir);
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2005-04-17 00:20:36 +02:00
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}
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#undef MAX_NAMELEN
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#define MAX_NAMELEN 10
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void register_irq_proc(unsigned int irq)
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{
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char name [MAX_NAMELEN];
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if (!root_irq_dir ||
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[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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(irq_desc[irq].chip == &no_irq_type) ||
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2006-06-29 11:24:42 +02:00
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irq_desc[irq].dir)
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2005-04-17 00:20:36 +02:00
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return;
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memset(name, 0, MAX_NAMELEN);
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sprintf(name, "%d", irq);
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/* create /proc/irq/1234 */
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2006-06-29 11:24:42 +02:00
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irq_desc[irq].dir = proc_mkdir(name, root_irq_dir);
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2005-04-17 00:20:36 +02:00
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#ifdef CONFIG_SMP
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{
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struct proc_dir_entry *entry;
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/* create /proc/irq/<irq>/smp_affinity */
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2006-06-29 11:24:42 +02:00
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entry = create_proc_entry("smp_affinity", 0600, irq_desc[irq].dir);
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2005-04-17 00:20:36 +02:00
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if (entry) {
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entry->nlink = 1;
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entry->data = (void *)(long)irq;
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entry->read_proc = irq_affinity_read_proc;
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entry->write_proc = irq_affinity_write_proc;
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}
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}
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#endif
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}
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#undef MAX_NAMELEN
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void unregister_handler_proc(unsigned int irq, struct irqaction *action)
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{
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if (action->dir)
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2006-06-29 11:24:42 +02:00
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remove_proc_entry(action->dir->name, irq_desc[irq].dir);
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2005-04-17 00:20:36 +02:00
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}
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void init_irq_proc(void)
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{
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int i;
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/* create /proc/irq */
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root_irq_dir = proc_mkdir("irq", NULL);
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if (!root_irq_dir)
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return;
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/*
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* Create entries for all existing IRQs.
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*/
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for (i = 0; i < NR_IRQS; i++)
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register_irq_proc(i);
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}
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