2019-05-27 08:55:06 +02:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2015-12-01 16:32:47 +01:00
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/*
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* Copyright (C) 2015 Zodiac Inflight Innovations
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*
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* Author: Martyn Welch <martyn.welch@collabora.co.uk>
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*
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* Based on twl4030_wdt.c by Timo Kokkonen <timo.t.kokkonen at nokia.com>:
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*
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* Copyright (C) Nokia Corporation
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*/
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2016-08-10 18:18:03 +02:00
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#include <linux/delay.h>
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2015-12-01 16:32:47 +01:00
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#include <linux/i2c.h>
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2016-08-10 18:18:03 +02:00
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#include <linux/ihex.h>
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#include <linux/firmware.h>
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2015-12-01 16:32:47 +01:00
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <linux/version.h>
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#include <linux/watchdog.h>
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#define ZIIRAVE_TIMEOUT_MIN 3
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#define ZIIRAVE_TIMEOUT_MAX 255
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#define ZIIRAVE_PING_VALUE 0x0
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#define ZIIRAVE_STATE_INITIAL 0x0
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#define ZIIRAVE_STATE_OFF 0x1
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#define ZIIRAVE_STATE_ON 0x2
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2016-08-10 18:18:03 +02:00
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#define ZIIRAVE_FW_NAME "ziirave_wdt.fw"
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2016-02-26 17:05:12 +01:00
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static char *ziirave_reasons[] = {"power cycle", "hw watchdog", NULL, NULL,
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2015-12-01 16:32:47 +01:00
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"host request", NULL, "illegal configuration",
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"illegal instruction", "illegal trap",
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"unknown"};
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#define ZIIRAVE_WDT_FIRM_VER_MAJOR 0x1
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#define ZIIRAVE_WDT_BOOT_VER_MAJOR 0x3
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#define ZIIRAVE_WDT_RESET_REASON 0x5
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#define ZIIRAVE_WDT_STATE 0x6
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#define ZIIRAVE_WDT_TIMEOUT 0x7
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#define ZIIRAVE_WDT_TIME_LEFT 0x8
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#define ZIIRAVE_WDT_PING 0x9
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#define ZIIRAVE_WDT_RESET_DURATION 0xa
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2016-08-10 18:18:03 +02:00
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#define ZIIRAVE_FIRM_PKT_TOTAL_SIZE 20
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#define ZIIRAVE_FIRM_PKT_DATA_SIZE 16
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#define ZIIRAVE_FIRM_FLASH_MEMORY_START 0x1600
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#define ZIIRAVE_FIRM_FLASH_MEMORY_END 0x2bbf
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/* Received and ready for next Download packet. */
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#define ZIIRAVE_FIRM_DOWNLOAD_ACK 1
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/* Currently writing to flash. Retry Download status in a moment! */
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#define ZIIRAVE_FIRM_DOWNLOAD_BUSY 2
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/* Wait for ACK timeout in ms */
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#define ZIIRAVE_FIRM_WAIT_FOR_ACK_TIMEOUT 50
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/* Firmware commands */
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#define ZIIRAVE_CMD_DOWNLOAD_START 0x10
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#define ZIIRAVE_CMD_DOWNLOAD_END 0x11
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#define ZIIRAVE_CMD_DOWNLOAD_SET_READ_ADDR 0x12
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#define ZIIRAVE_CMD_DOWNLOAD_READ_BYTE 0x13
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#define ZIIRAVE_CMD_RESET_PROCESSOR 0x0b
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#define ZIIRAVE_CMD_JUMP_TO_BOOTLOADER 0x0c
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#define ZIIRAVE_CMD_DOWNLOAD_PACKET 0x0e
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2015-12-01 16:32:47 +01:00
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struct ziirave_wdt_rev {
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unsigned char major;
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unsigned char minor;
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};
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struct ziirave_wdt_data {
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2016-08-10 18:18:03 +02:00
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struct mutex sysfs_mutex;
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2015-12-01 16:32:47 +01:00
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struct watchdog_device wdd;
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struct ziirave_wdt_rev bootloader_rev;
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struct ziirave_wdt_rev firmware_rev;
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int reset_reason;
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};
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static int wdt_timeout;
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module_param(wdt_timeout, int, 0);
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MODULE_PARM_DESC(wdt_timeout, "Watchdog timeout in seconds");
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static int reset_duration;
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module_param(reset_duration, int, 0);
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MODULE_PARM_DESC(reset_duration,
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"Watchdog reset pulse duration in milliseconds");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static int ziirave_wdt_revision(struct i2c_client *client,
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struct ziirave_wdt_rev *rev, u8 command)
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{
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int ret;
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ret = i2c_smbus_read_byte_data(client, command);
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if (ret < 0)
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return ret;
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rev->major = ret;
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ret = i2c_smbus_read_byte_data(client, command + 1);
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if (ret < 0)
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return ret;
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rev->minor = ret;
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return 0;
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}
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static int ziirave_wdt_set_state(struct watchdog_device *wdd, int state)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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return i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_STATE, state);
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}
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static int ziirave_wdt_start(struct watchdog_device *wdd)
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{
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return ziirave_wdt_set_state(wdd, ZIIRAVE_STATE_ON);
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}
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static int ziirave_wdt_stop(struct watchdog_device *wdd)
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{
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return ziirave_wdt_set_state(wdd, ZIIRAVE_STATE_OFF);
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}
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static int ziirave_wdt_ping(struct watchdog_device *wdd)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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return i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_PING,
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ZIIRAVE_PING_VALUE);
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}
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static int ziirave_wdt_set_timeout(struct watchdog_device *wdd,
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unsigned int timeout)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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int ret;
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ret = i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_TIMEOUT, timeout);
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if (!ret)
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wdd->timeout = timeout;
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return ret;
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}
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static unsigned int ziirave_wdt_get_timeleft(struct watchdog_device *wdd)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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int ret;
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ret = i2c_smbus_read_byte_data(client, ZIIRAVE_WDT_TIME_LEFT);
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if (ret < 0)
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ret = 0;
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return ret;
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}
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2016-08-10 18:18:03 +02:00
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static int ziirave_firm_wait_for_ack(struct watchdog_device *wdd)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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int ret;
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unsigned long timeout;
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timeout = jiffies + msecs_to_jiffies(ZIIRAVE_FIRM_WAIT_FOR_ACK_TIMEOUT);
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do {
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if (time_after(jiffies, timeout))
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return -ETIMEDOUT;
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usleep_range(5000, 10000);
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ret = i2c_smbus_read_byte(client);
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if (ret < 0) {
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dev_err(&client->dev, "Failed to read byte\n");
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return ret;
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}
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} while (ret == ZIIRAVE_FIRM_DOWNLOAD_BUSY);
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return ret == ZIIRAVE_FIRM_DOWNLOAD_ACK ? 0 : -EIO;
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}
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static int ziirave_firm_set_read_addr(struct watchdog_device *wdd, u16 addr)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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u8 address[2];
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address[0] = addr & 0xff;
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address[1] = (addr >> 8) & 0xff;
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return i2c_smbus_write_block_data(client,
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ZIIRAVE_CMD_DOWNLOAD_SET_READ_ADDR,
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ARRAY_SIZE(address), address);
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}
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static int ziirave_firm_write_block_data(struct watchdog_device *wdd,
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u8 command, u8 length, const u8 *data,
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bool wait_for_ack)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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int ret;
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ret = i2c_smbus_write_block_data(client, command, length, data);
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if (ret) {
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dev_err(&client->dev,
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"Failed to send command 0x%02x: %d\n", command, ret);
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return ret;
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}
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if (wait_for_ack)
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ret = ziirave_firm_wait_for_ack(wdd);
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return ret;
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}
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static int ziirave_firm_write_byte(struct watchdog_device *wdd, u8 command,
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u8 byte, bool wait_for_ack)
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{
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return ziirave_firm_write_block_data(wdd, command, 1, &byte,
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wait_for_ack);
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}
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/*
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* ziirave_firm_write_pkt() - Build and write a firmware packet
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*
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* A packet to send to the firmware is composed by following bytes:
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* Length | Addr0 | Addr1 | Data0 .. Data15 | Checksum |
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* Where,
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* Length: A data byte containing the length of the data.
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* Addr0: Low byte of the address.
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* Addr1: High byte of the address.
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* Data0 .. Data15: Array of 16 bytes of data.
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* Checksum: Checksum byte to verify data integrity.
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*/
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static int ziirave_firm_write_pkt(struct watchdog_device *wdd,
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const struct ihex_binrec *rec)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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u8 i, checksum = 0, packet[ZIIRAVE_FIRM_PKT_TOTAL_SIZE];
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int ret;
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u16 addr;
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memset(packet, 0, ARRAY_SIZE(packet));
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/* Packet length */
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packet[0] = (u8)be16_to_cpu(rec->len);
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/* Packet address */
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addr = (be32_to_cpu(rec->addr) & 0xffff) >> 1;
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packet[1] = addr & 0xff;
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packet[2] = (addr & 0xff00) >> 8;
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/* Packet data */
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if (be16_to_cpu(rec->len) > ZIIRAVE_FIRM_PKT_DATA_SIZE)
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return -EMSGSIZE;
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memcpy(packet + 3, rec->data, be16_to_cpu(rec->len));
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/* Packet checksum */
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for (i = 0; i < ZIIRAVE_FIRM_PKT_TOTAL_SIZE - 1; i++)
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checksum += packet[i];
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packet[ZIIRAVE_FIRM_PKT_TOTAL_SIZE - 1] = checksum;
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ret = ziirave_firm_write_block_data(wdd, ZIIRAVE_CMD_DOWNLOAD_PACKET,
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ARRAY_SIZE(packet), packet, true);
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if (ret)
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dev_err(&client->dev,
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"Failed to write firmware packet at address 0x%04x: %d\n",
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addr, ret);
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return ret;
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}
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static int ziirave_firm_verify(struct watchdog_device *wdd,
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const struct firmware *fw)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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const struct ihex_binrec *rec;
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int i, ret;
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u8 data[ZIIRAVE_FIRM_PKT_DATA_SIZE];
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u16 addr;
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for (rec = (void *)fw->data; rec; rec = ihex_next_binrec(rec)) {
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/* Zero length marks end of records */
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if (!be16_to_cpu(rec->len))
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break;
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addr = (be32_to_cpu(rec->addr) & 0xffff) >> 1;
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if (addr < ZIIRAVE_FIRM_FLASH_MEMORY_START ||
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addr > ZIIRAVE_FIRM_FLASH_MEMORY_END)
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continue;
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ret = ziirave_firm_set_read_addr(wdd, addr);
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if (ret) {
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dev_err(&client->dev,
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"Failed to send SET_READ_ADDR command: %d\n",
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ret);
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return ret;
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}
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for (i = 0; i < ARRAY_SIZE(data); i++) {
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ret = i2c_smbus_read_byte_data(client,
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ZIIRAVE_CMD_DOWNLOAD_READ_BYTE);
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if (ret < 0) {
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dev_err(&client->dev,
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"Failed to READ DATA: %d\n", ret);
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return ret;
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}
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data[i] = ret;
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}
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if (memcmp(data, rec->data, be16_to_cpu(rec->len))) {
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dev_err(&client->dev,
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"Firmware mismatch at address 0x%04x\n", addr);
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return -EINVAL;
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}
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}
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return 0;
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}
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static int ziirave_firm_upload(struct watchdog_device *wdd,
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const struct firmware *fw)
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{
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struct i2c_client *client = to_i2c_client(wdd->parent);
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int ret, words_till_page_break;
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const struct ihex_binrec *rec;
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struct ihex_binrec *rec_new;
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ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_JUMP_TO_BOOTLOADER, 1,
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false);
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if (ret)
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return ret;
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msleep(500);
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ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_DOWNLOAD_START, 1, true);
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if (ret)
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return ret;
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msleep(500);
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|
|
|
|
for (rec = (void *)fw->data; rec; rec = ihex_next_binrec(rec)) {
|
|
|
|
/* Zero length marks end of records */
|
|
|
|
if (!be16_to_cpu(rec->len))
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* Check max data size */
|
|
|
|
if (be16_to_cpu(rec->len) > ZIIRAVE_FIRM_PKT_DATA_SIZE) {
|
|
|
|
dev_err(&client->dev, "Firmware packet too long (%d)\n",
|
|
|
|
be16_to_cpu(rec->len));
|
|
|
|
return -EMSGSIZE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Calculate words till page break */
|
|
|
|
words_till_page_break = (64 - ((be32_to_cpu(rec->addr) >> 1) &
|
|
|
|
0x3f));
|
|
|
|
if ((be16_to_cpu(rec->len) >> 1) > words_till_page_break) {
|
|
|
|
/*
|
|
|
|
* Data in passes page boundary, so we need to split in
|
|
|
|
* two blocks of data. Create a packet with the first
|
|
|
|
* block of data.
|
|
|
|
*/
|
|
|
|
rec_new = kzalloc(sizeof(struct ihex_binrec) +
|
|
|
|
(words_till_page_break << 1),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!rec_new)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
rec_new->len = cpu_to_be16(words_till_page_break << 1);
|
|
|
|
rec_new->addr = rec->addr;
|
|
|
|
memcpy(rec_new->data, rec->data,
|
|
|
|
be16_to_cpu(rec_new->len));
|
|
|
|
|
|
|
|
ret = ziirave_firm_write_pkt(wdd, rec_new);
|
|
|
|
kfree(rec_new);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* Create a packet with the second block of data */
|
|
|
|
rec_new = kzalloc(sizeof(struct ihex_binrec) +
|
|
|
|
be16_to_cpu(rec->len) -
|
|
|
|
(words_till_page_break << 1),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!rec_new)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/* Remaining bytes */
|
|
|
|
rec_new->len = rec->len -
|
|
|
|
cpu_to_be16(words_till_page_break << 1);
|
|
|
|
|
|
|
|
rec_new->addr = cpu_to_be32(be32_to_cpu(rec->addr) +
|
|
|
|
(words_till_page_break << 1));
|
|
|
|
|
|
|
|
memcpy(rec_new->data,
|
|
|
|
rec->data + (words_till_page_break << 1),
|
|
|
|
be16_to_cpu(rec_new->len));
|
|
|
|
|
|
|
|
ret = ziirave_firm_write_pkt(wdd, rec_new);
|
|
|
|
kfree(rec_new);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
} else {
|
|
|
|
ret = ziirave_firm_write_pkt(wdd, rec);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* For end of download, the length field will be set to 0 */
|
|
|
|
rec_new = kzalloc(sizeof(struct ihex_binrec) + 1, GFP_KERNEL);
|
|
|
|
if (!rec_new)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ret = ziirave_firm_write_pkt(wdd, rec_new);
|
|
|
|
kfree(rec_new);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&client->dev, "Failed to send EMPTY packet: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This sleep seems to be required */
|
|
|
|
msleep(20);
|
|
|
|
|
|
|
|
/* Start firmware verification */
|
|
|
|
ret = ziirave_firm_verify(wdd, fw);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&client->dev,
|
|
|
|
"Failed to verify firmware: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* End download operation */
|
|
|
|
ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_DOWNLOAD_END, 1, false);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* Reset the processor */
|
|
|
|
ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_RESET_PROCESSOR, 1,
|
|
|
|
false);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
msleep(500);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-12-01 16:32:47 +01:00
|
|
|
static const struct watchdog_info ziirave_wdt_info = {
|
|
|
|
.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
|
|
|
|
.identity = "Zodiac RAVE Watchdog",
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct watchdog_ops ziirave_wdt_ops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.start = ziirave_wdt_start,
|
|
|
|
.stop = ziirave_wdt_stop,
|
|
|
|
.ping = ziirave_wdt_ping,
|
|
|
|
.set_timeout = ziirave_wdt_set_timeout,
|
|
|
|
.get_timeleft = ziirave_wdt_get_timeleft,
|
|
|
|
};
|
|
|
|
|
|
|
|
static ssize_t ziirave_wdt_sysfs_show_firm(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct i2c_client *client = to_i2c_client(dev->parent);
|
|
|
|
struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client);
|
2016-08-10 18:18:03 +02:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = mutex_lock_interruptible(&w_priv->sysfs_mutex);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = sprintf(buf, "02.%02u.%02u", w_priv->firmware_rev.major,
|
|
|
|
w_priv->firmware_rev.minor);
|
|
|
|
|
|
|
|
mutex_unlock(&w_priv->sysfs_mutex);
|
2015-12-01 16:32:47 +01:00
|
|
|
|
2016-08-10 18:18:03 +02:00
|
|
|
return ret;
|
2015-12-01 16:32:47 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(firmware_version, S_IRUGO, ziirave_wdt_sysfs_show_firm,
|
|
|
|
NULL);
|
|
|
|
|
|
|
|
static ssize_t ziirave_wdt_sysfs_show_boot(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct i2c_client *client = to_i2c_client(dev->parent);
|
|
|
|
struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client);
|
2016-08-10 18:18:03 +02:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = mutex_lock_interruptible(&w_priv->sysfs_mutex);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2015-12-01 16:32:47 +01:00
|
|
|
|
2016-08-10 18:18:03 +02:00
|
|
|
ret = sprintf(buf, "01.%02u.%02u", w_priv->bootloader_rev.major,
|
|
|
|
w_priv->bootloader_rev.minor);
|
|
|
|
|
|
|
|
mutex_unlock(&w_priv->sysfs_mutex);
|
|
|
|
|
|
|
|
return ret;
|
2015-12-01 16:32:47 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(bootloader_version, S_IRUGO, ziirave_wdt_sysfs_show_boot,
|
|
|
|
NULL);
|
|
|
|
|
|
|
|
static ssize_t ziirave_wdt_sysfs_show_reason(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct i2c_client *client = to_i2c_client(dev->parent);
|
|
|
|
struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client);
|
2016-08-10 18:18:03 +02:00
|
|
|
int ret;
|
2015-12-01 16:32:47 +01:00
|
|
|
|
2016-08-10 18:18:03 +02:00
|
|
|
ret = mutex_lock_interruptible(&w_priv->sysfs_mutex);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = sprintf(buf, "%s", ziirave_reasons[w_priv->reset_reason]);
|
|
|
|
|
|
|
|
mutex_unlock(&w_priv->sysfs_mutex);
|
|
|
|
|
|
|
|
return ret;
|
2015-12-01 16:32:47 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(reset_reason, S_IRUGO, ziirave_wdt_sysfs_show_reason,
|
|
|
|
NULL);
|
|
|
|
|
2016-08-10 18:18:03 +02:00
|
|
|
static ssize_t ziirave_wdt_sysfs_store_firm(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
struct i2c_client *client = to_i2c_client(dev->parent);
|
|
|
|
struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client);
|
|
|
|
const struct firmware *fw;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = request_ihex_firmware(&fw, ZIIRAVE_FW_NAME, dev);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&client->dev, "Failed to request ihex firmware\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = mutex_lock_interruptible(&w_priv->sysfs_mutex);
|
|
|
|
if (err)
|
|
|
|
goto release_firmware;
|
|
|
|
|
|
|
|
err = ziirave_firm_upload(&w_priv->wdd, fw);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&client->dev, "The firmware update failed: %d\n", err);
|
|
|
|
goto unlock_mutex;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Update firmware version */
|
|
|
|
err = ziirave_wdt_revision(client, &w_priv->firmware_rev,
|
|
|
|
ZIIRAVE_WDT_FIRM_VER_MAJOR);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&client->dev, "Failed to read firmware version: %d\n",
|
|
|
|
err);
|
|
|
|
goto unlock_mutex;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_info(&client->dev, "Firmware updated to version 02.%02u.%02u\n",
|
|
|
|
w_priv->firmware_rev.major, w_priv->firmware_rev.minor);
|
|
|
|
|
|
|
|
/* Restore the watchdog timeout */
|
|
|
|
err = ziirave_wdt_set_timeout(&w_priv->wdd, w_priv->wdd.timeout);
|
|
|
|
if (err)
|
|
|
|
dev_err(&client->dev, "Failed to set timeout: %d\n", err);
|
|
|
|
|
|
|
|
unlock_mutex:
|
|
|
|
mutex_unlock(&w_priv->sysfs_mutex);
|
|
|
|
|
|
|
|
release_firmware:
|
|
|
|
release_firmware(fw);
|
|
|
|
|
|
|
|
return err ? err : count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(update_firmware, S_IWUSR, NULL,
|
|
|
|
ziirave_wdt_sysfs_store_firm);
|
|
|
|
|
2015-12-01 16:32:47 +01:00
|
|
|
static struct attribute *ziirave_wdt_attrs[] = {
|
|
|
|
&dev_attr_firmware_version.attr,
|
|
|
|
&dev_attr_bootloader_version.attr,
|
|
|
|
&dev_attr_reset_reason.attr,
|
2016-08-10 18:18:03 +02:00
|
|
|
&dev_attr_update_firmware.attr,
|
2015-12-01 16:32:47 +01:00
|
|
|
NULL
|
|
|
|
};
|
2016-01-04 00:11:57 +01:00
|
|
|
ATTRIBUTE_GROUPS(ziirave_wdt);
|
2015-12-01 16:32:47 +01:00
|
|
|
|
|
|
|
static int ziirave_wdt_init_duration(struct i2c_client *client)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!reset_duration) {
|
|
|
|
/* See if the reset pulse duration is provided in an of_node */
|
|
|
|
if (!client->dev.of_node)
|
|
|
|
ret = -ENODEV;
|
|
|
|
else
|
|
|
|
ret = of_property_read_u32(client->dev.of_node,
|
|
|
|
"reset-duration-ms",
|
|
|
|
&reset_duration);
|
|
|
|
if (ret) {
|
|
|
|
dev_info(&client->dev,
|
|
|
|
"Unable to set reset pulse duration, using default\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (reset_duration < 1 || reset_duration > 255)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev_info(&client->dev, "Setting reset duration to %dms",
|
|
|
|
reset_duration);
|
|
|
|
|
|
|
|
return i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_RESET_DURATION,
|
|
|
|
reset_duration);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ziirave_wdt_probe(struct i2c_client *client,
|
|
|
|
const struct i2c_device_id *id)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct ziirave_wdt_data *w_priv;
|
|
|
|
int val;
|
|
|
|
|
|
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
w_priv = devm_kzalloc(&client->dev, sizeof(*w_priv), GFP_KERNEL);
|
|
|
|
if (!w_priv)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2016-08-10 18:18:03 +02:00
|
|
|
mutex_init(&w_priv->sysfs_mutex);
|
|
|
|
|
2015-12-01 16:32:47 +01:00
|
|
|
w_priv->wdd.info = &ziirave_wdt_info;
|
|
|
|
w_priv->wdd.ops = &ziirave_wdt_ops;
|
|
|
|
w_priv->wdd.min_timeout = ZIIRAVE_TIMEOUT_MIN;
|
|
|
|
w_priv->wdd.max_timeout = ZIIRAVE_TIMEOUT_MAX;
|
|
|
|
w_priv->wdd.parent = &client->dev;
|
2016-01-04 00:11:57 +01:00
|
|
|
w_priv->wdd.groups = ziirave_wdt_groups;
|
2015-12-01 16:32:47 +01:00
|
|
|
|
2019-04-19 20:16:01 +02:00
|
|
|
watchdog_init_timeout(&w_priv->wdd, wdt_timeout, &client->dev);
|
2015-12-01 16:32:47 +01:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The default value set in the watchdog should be perfectly valid, so
|
|
|
|
* pass that in if we haven't provided one via the module parameter or
|
|
|
|
* of property.
|
|
|
|
*/
|
|
|
|
if (w_priv->wdd.timeout == 0) {
|
|
|
|
val = i2c_smbus_read_byte_data(client, ZIIRAVE_WDT_TIMEOUT);
|
|
|
|
if (val < 0)
|
|
|
|
return val;
|
|
|
|
|
|
|
|
if (val < ZIIRAVE_TIMEOUT_MIN)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
w_priv->wdd.timeout = val;
|
|
|
|
} else {
|
|
|
|
ret = ziirave_wdt_set_timeout(&w_priv->wdd,
|
|
|
|
w_priv->wdd.timeout);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
dev_info(&client->dev, "Timeout set to %ds.",
|
|
|
|
w_priv->wdd.timeout);
|
|
|
|
}
|
|
|
|
|
|
|
|
watchdog_set_nowayout(&w_priv->wdd, nowayout);
|
|
|
|
|
|
|
|
i2c_set_clientdata(client, w_priv);
|
|
|
|
|
|
|
|
/* If in unconfigured state, set to stopped */
|
|
|
|
val = i2c_smbus_read_byte_data(client, ZIIRAVE_WDT_STATE);
|
|
|
|
if (val < 0)
|
|
|
|
return val;
|
|
|
|
|
|
|
|
if (val == ZIIRAVE_STATE_INITIAL)
|
|
|
|
ziirave_wdt_stop(&w_priv->wdd);
|
|
|
|
|
|
|
|
ret = ziirave_wdt_init_duration(client);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = ziirave_wdt_revision(client, &w_priv->firmware_rev,
|
|
|
|
ZIIRAVE_WDT_FIRM_VER_MAJOR);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = ziirave_wdt_revision(client, &w_priv->bootloader_rev,
|
|
|
|
ZIIRAVE_WDT_BOOT_VER_MAJOR);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
w_priv->reset_reason = i2c_smbus_read_byte_data(client,
|
|
|
|
ZIIRAVE_WDT_RESET_REASON);
|
|
|
|
if (w_priv->reset_reason < 0)
|
|
|
|
return w_priv->reset_reason;
|
|
|
|
|
|
|
|
if (w_priv->reset_reason >= ARRAY_SIZE(ziirave_reasons) ||
|
|
|
|
!ziirave_reasons[w_priv->reset_reason])
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
ret = watchdog_register_device(&w_priv->wdd);
|
|
|
|
|
2016-01-04 00:11:57 +01:00
|
|
|
return ret;
|
2015-12-01 16:32:47 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ziirave_wdt_remove(struct i2c_client *client)
|
|
|
|
{
|
|
|
|
struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client);
|
|
|
|
|
|
|
|
watchdog_unregister_device(&w_priv->wdd);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-08-21 18:48:38 +02:00
|
|
|
static const struct i2c_device_id ziirave_wdt_id[] = {
|
2016-07-09 11:43:19 +02:00
|
|
|
{ "rave-wdt", 0 },
|
2015-12-01 16:32:47 +01:00
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, ziirave_wdt_id);
|
|
|
|
|
|
|
|
static const struct of_device_id zrv_wdt_of_match[] = {
|
|
|
|
{ .compatible = "zii,rave-wdt", },
|
|
|
|
{ },
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, zrv_wdt_of_match);
|
|
|
|
|
|
|
|
static struct i2c_driver ziirave_wdt_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "ziirave_wdt",
|
|
|
|
.of_match_table = zrv_wdt_of_match,
|
|
|
|
},
|
|
|
|
.probe = ziirave_wdt_probe,
|
|
|
|
.remove = ziirave_wdt_remove,
|
|
|
|
.id_table = ziirave_wdt_id,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_i2c_driver(ziirave_wdt_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Martyn Welch <martyn.welch@collabora.co.uk");
|
|
|
|
MODULE_DESCRIPTION("Zodiac Aerospace RAVE Switch Watchdog Processor Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|