2015-04-23 10:35:39 +02:00
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: James Liao <jamesjj.liao@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/clkdev.h>
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#include <linux/mfd/syscon.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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2016-08-16 09:30:21 +02:00
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struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
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2015-04-23 10:35:39 +02:00
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{
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int i;
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struct clk_onecell_data *clk_data;
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clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL);
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if (!clk_data)
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return NULL;
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clk_data->clks = kcalloc(clk_num, sizeof(*clk_data->clks), GFP_KERNEL);
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if (!clk_data->clks)
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goto err_out;
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clk_data->clk_num = clk_num;
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for (i = 0; i < clk_num; i++)
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clk_data->clks[i] = ERR_PTR(-ENOENT);
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return clk_data;
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err_out:
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kfree(clk_data);
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return NULL;
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}
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2016-08-16 09:30:21 +02:00
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void mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
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2015-07-10 05:39:15 +02:00
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int num, struct clk_onecell_data *clk_data)
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{
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int i;
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struct clk *clk;
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for (i = 0; i < num; i++) {
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const struct mtk_fixed_clk *rc = &clks[i];
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2016-11-04 08:43:05 +01:00
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if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[rc->id]))
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continue;
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2016-03-01 19:59:50 +01:00
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clk = clk_register_fixed_rate(NULL, rc->name, rc->parent, 0,
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rc->rate);
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2015-07-10 05:39:15 +02:00
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if (IS_ERR(clk)) {
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pr_err("Failed to register clk %s: %ld\n",
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rc->name, PTR_ERR(clk));
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continue;
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}
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if (clk_data)
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clk_data->clks[rc->id] = clk;
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}
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}
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2016-08-16 09:30:21 +02:00
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void mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
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2015-07-28 09:37:34 +02:00
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int num, struct clk_onecell_data *clk_data)
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2015-04-23 10:35:39 +02:00
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{
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int i;
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struct clk *clk;
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for (i = 0; i < num; i++) {
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const struct mtk_fixed_factor *ff = &clks[i];
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2016-11-04 08:43:05 +01:00
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if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[ff->id]))
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continue;
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2015-04-23 10:35:39 +02:00
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clk = clk_register_fixed_factor(NULL, ff->name, ff->parent_name,
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CLK_SET_RATE_PARENT, ff->mult, ff->div);
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if (IS_ERR(clk)) {
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pr_err("Failed to register clk %s: %ld\n",
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ff->name, PTR_ERR(clk));
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continue;
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}
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if (clk_data)
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clk_data->clks[ff->id] = clk;
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}
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}
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2016-08-16 09:30:21 +02:00
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int mtk_clk_register_gates(struct device_node *node,
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2015-07-28 09:37:34 +02:00
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const struct mtk_gate *clks,
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2015-04-23 10:35:39 +02:00
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int num, struct clk_onecell_data *clk_data)
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{
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int i;
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struct clk *clk;
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struct regmap *regmap;
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if (!clk_data)
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return -ENOMEM;
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regmap = syscon_node_to_regmap(node);
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if (IS_ERR(regmap)) {
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2017-07-18 23:42:52 +02:00
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pr_err("Cannot find regmap for %pOF: %ld\n", node,
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2015-04-23 10:35:39 +02:00
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PTR_ERR(regmap));
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return PTR_ERR(regmap);
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}
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for (i = 0; i < num; i++) {
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const struct mtk_gate *gate = &clks[i];
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2016-11-04 08:43:05 +01:00
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if (!IS_ERR_OR_NULL(clk_data->clks[gate->id]))
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continue;
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2015-04-23 10:35:39 +02:00
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clk = mtk_clk_register_gate(gate->name, gate->parent_name,
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regmap,
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gate->regs->set_ofs,
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gate->regs->clr_ofs,
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gate->regs->sta_ofs,
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gate->shift, gate->ops);
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if (IS_ERR(clk)) {
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pr_err("Failed to register clk %s: %ld\n",
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gate->name, PTR_ERR(clk));
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continue;
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}
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clk_data->clks[gate->id] = clk;
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}
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return 0;
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}
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2016-08-16 09:30:21 +02:00
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struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
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2015-04-23 10:35:39 +02:00
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void __iomem *base, spinlock_t *lock)
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{
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struct clk *clk;
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struct clk_mux *mux = NULL;
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struct clk_gate *gate = NULL;
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struct clk_divider *div = NULL;
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struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;
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const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL;
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const char * const *parent_names;
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const char *parent;
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int num_parents;
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int ret;
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if (mc->mux_shift >= 0) {
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mux = kzalloc(sizeof(*mux), GFP_KERNEL);
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if (!mux)
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return ERR_PTR(-ENOMEM);
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mux->reg = base + mc->mux_reg;
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mux->mask = BIT(mc->mux_width) - 1;
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mux->shift = mc->mux_shift;
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mux->lock = lock;
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mux_hw = &mux->hw;
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mux_ops = &clk_mux_ops;
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parent_names = mc->parent_names;
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num_parents = mc->num_parents;
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} else {
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parent = mc->parent;
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parent_names = &parent;
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num_parents = 1;
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}
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if (mc->gate_shift >= 0) {
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gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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if (!gate) {
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ret = -ENOMEM;
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goto err_out;
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}
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gate->reg = base + mc->gate_reg;
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gate->bit_idx = mc->gate_shift;
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gate->flags = CLK_GATE_SET_TO_DISABLE;
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gate->lock = lock;
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gate_hw = &gate->hw;
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gate_ops = &clk_gate_ops;
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}
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if (mc->divider_shift >= 0) {
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div) {
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ret = -ENOMEM;
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goto err_out;
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}
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div->reg = base + mc->divider_reg;
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div->shift = mc->divider_shift;
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div->width = mc->divider_width;
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div->lock = lock;
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div_hw = &div->hw;
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div_ops = &clk_divider_ops;
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}
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clk = clk_register_composite(NULL, mc->name, parent_names, num_parents,
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mux_hw, mux_ops,
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div_hw, div_ops,
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gate_hw, gate_ops,
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mc->flags);
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if (IS_ERR(clk)) {
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2016-01-08 09:15:33 +01:00
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ret = PTR_ERR(clk);
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goto err_out;
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2015-04-23 10:35:39 +02:00
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}
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return clk;
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err_out:
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2016-01-08 09:15:33 +01:00
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kfree(div);
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kfree(gate);
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2015-04-23 10:35:39 +02:00
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kfree(mux);
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return ERR_PTR(ret);
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}
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2016-08-16 09:30:21 +02:00
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void mtk_clk_register_composites(const struct mtk_composite *mcs,
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2015-04-23 10:35:39 +02:00
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int num, void __iomem *base, spinlock_t *lock,
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struct clk_onecell_data *clk_data)
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{
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struct clk *clk;
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int i;
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for (i = 0; i < num; i++) {
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const struct mtk_composite *mc = &mcs[i];
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2016-11-04 08:43:05 +01:00
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if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[mc->id]))
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continue;
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2015-04-23 10:35:39 +02:00
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clk = mtk_clk_register_composite(mc, base, lock);
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if (IS_ERR(clk)) {
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pr_err("Failed to register clk %s: %ld\n",
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mc->name, PTR_ERR(clk));
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continue;
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}
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if (clk_data)
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clk_data->clks[mc->id] = clk;
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}
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}
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2016-11-04 08:43:05 +01:00
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void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds,
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int num, void __iomem *base, spinlock_t *lock,
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struct clk_onecell_data *clk_data)
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{
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struct clk *clk;
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int i;
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for (i = 0; i < num; i++) {
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const struct mtk_clk_divider *mcd = &mcds[i];
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if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[mcd->id]))
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continue;
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clk = clk_register_divider(NULL, mcd->name, mcd->parent_name,
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mcd->flags, base + mcd->div_reg, mcd->div_shift,
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mcd->div_width, mcd->clk_divider_flags, lock);
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if (IS_ERR(clk)) {
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pr_err("Failed to register clk %s: %ld\n",
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mcd->name, PTR_ERR(clk));
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continue;
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}
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if (clk_data)
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clk_data->clks[mcd->id] = clk;
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}
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}
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