2013-02-12 03:47:56 +01:00
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/*
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* BCM2835 master mode driver
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define BCM2835_I2C_C 0x0
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#define BCM2835_I2C_S 0x4
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#define BCM2835_I2C_DLEN 0x8
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#define BCM2835_I2C_A 0xc
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#define BCM2835_I2C_FIFO 0x10
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#define BCM2835_I2C_DIV 0x14
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#define BCM2835_I2C_DEL 0x18
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#define BCM2835_I2C_CLKT 0x1c
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#define BCM2835_I2C_C_READ BIT(0)
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#define BCM2835_I2C_C_CLEAR BIT(4) /* bits 4 and 5 both clear */
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#define BCM2835_I2C_C_ST BIT(7)
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#define BCM2835_I2C_C_INTD BIT(8)
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#define BCM2835_I2C_C_INTT BIT(9)
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#define BCM2835_I2C_C_INTR BIT(10)
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#define BCM2835_I2C_C_I2CEN BIT(15)
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#define BCM2835_I2C_S_TA BIT(0)
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#define BCM2835_I2C_S_DONE BIT(1)
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#define BCM2835_I2C_S_TXW BIT(2)
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#define BCM2835_I2C_S_RXR BIT(3)
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#define BCM2835_I2C_S_TXD BIT(4)
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#define BCM2835_I2C_S_RXD BIT(5)
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#define BCM2835_I2C_S_TXE BIT(6)
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#define BCM2835_I2C_S_RXF BIT(7)
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#define BCM2835_I2C_S_ERR BIT(8)
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#define BCM2835_I2C_S_CLKT BIT(9)
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#define BCM2835_I2C_S_LEN BIT(10) /* Fake bit for SW error reporting */
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2018-02-08 14:54:05 +01:00
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#define BCM2835_I2C_FEDL_SHIFT 16
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#define BCM2835_I2C_REDL_SHIFT 0
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2015-06-18 11:10:11 +02:00
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#define BCM2835_I2C_CDIV_MIN 0x0002
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#define BCM2835_I2C_CDIV_MAX 0xFFFE
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2013-02-12 03:47:56 +01:00
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struct bcm2835_i2c_dev {
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struct device *dev;
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void __iomem *regs;
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struct clk *clk;
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int irq;
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2016-10-03 22:06:14 +02:00
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u32 bus_clk_rate;
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2013-02-12 03:47:56 +01:00
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struct i2c_adapter adapter;
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struct completion completion;
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2016-10-03 22:06:08 +02:00
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struct i2c_msg *curr_msg;
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2016-10-03 22:06:12 +02:00
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int num_msgs;
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2013-02-12 03:47:56 +01:00
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u32 msg_err;
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u8 *msg_buf;
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size_t msg_buf_remaining;
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};
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static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev,
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u32 reg, u32 val)
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{
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writel(val, i2c_dev->regs + reg);
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}
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static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
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{
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return readl(i2c_dev->regs + reg);
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}
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2016-10-03 22:06:14 +02:00
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static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
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{
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2018-02-08 14:54:05 +01:00
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u32 divider, redl, fedl;
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2016-10-03 22:06:14 +02:00
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divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
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i2c_dev->bus_clk_rate);
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/*
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* Per the datasheet, the register is always interpreted as an even
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* number, by rounding down. In other words, the LSB is ignored. So,
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* if the LSB is set, increment the divider to avoid any issue.
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*/
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if (divider & 1)
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divider++;
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if ((divider < BCM2835_I2C_CDIV_MIN) ||
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(divider > BCM2835_I2C_CDIV_MAX)) {
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dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
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return -EINVAL;
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}
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
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2018-02-08 14:54:05 +01:00
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/*
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* Number of core clocks to wait after falling edge before
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* outputting the next data bit. Note that both FEDL and REDL
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* can't be greater than CDIV/2.
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*/
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fedl = max(divider / 16, 1u);
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/*
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* Number of core clocks to wait after rising edge before
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* sampling the next incoming data bit.
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*/
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redl = max(divider / 4, 1u);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DEL,
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(fedl << BCM2835_I2C_FEDL_SHIFT) |
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(redl << BCM2835_I2C_REDL_SHIFT));
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2016-10-03 22:06:14 +02:00
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return 0;
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}
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2013-02-12 03:47:56 +01:00
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static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
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{
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u32 val;
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while (i2c_dev->msg_buf_remaining) {
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val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
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if (!(val & BCM2835_I2C_S_TXD))
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break;
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_FIFO,
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*i2c_dev->msg_buf);
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i2c_dev->msg_buf++;
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i2c_dev->msg_buf_remaining--;
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}
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}
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static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
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{
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u32 val;
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while (i2c_dev->msg_buf_remaining) {
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val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
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if (!(val & BCM2835_I2C_S_RXD))
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break;
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*i2c_dev->msg_buf = bcm2835_i2c_readl(i2c_dev,
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BCM2835_I2C_FIFO);
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i2c_dev->msg_buf++;
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i2c_dev->msg_buf_remaining--;
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}
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}
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2016-10-03 22:06:12 +02:00
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/*
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* Repeated Start Condition (Sr)
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* The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
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* talks about reading from a slave with 10 bit address. This is achieved by
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* issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
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* issue a read.
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* A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
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* firmware actually does it using polling and says that it's a workaround for
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* a problem in the state machine.
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* It turns out that it is possible to use the TXW interrupt to know when the
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* transfer is active, provided the FIFO has not been prefilled.
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*/
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static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
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{
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u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN;
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struct i2c_msg *msg = i2c_dev->curr_msg;
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bool last_msg = (i2c_dev->num_msgs == 1);
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if (!i2c_dev->num_msgs)
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return;
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i2c_dev->num_msgs--;
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i2c_dev->msg_buf = msg->buf;
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i2c_dev->msg_buf_remaining = msg->len;
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if (msg->flags & I2C_M_RD)
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c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
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else
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c |= BCM2835_I2C_C_INTT;
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if (last_msg)
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c |= BCM2835_I2C_C_INTD;
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
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}
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2016-10-03 22:06:09 +02:00
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/*
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* Note about I2C_C_CLEAR on error:
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* The I2C_C_CLEAR on errors will take some time to resolve -- if you were in
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* non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through
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* the state machine to send a NACK and a STOP. Since we're setting CLEAR
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* without I2CEN, that NACK will be hanging around queued up for next time
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* we start the engine.
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*/
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2013-02-12 03:47:56 +01:00
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static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
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{
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struct bcm2835_i2c_dev *i2c_dev = data;
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u32 val, err;
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val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
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err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
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if (err) {
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i2c_dev->msg_err = err;
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2016-10-03 22:06:09 +02:00
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goto complete;
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2013-02-12 03:47:56 +01:00
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}
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if (val & BCM2835_I2C_S_DONE) {
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2017-02-16 22:20:45 +01:00
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if (!i2c_dev->curr_msg) {
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dev_err(i2c_dev->dev, "Got unexpected interrupt (from firmware?)\n");
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} else if (i2c_dev->curr_msg->flags & I2C_M_RD) {
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2016-10-03 22:06:08 +02:00
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bcm2835_drain_rxfifo(i2c_dev);
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val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
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}
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if ((val & BCM2835_I2C_S_RXD) || i2c_dev->msg_buf_remaining)
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2013-02-12 03:47:56 +01:00
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i2c_dev->msg_err = BCM2835_I2C_S_LEN;
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else
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i2c_dev->msg_err = 0;
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2016-10-03 22:06:09 +02:00
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goto complete;
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2013-02-12 03:47:56 +01:00
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}
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2016-10-03 22:06:08 +02:00
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if (val & BCM2835_I2C_S_TXW) {
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2016-10-03 22:06:09 +02:00
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if (!i2c_dev->msg_buf_remaining) {
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i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
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goto complete;
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}
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2013-02-12 03:47:56 +01:00
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bcm2835_fill_txfifo(i2c_dev);
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2016-10-03 22:06:12 +02:00
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if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) {
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i2c_dev->curr_msg++;
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bcm2835_i2c_start_transfer(i2c_dev);
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}
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2013-02-12 03:47:56 +01:00
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return IRQ_HANDLED;
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}
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2016-10-03 22:06:08 +02:00
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if (val & BCM2835_I2C_S_RXR) {
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2016-10-03 22:06:09 +02:00
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if (!i2c_dev->msg_buf_remaining) {
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i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
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goto complete;
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}
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2016-10-03 22:06:08 +02:00
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bcm2835_drain_rxfifo(i2c_dev);
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return IRQ_HANDLED;
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}
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2013-02-12 03:47:56 +01:00
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return IRQ_NONE;
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2016-10-03 22:06:09 +02:00
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complete:
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, BCM2835_I2C_S_CLKT |
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BCM2835_I2C_S_ERR | BCM2835_I2C_S_DONE);
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complete(&i2c_dev->completion);
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return IRQ_HANDLED;
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2013-02-12 03:47:56 +01:00
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}
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2016-10-03 22:06:12 +02:00
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static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
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int num)
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2013-02-12 03:47:56 +01:00
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{
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2016-10-03 22:06:12 +02:00
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struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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2015-02-08 12:04:18 +01:00
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unsigned long time_left;
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2016-10-03 22:06:14 +02:00
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int i, ret;
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2013-02-12 03:47:56 +01:00
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2016-10-03 22:06:12 +02:00
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for (i = 0; i < (num - 1); i++)
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if (msgs[i].flags & I2C_M_RD) {
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dev_warn_once(i2c_dev->dev,
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"only one read message supported, has to be last\n");
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return -EOPNOTSUPP;
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}
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2013-02-12 03:47:56 +01:00
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2016-10-03 22:06:14 +02:00
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ret = bcm2835_i2c_set_divider(i2c_dev);
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if (ret)
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return ret;
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2016-10-03 22:06:12 +02:00
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i2c_dev->curr_msg = msgs;
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i2c_dev->num_msgs = num;
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reinit_completion(&i2c_dev->completion);
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2013-02-12 03:47:56 +01:00
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2016-10-03 22:06:12 +02:00
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bcm2835_i2c_start_transfer(i2c_dev);
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2013-02-12 03:47:56 +01:00
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time_left = wait_for_completion_timeout(&i2c_dev->completion,
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2016-10-03 22:06:13 +02:00
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adap->timeout);
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2013-02-12 03:47:56 +01:00
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if (!time_left) {
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2016-10-03 22:06:09 +02:00
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C,
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|
|
BCM2835_I2C_C_CLEAR);
|
2013-02-12 03:47:56 +01:00
|
|
|
dev_err(i2c_dev->dev, "i2c transfer timed out\n");
|
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
|
|
|
|
2016-10-03 22:06:12 +02:00
|
|
|
if (!i2c_dev->msg_err)
|
|
|
|
return num;
|
2013-02-12 03:47:56 +01:00
|
|
|
|
2016-10-03 22:06:10 +02:00
|
|
|
dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
|
2013-02-12 03:47:56 +01:00
|
|
|
|
|
|
|
if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
|
|
|
|
return -EREMOTEIO;
|
|
|
|
|
2016-10-03 22:06:12 +02:00
|
|
|
return -EIO;
|
2013-02-12 03:47:56 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
|
|
|
|
{
|
|
|
|
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct i2c_algorithm bcm2835_i2c_algo = {
|
|
|
|
.master_xfer = bcm2835_i2c_xfer,
|
|
|
|
.functionality = bcm2835_i2c_func,
|
|
|
|
};
|
|
|
|
|
2015-10-29 12:34:25 +01:00
|
|
|
/*
|
|
|
|
* This HW was reported to have problems with clock stretching:
|
|
|
|
* http://www.advamation.com/knowhow/raspberrypi/rpi-i2c-bug.html
|
|
|
|
* https://www.raspberrypi.org/forums/viewtopic.php?p=146272
|
|
|
|
*/
|
|
|
|
static const struct i2c_adapter_quirks bcm2835_i2c_quirks = {
|
|
|
|
.flags = I2C_AQ_NO_CLK_STRETCH,
|
|
|
|
};
|
|
|
|
|
2013-02-12 03:47:56 +01:00
|
|
|
static int bcm2835_i2c_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct bcm2835_i2c_dev *i2c_dev;
|
2014-02-11 14:02:36 +01:00
|
|
|
struct resource *mem, *irq;
|
2013-02-12 03:47:56 +01:00
|
|
|
int ret;
|
|
|
|
struct i2c_adapter *adap;
|
|
|
|
|
|
|
|
i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
|
2014-05-13 03:51:58 +02:00
|
|
|
if (!i2c_dev)
|
2013-02-12 03:47:56 +01:00
|
|
|
return -ENOMEM;
|
|
|
|
platform_set_drvdata(pdev, i2c_dev);
|
|
|
|
i2c_dev->dev = &pdev->dev;
|
|
|
|
init_completion(&i2c_dev->completion);
|
|
|
|
|
|
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
2014-02-11 14:02:36 +01:00
|
|
|
i2c_dev->regs = devm_ioremap_resource(&pdev->dev, mem);
|
|
|
|
if (IS_ERR(i2c_dev->regs))
|
|
|
|
return PTR_ERR(i2c_dev->regs);
|
2013-02-12 03:47:56 +01:00
|
|
|
|
|
|
|
i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
|
|
|
|
if (IS_ERR(i2c_dev->clk)) {
|
2016-06-01 23:43:33 +02:00
|
|
|
if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER)
|
|
|
|
dev_err(&pdev->dev, "Could not get clock\n");
|
2013-02-12 03:47:56 +01:00
|
|
|
return PTR_ERR(i2c_dev->clk);
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
|
2016-10-03 22:06:14 +02:00
|
|
|
&i2c_dev->bus_clk_rate);
|
2013-02-12 03:47:56 +01:00
|
|
|
if (ret < 0) {
|
|
|
|
dev_warn(&pdev->dev,
|
|
|
|
"Could not read clock-frequency property\n");
|
2016-10-03 22:06:14 +02:00
|
|
|
i2c_dev->bus_clk_rate = 100000;
|
2013-02-12 03:47:56 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
|
if (!irq) {
|
|
|
|
dev_err(&pdev->dev, "No IRQ resource\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
i2c_dev->irq = irq->start;
|
|
|
|
|
|
|
|
ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED,
|
|
|
|
dev_name(&pdev->dev), i2c_dev);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "Could not request IRQ\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
adap = &i2c_dev->adapter;
|
|
|
|
i2c_set_adapdata(adap, i2c_dev);
|
|
|
|
adap->owner = THIS_MODULE;
|
2014-07-10 13:46:23 +02:00
|
|
|
adap->class = I2C_CLASS_DEPRECATED;
|
2013-02-12 03:47:56 +01:00
|
|
|
strlcpy(adap->name, "bcm2835 I2C adapter", sizeof(adap->name));
|
|
|
|
adap->algo = &bcm2835_i2c_algo;
|
|
|
|
adap->dev.parent = &pdev->dev;
|
2013-11-25 09:01:50 +01:00
|
|
|
adap->dev.of_node = pdev->dev.of_node;
|
2015-10-29 12:34:25 +01:00
|
|
|
adap->quirks = &bcm2835_i2c_quirks;
|
2013-02-12 03:47:56 +01:00
|
|
|
|
|
|
|
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
|
|
|
|
|
|
|
|
ret = i2c_add_adapter(adap);
|
|
|
|
if (ret)
|
|
|
|
free_irq(i2c_dev->irq, i2c_dev);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int bcm2835_i2c_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
|
|
|
|
|
|
|
|
free_irq(i2c_dev->irq, i2c_dev);
|
|
|
|
i2c_del_adapter(&i2c_dev->adapter);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id bcm2835_i2c_of_match[] = {
|
|
|
|
{ .compatible = "brcm,bcm2835-i2c" },
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match);
|
|
|
|
|
|
|
|
static struct platform_driver bcm2835_i2c_driver = {
|
|
|
|
.probe = bcm2835_i2c_probe,
|
|
|
|
.remove = bcm2835_i2c_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "i2c-bcm2835",
|
|
|
|
.of_match_table = bcm2835_i2c_of_match,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
module_platform_driver(bcm2835_i2c_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Stephen Warren <swarren@wwwdotorg.org>");
|
|
|
|
MODULE_DESCRIPTION("BCM2835 I2C bus adapter");
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
MODULE_ALIAS("platform:i2c-bcm2835");
|