2006-06-24 00:55:17 +02:00
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#include <linux/string.h>
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#include <linux/kernel.h>
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2007-05-01 08:40:36 +02:00
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#include <linux/of.h>
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2006-06-24 00:55:17 +02:00
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/slab.h>
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2007-05-02 18:38:57 +02:00
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#include <linux/errno.h>
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2009-06-04 11:00:02 +02:00
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#include <linux/irq.h>
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2007-05-02 18:38:57 +02:00
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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2009-08-17 02:13:32 +02:00
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#include <asm/leon.h>
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#include <asm/leon_amba.h>
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2006-06-24 00:55:17 +02:00
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2009-06-04 11:00:02 +02:00
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#include "of_device_common.h"
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2006-06-29 23:34:50 +02:00
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/*
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* PCI bus specific translator
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*/
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static int of_bus_pci_match(struct device_node *np)
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{
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[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
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if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) {
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/* Do not do PCI specific frobbing if the
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* PCI bridge lacks a ranges property. We
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* want to pass it through up to the next
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* parent as-is, not with the PCI translate
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* method which chops off the top address cell.
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*/
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if (!of_find_property(np, "ranges", NULL))
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return 0;
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return 1;
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}
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return 0;
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2006-06-29 23:34:50 +02:00
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}
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static void of_bus_pci_count_cells(struct device_node *np,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 3;
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if (sizec)
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*sizec = 2;
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}
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[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
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static int of_bus_pci_map(u32 *addr, const u32 *range,
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int na, int ns, int pna)
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2006-06-29 23:34:50 +02:00
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{
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[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
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u32 result[OF_MAX_ADDR_CELLS];
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int i;
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2006-06-29 23:34:50 +02:00
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/* Check address type match */
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if ((addr[0] ^ range[0]) & 0x03000000)
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[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
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return -EINVAL;
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2006-06-29 23:34:50 +02:00
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[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
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if (of_out_of_range(addr + 1, range + 1, range + na + pna,
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na - 1, ns))
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return -EINVAL;
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2006-06-29 23:34:50 +02:00
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[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
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/* Start with the parent range base. */
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memcpy(result, range + na, pna * 4);
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2006-06-29 23:34:50 +02:00
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[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
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/* Add in the child address offset, skipping high cell. */
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for (i = 0; i < na - 1; i++)
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result[pna - 1 - i] +=
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(addr[na - 1 - i] -
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range[na - 1 - i]);
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memcpy(addr, result, pna * 4);
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return 0;
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2006-06-29 23:34:50 +02:00
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}
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2008-08-29 06:02:58 +02:00
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static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags)
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2006-06-29 23:34:50 +02:00
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{
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u32 w = addr[0];
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2008-08-29 06:02:58 +02:00
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/* For PCI, we override whatever child busses may have used. */
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flags = 0;
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2006-06-29 23:34:50 +02:00
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switch((w >> 24) & 0x03) {
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case 0x01:
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flags |= IORESOURCE_IO;
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2008-08-29 06:02:58 +02:00
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break;
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2006-06-29 23:34:50 +02:00
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case 0x02: /* 32 bits */
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case 0x03: /* 64 bits */
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flags |= IORESOURCE_MEM;
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2008-08-29 06:02:58 +02:00
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break;
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2006-06-29 23:34:50 +02:00
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}
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if (w & 0x40000000)
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flags |= IORESOURCE_PREFETCH;
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return flags;
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}
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2008-09-11 08:38:51 +02:00
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static unsigned long of_bus_sbus_get_flags(const u32 *addr, unsigned long flags)
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2006-06-29 23:34:50 +02:00
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{
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return IORESOURCE_MEM;
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}
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2009-08-17 02:13:32 +02:00
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/*
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* AMBAPP bus specific translator
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*/
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static int of_bus_ambapp_match(struct device_node *np)
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{
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2010-02-15 16:10:28 +01:00
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return !strcmp(np->type, "ambapp");
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2009-08-17 02:13:32 +02:00
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}
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static void of_bus_ambapp_count_cells(struct device_node *child,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 1;
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if (sizec)
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*sizec = 1;
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}
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static int of_bus_ambapp_map(u32 *addr, const u32 *range,
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int na, int ns, int pna)
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{
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return of_bus_default_map(addr, range, na, ns, pna);
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}
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static unsigned long of_bus_ambapp_get_flags(const u32 *addr,
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unsigned long flags)
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{
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return IORESOURCE_MEM;
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}
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2006-06-29 23:34:50 +02:00
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/*
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* Array of bus specific translators
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*/
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static struct of_bus of_busses[] = {
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/* PCI */
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{
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.name = "pci",
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.addr_prop_name = "assigned-addresses",
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.match = of_bus_pci_match,
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|
|
.count_cells = of_bus_pci_count_cells,
|
|
|
|
.map = of_bus_pci_map,
|
|
|
|
.get_flags = of_bus_pci_get_flags,
|
|
|
|
},
|
|
|
|
/* SBUS */
|
|
|
|
{
|
|
|
|
.name = "sbus",
|
|
|
|
.addr_prop_name = "reg",
|
|
|
|
.match = of_bus_sbus_match,
|
|
|
|
.count_cells = of_bus_sbus_count_cells,
|
2009-06-04 11:00:02 +02:00
|
|
|
.map = of_bus_default_map,
|
2006-06-29 23:34:50 +02:00
|
|
|
.get_flags = of_bus_sbus_get_flags,
|
|
|
|
},
|
2009-08-17 02:13:32 +02:00
|
|
|
/* AMBA */
|
|
|
|
{
|
|
|
|
.name = "ambapp",
|
|
|
|
.addr_prop_name = "reg",
|
|
|
|
.match = of_bus_ambapp_match,
|
|
|
|
.count_cells = of_bus_ambapp_count_cells,
|
|
|
|
.map = of_bus_ambapp_map,
|
|
|
|
.get_flags = of_bus_ambapp_get_flags,
|
|
|
|
},
|
2006-06-29 23:34:50 +02:00
|
|
|
/* Default */
|
|
|
|
{
|
|
|
|
.name = "default",
|
|
|
|
.addr_prop_name = "reg",
|
|
|
|
.match = NULL,
|
|
|
|
.count_cells = of_bus_default_count_cells,
|
|
|
|
.map = of_bus_default_map,
|
|
|
|
.get_flags = of_bus_default_get_flags,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct of_bus *of_match_bus(struct device_node *np)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
|
|
|
|
if (!of_busses[i].match || of_busses[i].match(np))
|
|
|
|
return &of_busses[i];
|
|
|
|
BUG();
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init build_one_resource(struct device_node *parent,
|
|
|
|
struct of_bus *bus,
|
|
|
|
struct of_bus *pbus,
|
|
|
|
u32 *addr,
|
|
|
|
int na, int ns, int pna)
|
|
|
|
{
|
2007-03-29 09:47:23 +02:00
|
|
|
const u32 *ranges;
|
2006-06-29 23:34:50 +02:00
|
|
|
unsigned int rlen;
|
|
|
|
int rone;
|
|
|
|
|
|
|
|
ranges = of_get_property(parent, "ranges", &rlen);
|
|
|
|
if (ranges == NULL || rlen == 0) {
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
u32 result[OF_MAX_ADDR_CELLS];
|
|
|
|
int i;
|
|
|
|
|
|
|
|
memset(result, 0, pna * 4);
|
|
|
|
for (i = 0; i < na; i++)
|
|
|
|
result[pna - 1 - i] =
|
|
|
|
addr[na - 1 - i];
|
|
|
|
|
|
|
|
memcpy(addr, result, pna * 4);
|
|
|
|
return 0;
|
2006-06-29 23:34:50 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Now walk through the ranges */
|
|
|
|
rlen /= 4;
|
|
|
|
rone = na + pna + ns;
|
|
|
|
for (; rlen >= rone; rlen -= rone, ranges += rone) {
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
if (!bus->map(addr, ranges, na, ns, pna))
|
|
|
|
return 0;
|
2006-06-29 23:34:50 +02:00
|
|
|
}
|
|
|
|
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
return 1;
|
2006-06-29 23:34:50 +02:00
|
|
|
}
|
|
|
|
|
2008-09-03 11:04:41 +02:00
|
|
|
static int __init use_1to1_mapping(struct device_node *pp)
|
|
|
|
{
|
|
|
|
/* If we have a ranges property in the parent, use it. */
|
|
|
|
if (of_find_property(pp, "ranges", NULL) != NULL)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* Some SBUS devices use intermediate nodes to express
|
|
|
|
* hierarchy within the device itself. These aren't
|
|
|
|
* real bus nodes, and don't have a 'ranges' property.
|
|
|
|
* But, we should still pass the translation work up
|
|
|
|
* to the SBUS itself.
|
|
|
|
*/
|
|
|
|
if (!strcmp(pp->name, "dma") ||
|
|
|
|
!strcmp(pp->name, "espdma") ||
|
|
|
|
!strcmp(pp->name, "ledma") ||
|
|
|
|
!strcmp(pp->name, "lebuffer"))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
static int of_resource_verbose;
|
|
|
|
|
2010-07-23 00:04:30 +02:00
|
|
|
static void __init build_device_resources(struct platform_device *op,
|
2006-06-29 23:34:50 +02:00
|
|
|
struct device *parent)
|
|
|
|
{
|
2010-07-23 00:04:30 +02:00
|
|
|
struct platform_device *p_op;
|
2006-06-29 23:34:50 +02:00
|
|
|
struct of_bus *bus;
|
|
|
|
int na, ns;
|
|
|
|
int index, num_reg;
|
2007-03-29 09:47:23 +02:00
|
|
|
const void *preg;
|
2006-06-29 23:34:50 +02:00
|
|
|
|
|
|
|
if (!parent)
|
|
|
|
return;
|
|
|
|
|
2010-07-23 00:04:30 +02:00
|
|
|
p_op = to_platform_device(parent);
|
2010-04-14 01:12:29 +02:00
|
|
|
bus = of_match_bus(p_op->dev.of_node);
|
|
|
|
bus->count_cells(op->dev.of_node, &na, &ns);
|
2006-06-29 23:34:50 +02:00
|
|
|
|
2010-04-14 01:12:29 +02:00
|
|
|
preg = of_get_property(op->dev.of_node, bus->addr_prop_name, &num_reg);
|
2006-06-29 23:34:50 +02:00
|
|
|
if (!preg || num_reg == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Convert to num-cells. */
|
|
|
|
num_reg /= 4;
|
|
|
|
|
|
|
|
/* Conver to num-entries. */
|
|
|
|
num_reg /= na + ns;
|
|
|
|
|
2010-06-18 19:09:58 +02:00
|
|
|
op->resource = op->archdata.resource;
|
|
|
|
op->num_resources = num_reg;
|
2006-06-29 23:34:50 +02:00
|
|
|
for (index = 0; index < num_reg; index++) {
|
|
|
|
struct resource *r = &op->resource[index];
|
|
|
|
u32 addr[OF_MAX_ADDR_CELLS];
|
2007-03-29 09:47:23 +02:00
|
|
|
const u32 *reg = (preg + (index * ((na + ns) * 4)));
|
2010-04-14 01:12:29 +02:00
|
|
|
struct device_node *dp = op->dev.of_node;
|
|
|
|
struct device_node *pp = p_op->dev.of_node;
|
2007-03-01 08:20:12 +01:00
|
|
|
struct of_bus *pbus, *dbus;
|
2006-06-29 23:34:50 +02:00
|
|
|
u64 size, result = OF_BAD_ADDR;
|
|
|
|
unsigned long flags;
|
|
|
|
int dna, dns;
|
|
|
|
int pna, pns;
|
|
|
|
|
|
|
|
size = of_read_addr(reg + na, ns);
|
|
|
|
|
|
|
|
memcpy(addr, reg, na * 4);
|
|
|
|
|
2008-08-29 06:02:58 +02:00
|
|
|
flags = bus->get_flags(reg, 0);
|
|
|
|
|
2008-09-03 11:04:41 +02:00
|
|
|
if (use_1to1_mapping(pp)) {
|
2006-06-29 23:34:50 +02:00
|
|
|
result = of_read_addr(addr, na);
|
|
|
|
goto build_res;
|
|
|
|
}
|
|
|
|
|
|
|
|
dna = na;
|
|
|
|
dns = ns;
|
2007-03-01 08:20:12 +01:00
|
|
|
dbus = bus;
|
2006-06-29 23:34:50 +02:00
|
|
|
|
|
|
|
while (1) {
|
|
|
|
dp = pp;
|
|
|
|
pp = dp->parent;
|
|
|
|
if (!pp) {
|
|
|
|
result = of_read_addr(addr, dna);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
pbus = of_match_bus(pp);
|
|
|
|
pbus->count_cells(dp, &pna, &pns);
|
|
|
|
|
2007-03-01 08:20:12 +01:00
|
|
|
if (build_one_resource(dp, dbus, pbus, addr,
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
dna, dns, pna))
|
2006-06-29 23:34:50 +02:00
|
|
|
break;
|
|
|
|
|
2008-08-29 06:02:58 +02:00
|
|
|
flags = pbus->get_flags(addr, flags);
|
|
|
|
|
2006-06-29 23:34:50 +02:00
|
|
|
dna = pna;
|
|
|
|
dns = pns;
|
2007-03-01 08:20:12 +01:00
|
|
|
dbus = pbus;
|
2006-06-29 23:34:50 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
build_res:
|
|
|
|
memset(r, 0, sizeof(*r));
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
|
|
|
|
if (of_resource_verbose)
|
|
|
|
printk("%s reg[%d] -> %llx\n",
|
2010-04-14 01:12:29 +02:00
|
|
|
op->dev.of_node->full_name, index,
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
result);
|
|
|
|
|
2006-06-29 23:34:50 +02:00
|
|
|
if (result != OF_BAD_ADDR) {
|
2006-06-29 23:35:14 +02:00
|
|
|
r->start = result & 0xffffffff;
|
2006-06-29 23:34:50 +02:00
|
|
|
r->end = result + size - 1;
|
2006-06-29 23:35:14 +02:00
|
|
|
r->flags = flags | ((result >> 32ULL) & 0xffUL);
|
2006-06-29 23:34:50 +02:00
|
|
|
}
|
2010-04-14 01:12:29 +02:00
|
|
|
r->name = op->dev.of_node->name;
|
2006-06-29 23:34:50 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-07-23 00:04:30 +02:00
|
|
|
static struct platform_device * __init scan_one_device(struct device_node *dp,
|
2006-06-29 23:34:50 +02:00
|
|
|
struct device *parent)
|
|
|
|
{
|
2010-07-23 00:04:30 +02:00
|
|
|
struct platform_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
|
2007-03-29 09:47:23 +02:00
|
|
|
const struct linux_prom_irqs *intr;
|
2007-07-19 07:03:25 +02:00
|
|
|
struct dev_archdata *sd;
|
2006-06-30 00:08:02 +02:00
|
|
|
int len, i;
|
2006-06-29 23:34:50 +02:00
|
|
|
|
|
|
|
if (!op)
|
|
|
|
return NULL;
|
|
|
|
|
2007-07-19 07:03:25 +02:00
|
|
|
sd = &op->dev.archdata;
|
|
|
|
sd->op = op;
|
|
|
|
|
2010-04-14 01:12:28 +02:00
|
|
|
op->dev.of_node = dp;
|
2006-06-29 23:34:50 +02:00
|
|
|
|
2006-06-30 00:08:02 +02:00
|
|
|
intr = of_get_property(dp, "intr", &len);
|
|
|
|
if (intr) {
|
2010-06-18 19:09:58 +02:00
|
|
|
op->archdata.num_irqs = len / sizeof(struct linux_prom_irqs);
|
|
|
|
for (i = 0; i < op->archdata.num_irqs; i++)
|
|
|
|
op->archdata.irqs[i] = intr[i].pri;
|
2006-06-30 00:08:02 +02:00
|
|
|
} else {
|
2007-03-29 09:47:23 +02:00
|
|
|
const unsigned int *irq =
|
|
|
|
of_get_property(dp, "interrupts", &len);
|
2006-06-30 00:08:02 +02:00
|
|
|
|
|
|
|
if (irq) {
|
2010-06-18 19:09:58 +02:00
|
|
|
op->archdata.num_irqs = len / sizeof(unsigned int);
|
|
|
|
for (i = 0; i < op->archdata.num_irqs; i++)
|
|
|
|
op->archdata.irqs[i] = irq[i];
|
2006-06-30 00:08:02 +02:00
|
|
|
} else {
|
2010-06-18 19:09:58 +02:00
|
|
|
op->archdata.num_irqs = 0;
|
2006-06-30 00:08:02 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (sparc_cpu_model == sun4d) {
|
|
|
|
static int pil_to_sbus[] = {
|
|
|
|
0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
|
|
|
|
};
|
2006-07-18 06:39:09 +02:00
|
|
|
struct device_node *io_unit, *sbi = dp->parent;
|
2007-03-29 09:47:23 +02:00
|
|
|
const struct linux_prom_registers *regs;
|
2006-07-18 06:39:09 +02:00
|
|
|
int board, slot;
|
|
|
|
|
|
|
|
while (sbi) {
|
|
|
|
if (!strcmp(sbi->name, "sbi"))
|
|
|
|
break;
|
|
|
|
|
|
|
|
sbi = sbi->parent;
|
|
|
|
}
|
|
|
|
if (!sbi)
|
|
|
|
goto build_resources;
|
2006-06-30 00:08:02 +02:00
|
|
|
|
|
|
|
regs = of_get_property(dp, "reg", NULL);
|
2006-07-18 06:39:09 +02:00
|
|
|
if (!regs)
|
|
|
|
goto build_resources;
|
|
|
|
|
2006-06-30 00:08:02 +02:00
|
|
|
slot = regs->which_io;
|
|
|
|
|
2006-07-18 06:39:09 +02:00
|
|
|
/* If SBI's parent is not io-unit or the io-unit lacks
|
|
|
|
* a "board#" property, something is very wrong.
|
|
|
|
*/
|
|
|
|
if (!sbi->parent || strcmp(sbi->parent->name, "io-unit")) {
|
|
|
|
printk("%s: Error, parent is not io-unit.\n",
|
|
|
|
sbi->full_name);
|
|
|
|
goto build_resources;
|
|
|
|
}
|
|
|
|
io_unit = sbi->parent;
|
|
|
|
board = of_getintprop_default(io_unit, "board#", -1);
|
|
|
|
if (board == -1) {
|
|
|
|
printk("%s: Error, lacks board# property.\n",
|
|
|
|
io_unit->full_name);
|
|
|
|
goto build_resources;
|
|
|
|
}
|
|
|
|
|
2010-06-18 19:09:58 +02:00
|
|
|
for (i = 0; i < op->archdata.num_irqs; i++) {
|
|
|
|
int this_irq = op->archdata.irqs[i];
|
2006-06-30 00:08:02 +02:00
|
|
|
int sbusl = pil_to_sbus[this_irq];
|
|
|
|
|
|
|
|
if (sbusl)
|
|
|
|
this_irq = (((board + 1) << 5) +
|
|
|
|
(sbusl << 2) +
|
|
|
|
slot);
|
|
|
|
|
2010-06-18 19:09:58 +02:00
|
|
|
op->archdata.irqs[i] = this_irq;
|
2006-06-30 00:08:02 +02:00
|
|
|
}
|
|
|
|
}
|
2006-06-29 23:34:50 +02:00
|
|
|
|
2006-07-18 06:39:09 +02:00
|
|
|
build_resources:
|
2006-06-29 23:34:50 +02:00
|
|
|
build_device_resources(op, parent);
|
|
|
|
|
|
|
|
op->dev.parent = parent;
|
2010-06-08 15:48:21 +02:00
|
|
|
op->dev.bus = &platform_bus_type;
|
2006-06-29 23:34:50 +02:00
|
|
|
if (!parent)
|
2008-11-13 08:48:40 +01:00
|
|
|
dev_set_name(&op->dev, "root");
|
2006-06-29 23:34:50 +02:00
|
|
|
else
|
2010-01-28 22:06:53 +01:00
|
|
|
dev_set_name(&op->dev, "%08x", dp->phandle);
|
2006-06-29 23:34:50 +02:00
|
|
|
|
|
|
|
if (of_device_register(op)) {
|
|
|
|
printk("%s: Could not register of device.\n",
|
|
|
|
dp->full_name);
|
|
|
|
kfree(op);
|
|
|
|
op = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return op;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __init scan_tree(struct device_node *dp, struct device *parent)
|
|
|
|
{
|
|
|
|
while (dp) {
|
2010-07-23 00:04:30 +02:00
|
|
|
struct platform_device *op = scan_one_device(dp, parent);
|
2006-06-29 23:34:50 +02:00
|
|
|
|
|
|
|
if (op)
|
|
|
|
scan_tree(dp->child, &op->dev);
|
|
|
|
|
|
|
|
dp = dp->sibling;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-06-08 15:48:21 +02:00
|
|
|
static int __init scan_of_devices(void)
|
2006-06-29 23:34:50 +02:00
|
|
|
{
|
|
|
|
struct device_node *root = of_find_node_by_path("/");
|
2010-07-23 00:04:30 +02:00
|
|
|
struct platform_device *parent;
|
2006-06-29 23:34:50 +02:00
|
|
|
|
|
|
|
parent = scan_one_device(root, NULL);
|
|
|
|
if (!parent)
|
2010-06-08 15:48:21 +02:00
|
|
|
return 0;
|
2006-06-29 23:34:50 +02:00
|
|
|
|
|
|
|
scan_tree(root->child, &parent->dev);
|
2010-06-08 15:48:21 +02:00
|
|
|
return 0;
|
2006-06-29 23:34:50 +02:00
|
|
|
}
|
2010-06-08 15:48:21 +02:00
|
|
|
postcore_initcall(scan_of_devices);
|
2006-06-24 00:55:17 +02:00
|
|
|
|
[SPARC]: Fix OF register translations under sub-PCI busses.
There is an implicit assumption in the code that ranges will translate
to something that can fit in 2 32-bit cells, or a 64-bit value. For
certain kinds of things below PCI this isn't necessarily true.
Here is what the relevant OF device hierarchy looks like for one of
the serial controllers on an Ultra5:
Node 0xf005f1e0
ranges: 00000000.00000000.00000000.000001fe.01000000.00000000.01000000
01000000.00000000.00000000.000001fe.02000000.00000000.01000000
02000000.00000000.00000000.000001ff.00000000.00000001.00000000
03000000.00000000.00000000.000001ff.00000000.00000001.00000000
device_type: 'pci'
model: 'SUNW,sabre'
Node 0xf005f9d4
device_type: 'pci'
model: 'SUNW,simba'
Node 0xf0060d24
ranges: 00000010.00000000 82010810.00000000.f0000000 01000000
00000014.00000000 82010814.00000000.f1000000 00800000
name: 'ebus'
Node 0xf0062dac
reg: 00000014.003083f8.00000008 --> 0x1ff.f13083f8
device_type: 'serial'
name: 'su'
So the correct translation here is:
1) Match "su" register to second ranges entry of 'ebus', which translates
into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
gives us "82010814.00000000.f13083f8".
2) Pass-through "SUNW,simba" since it lacks ranges property
3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
controller node 'SUNW,sabre', and we arrive at the final physical
MMIO address of "0x1fff13083f8".
Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
value, and we couldn't perform a pass-thru on it either.
It was easiest to just stop splitting the ranges application operation
between two methods, ->map and ->translate, and just let ->map do all
the work. That way it would work purely on 32-bit cell arrays instead
of having to "return" some value like a u64.
It's still not %100 correct because the out-of-range check is still
done using the 64 least significant bits of the range and address.
But it does work for all the cases I've thrown at it so far.
Signed-off-by: David S. Miller <davem@davemloft.net>
2006-07-13 08:19:31 +02:00
|
|
|
static int __init of_debug(char *str)
|
|
|
|
{
|
|
|
|
int val = 0;
|
|
|
|
|
|
|
|
get_option(&str, &val);
|
|
|
|
if (val & 1)
|
|
|
|
of_resource_verbose = 1;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
__setup("of_debug=", of_debug);
|