2005-04-17 00:20:36 +02:00
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/*
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* sata_sil.c - Silicon Image SATA
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*
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* Maintained by: Jeff Garzik <jgarzik@pobox.com>
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* Please ALWAYS copy linux-ide@vger.kernel.org
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* on emails.
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*
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2005-08-29 02:18:39 +02:00
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* Copyright 2003-2005 Red Hat, Inc.
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2005-04-17 00:20:36 +02:00
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* Copyright 2003 Benjamin Herrenschmidt
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*
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2005-08-29 02:18:39 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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* libata documentation is available via 'make {ps|pdf}docs',
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* as Documentation/DocBook/libata.*
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2005-04-17 00:20:36 +02:00
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*
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2005-08-27 01:46:24 +02:00
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* Documentation for SiI 3112:
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* http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2
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*
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* Other errata and documentation available under NDA.
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*
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2005-04-17 00:20:36 +02:00
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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2005-10-30 20:39:11 +01:00
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#include <linux/device.h>
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2005-04-17 00:20:36 +02:00
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "sata_sil"
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2007-08-31 10:54:06 +02:00
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#define DRV_VERSION "2.3"
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2005-04-17 00:20:36 +02:00
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enum {
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2007-02-01 07:06:36 +01:00
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SIL_MMIO_BAR = 5,
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2006-03-05 08:03:52 +01:00
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/*
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* host flags
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*/
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2006-06-26 14:23:52 +02:00
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SIL_FLAG_NO_SATA_IRQ = (1 << 28),
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2006-02-25 05:52:30 +01:00
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SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29),
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2005-08-23 00:27:25 +02:00
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SIL_FLAG_MOD15WRITE = (1 << 30),
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2006-05-31 11:27:53 +02:00
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2006-08-24 09:19:22 +02:00
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SIL_DFL_PORT_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
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2007-08-06 11:36:23 +02:00
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ATA_FLAG_MMIO,
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SIL_DFL_LINK_FLAGS = ATA_LFLAG_HRST_TO_RESUME,
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2005-08-23 00:27:25 +02:00
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2006-03-05 08:03:52 +01:00
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/*
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* Controller IDs
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*/
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2005-04-17 00:20:36 +02:00
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sil_3112 = 0,
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2006-06-26 14:23:52 +02:00
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sil_3112_no_sata_irq = 1,
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sil_3512 = 2,
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sil_3114 = 3,
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2005-04-17 00:20:36 +02:00
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2006-03-05 08:03:52 +01:00
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/*
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* Register offsets
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*/
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2005-04-17 00:20:36 +02:00
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SIL_SYSCFG = 0x48,
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2006-03-05 08:03:52 +01:00
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/*
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* Register bits
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*/
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/* SYSCFG */
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2005-04-17 00:20:36 +02:00
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SIL_MASK_IDE0_INT = (1 << 22),
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SIL_MASK_IDE1_INT = (1 << 23),
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SIL_MASK_IDE2_INT = (1 << 24),
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SIL_MASK_IDE3_INT = (1 << 25),
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SIL_MASK_2PORT = SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT,
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SIL_MASK_4PORT = SIL_MASK_2PORT |
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SIL_MASK_IDE2_INT | SIL_MASK_IDE3_INT,
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2006-03-05 08:03:52 +01:00
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/* BMDMA/BMDMA2 */
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2005-04-17 00:20:36 +02:00
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SIL_INTR_STEERING = (1 << 1),
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2006-03-05 08:03:52 +01:00
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2006-05-31 11:27:53 +02:00
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SIL_DMA_ENABLE = (1 << 0), /* DMA run switch */
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SIL_DMA_RDWR = (1 << 3), /* DMA Rd-Wr */
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SIL_DMA_SATA_IRQ = (1 << 4), /* OR of all SATA IRQs */
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SIL_DMA_ACTIVE = (1 << 16), /* DMA running */
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SIL_DMA_ERROR = (1 << 17), /* PCI bus error */
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SIL_DMA_COMPLETE = (1 << 18), /* cmd complete / IRQ pending */
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SIL_DMA_N_SATA_IRQ = (1 << 6), /* SATA_IRQ for the next channel */
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SIL_DMA_N_ACTIVE = (1 << 24), /* ACTIVE for the next channel */
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SIL_DMA_N_ERROR = (1 << 25), /* ERROR for the next channel */
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SIL_DMA_N_COMPLETE = (1 << 26), /* COMPLETE for the next channel */
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/* SIEN */
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SIL_SIEN_N = (1 << 16), /* triggered by SError.N */
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2006-03-05 08:03:52 +01:00
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/*
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* Others
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*/
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2005-04-17 00:20:36 +02:00
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SIL_QUIRK_MOD15WRITE = (1 << 0),
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SIL_QUIRK_UDMA5MAX = (1 << 1),
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};
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static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
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2006-08-15 07:49:30 +02:00
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#ifdef CONFIG_PM
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2006-07-03 09:07:27 +02:00
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static int sil_pci_device_resume(struct pci_dev *pdev);
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2006-08-15 07:49:30 +02:00
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#endif
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2007-03-02 01:56:15 +01:00
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static void sil_dev_config(struct ata_device *dev);
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2007-07-16 07:29:40 +02:00
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static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
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static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
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2007-08-06 11:36:23 +02:00
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static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed);
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2006-05-15 13:58:27 +02:00
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static void sil_freeze(struct ata_port *ap);
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static void sil_thaw(struct ata_port *ap);
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2005-04-17 00:20:36 +02:00
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2005-08-30 11:42:52 +02:00
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2005-11-10 17:04:11 +01:00
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static const struct pci_device_id sil_pci_tbl[] = {
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2006-09-28 04:20:11 +02:00
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{ PCI_VDEVICE(CMD, 0x3112), sil_3112 },
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{ PCI_VDEVICE(CMD, 0x0240), sil_3112 },
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{ PCI_VDEVICE(CMD, 0x3512), sil_3512 },
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{ PCI_VDEVICE(CMD, 0x3114), sil_3114 },
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{ PCI_VDEVICE(ATI, 0x436e), sil_3112 },
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{ PCI_VDEVICE(ATI, 0x4379), sil_3112_no_sata_irq },
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{ PCI_VDEVICE(ATI, 0x437a), sil_3112_no_sata_irq },
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2005-04-17 00:20:36 +02:00
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{ } /* terminate list */
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};
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/* TODO firmware versions should be added - eric */
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static const struct sil_drivelist {
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const char * product;
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unsigned int quirk;
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} sil_blacklist [] = {
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{ "ST320012AS", SIL_QUIRK_MOD15WRITE },
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{ "ST330013AS", SIL_QUIRK_MOD15WRITE },
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{ "ST340017AS", SIL_QUIRK_MOD15WRITE },
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{ "ST360015AS", SIL_QUIRK_MOD15WRITE },
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{ "ST380023AS", SIL_QUIRK_MOD15WRITE },
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{ "ST3120023AS", SIL_QUIRK_MOD15WRITE },
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{ "ST340014ASL", SIL_QUIRK_MOD15WRITE },
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{ "ST360014ASL", SIL_QUIRK_MOD15WRITE },
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{ "ST380011ASL", SIL_QUIRK_MOD15WRITE },
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{ "ST3120022ASL", SIL_QUIRK_MOD15WRITE },
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{ "ST3160021ASL", SIL_QUIRK_MOD15WRITE },
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{ "Maxtor 4D060H3", SIL_QUIRK_UDMA5MAX },
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{ }
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};
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static struct pci_driver sil_pci_driver = {
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.name = DRV_NAME,
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.id_table = sil_pci_tbl,
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.probe = sil_init_one,
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.remove = ata_pci_remove_one,
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2006-08-15 07:49:30 +02:00
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#ifdef CONFIG_PM
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2006-07-03 09:07:27 +02:00
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.suspend = ata_pci_device_suspend,
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.resume = sil_pci_device_resume,
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2006-08-15 07:49:30 +02:00
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#endif
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2005-04-17 00:20:36 +02:00
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};
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2005-11-07 06:59:37 +01:00
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static struct scsi_host_template sil_sht = {
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2005-04-17 00:20:36 +02:00
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.module = THIS_MODULE,
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.name = DRV_NAME,
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.ioctl = ata_scsi_ioctl,
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.queuecommand = ata_scsi_queuecmd,
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.can_queue = ATA_DEF_QUEUE,
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.this_id = ATA_SHT_THIS_ID,
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.sg_tablesize = LIBATA_MAX_PRD,
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.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
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.emulated = ATA_SHT_EMULATED,
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.use_clustering = ATA_SHT_USE_CLUSTERING,
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.proc_name = DRV_NAME,
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.dma_boundary = ATA_DMA_BOUNDARY,
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.slave_configure = ata_scsi_slave_config,
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2006-05-31 11:28:09 +02:00
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.slave_destroy = ata_scsi_slave_destroy,
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2005-04-17 00:20:36 +02:00
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.bios_param = ata_std_bios_param,
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};
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2005-10-22 20:27:05 +02:00
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static const struct ata_port_operations sil_ops = {
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2005-04-17 00:20:36 +02:00
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.dev_config = sil_dev_config,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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2007-03-09 00:09:12 +01:00
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.set_mode = sil_set_mode,
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2005-04-17 00:20:36 +02:00
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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2007-02-01 07:06:36 +01:00
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.data_xfer = ata_data_xfer,
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2006-05-15 13:58:27 +02:00
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.freeze = sil_freeze,
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.thaw = sil_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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2005-04-17 00:20:36 +02:00
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.irq_clear = ata_bmdma_irq_clear,
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2007-01-26 08:27:58 +01:00
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.irq_on = ata_irq_on,
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2005-04-17 00:20:36 +02:00
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.scr_read = sil_scr_read,
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.scr_write = sil_scr_write,
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.port_start = ata_port_start,
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};
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2005-11-28 10:06:23 +01:00
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static const struct ata_port_info sil_port_info[] = {
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2005-04-17 00:20:36 +02:00
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/* sil_3112 */
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2005-08-23 00:27:25 +02:00
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{
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2006-08-24 09:19:22 +02:00
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.flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE,
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2007-08-06 11:36:23 +02:00
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.link_flags = SIL_DFL_LINK_FLAGS,
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2005-08-23 00:27:25 +02:00
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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2007-07-09 18:16:50 +02:00
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.udma_mask = ATA_UDMA5,
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2005-08-23 00:27:25 +02:00
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.port_ops = &sil_ops,
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2006-02-25 05:52:30 +01:00
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},
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2006-06-26 14:23:52 +02:00
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/* sil_3112_no_sata_irq */
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{
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2006-08-24 09:19:22 +02:00
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.flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE |
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2006-06-26 14:23:52 +02:00
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SIL_FLAG_NO_SATA_IRQ,
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2007-08-06 11:36:23 +02:00
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.link_flags = SIL_DFL_LINK_FLAGS,
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2006-06-26 14:23:52 +02:00
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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2007-07-09 18:16:50 +02:00
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.udma_mask = ATA_UDMA5,
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2006-06-26 14:23:52 +02:00
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.port_ops = &sil_ops,
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},
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2006-02-25 05:52:30 +01:00
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/* sil_3512 */
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2005-04-17 00:20:36 +02:00
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{
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2006-08-24 09:19:22 +02:00
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.flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT,
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2007-08-06 11:36:23 +02:00
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.link_flags = SIL_DFL_LINK_FLAGS,
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2006-02-25 05:52:30 +01:00
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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2007-07-09 18:16:50 +02:00
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.udma_mask = ATA_UDMA5,
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2006-02-25 05:52:30 +01:00
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.port_ops = &sil_ops,
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},
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/* sil_3114 */
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2005-04-17 00:20:36 +02:00
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{
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2006-08-24 09:19:22 +02:00
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.flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT,
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2007-08-06 11:36:23 +02:00
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.link_flags = SIL_DFL_LINK_FLAGS,
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2005-04-17 00:20:36 +02:00
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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2007-07-09 18:16:50 +02:00
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.udma_mask = ATA_UDMA5,
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2005-04-17 00:20:36 +02:00
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.port_ops = &sil_ops,
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},
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};
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/* per-port register offsets */
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/* TODO: we can probably calculate rather than use a table */
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static const struct {
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unsigned long tf; /* ATA taskfile register block */
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unsigned long ctl; /* ATA control/altstatus register block */
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unsigned long bmdma; /* DMA register block */
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2006-05-31 11:27:53 +02:00
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unsigned long bmdma2; /* DMA register block #2 */
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2006-03-05 08:03:52 +01:00
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unsigned long fifo_cfg; /* FIFO Valid Byte Count and Control */
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2005-04-17 00:20:36 +02:00
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unsigned long scr; /* SATA control register block */
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unsigned long sien; /* SATA Interrupt Enable register */
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unsigned long xfer_mode;/* data transfer mode register */
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2006-02-25 05:52:30 +01:00
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unsigned long sfis_cfg; /* SATA FIS reception config register */
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2005-04-17 00:20:36 +02:00
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} sil_port[] = {
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/* port 0 ... */
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2007-05-26 22:35:42 +02:00
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|
|
/* tf ctl bmdma bmdma2 fifo scr sien mode sfis */
|
|
|
|
{ 0x80, 0x8A, 0x0, 0x10, 0x40, 0x100, 0x148, 0xb4, 0x14c },
|
|
|
|
{ 0xC0, 0xCA, 0x8, 0x18, 0x44, 0x180, 0x1c8, 0xf4, 0x1cc },
|
2006-05-31 11:27:53 +02:00
|
|
|
{ 0x280, 0x28A, 0x200, 0x210, 0x240, 0x300, 0x348, 0x2b4, 0x34c },
|
|
|
|
{ 0x2C0, 0x2CA, 0x208, 0x218, 0x244, 0x380, 0x3c8, 0x2f4, 0x3cc },
|
2005-04-17 00:20:36 +02:00
|
|
|
/* ... port 3 */
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Jeff Garzik");
|
|
|
|
MODULE_DESCRIPTION("low-level driver for Silicon Image SATA controller");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pci, sil_pci_tbl);
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
|
2006-01-27 22:50:27 +01:00
|
|
|
static int slow_down = 0;
|
|
|
|
module_param(slow_down, int, 0444);
|
|
|
|
MODULE_PARM_DESC(slow_down, "Sledgehammer used to work around random problems, by limiting commands to 15 sectors (0=off, 1=on)");
|
|
|
|
|
2005-08-30 11:42:52 +02:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
static unsigned char sil_get_device_cache_line(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
u8 cache_line = 0;
|
|
|
|
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line);
|
|
|
|
return cache_line;
|
|
|
|
}
|
|
|
|
|
2007-03-09 00:09:12 +01:00
|
|
|
/**
|
|
|
|
* sil_set_mode - wrap set_mode functions
|
2007-08-06 11:36:23 +02:00
|
|
|
* @link: link to set up
|
2007-03-09 00:09:12 +01:00
|
|
|
* @r_failed: returned device when we fail
|
|
|
|
*
|
|
|
|
* Wrap the libata method for device setup as after the setup we need
|
|
|
|
* to inspect the results and do some configuration work
|
|
|
|
*/
|
|
|
|
|
2007-08-06 11:36:23 +02:00
|
|
|
static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
2007-08-06 11:36:23 +02:00
|
|
|
struct ata_port *ap = link->ap;
|
|
|
|
void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];
|
2007-02-01 07:06:36 +01:00
|
|
|
void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode;
|
2007-08-06 11:36:23 +02:00
|
|
|
struct ata_device *dev;
|
2007-08-06 11:36:23 +02:00
|
|
|
u32 tmp, dev_mode[2] = { };
|
2007-03-09 00:09:12 +01:00
|
|
|
int rc;
|
2007-05-22 02:14:23 +02:00
|
|
|
|
2007-08-06 11:36:23 +02:00
|
|
|
rc = ata_do_set_mode(link, r_failed);
|
2007-03-09 00:09:12 +01:00
|
|
|
if (rc)
|
|
|
|
return rc;
|
2005-04-17 00:20:36 +02:00
|
|
|
|
2007-08-06 11:36:23 +02:00
|
|
|
ata_link_for_each_dev(dev, link) {
|
2006-03-31 18:38:18 +02:00
|
|
|
if (!ata_dev_enabled(dev))
|
2007-08-06 11:36:23 +02:00
|
|
|
dev_mode[dev->devno] = 0; /* PIO0/1/2 */
|
2005-04-17 00:20:36 +02:00
|
|
|
else if (dev->flags & ATA_DFLAG_PIO)
|
2007-08-06 11:36:23 +02:00
|
|
|
dev_mode[dev->devno] = 1; /* PIO3/4 */
|
2005-04-17 00:20:36 +02:00
|
|
|
else
|
2007-08-06 11:36:23 +02:00
|
|
|
dev_mode[dev->devno] = 3; /* UDMA */
|
2005-04-17 00:20:36 +02:00
|
|
|
/* value 2 indicates MDMA */
|
|
|
|
}
|
|
|
|
|
|
|
|
tmp = readl(addr);
|
|
|
|
tmp &= ~((1<<5) | (1<<4) | (1<<1) | (1<<0));
|
|
|
|
tmp |= dev_mode[0];
|
|
|
|
tmp |= (dev_mode[1] << 4);
|
|
|
|
writel(tmp, addr);
|
|
|
|
readl(addr); /* flush */
|
2007-03-09 00:09:12 +01:00
|
|
|
return 0;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2007-02-01 07:06:36 +01:00
|
|
|
static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_reg)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
2007-02-01 07:06:36 +01:00
|
|
|
void __iomem *offset = ap->ioaddr.scr_addr;
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
switch (sc_reg) {
|
|
|
|
case SCR_STATUS:
|
|
|
|
return offset + 4;
|
|
|
|
case SCR_ERROR:
|
|
|
|
return offset + 8;
|
|
|
|
case SCR_CONTROL:
|
|
|
|
return offset;
|
|
|
|
default:
|
|
|
|
/* do nothing */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2007-02-16 10:40:06 +01:00
|
|
|
return NULL;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2007-07-16 07:29:40 +02:00
|
|
|
static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
2007-02-01 07:06:36 +01:00
|
|
|
void __iomem *mmio = sil_scr_addr(ap, sc_reg);
|
2007-07-16 07:29:40 +02:00
|
|
|
|
|
|
|
if (mmio) {
|
|
|
|
*val = readl(mmio);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return -EINVAL;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2007-07-16 07:29:40 +02:00
|
|
|
static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
2007-02-01 07:06:36 +01:00
|
|
|
void __iomem *mmio = sil_scr_addr(ap, sc_reg);
|
2007-07-16 07:29:40 +02:00
|
|
|
|
|
|
|
if (mmio) {
|
2005-04-17 00:20:36 +02:00
|
|
|
writel(val, mmio);
|
2007-07-16 07:29:40 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return -EINVAL;
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2006-05-31 11:27:55 +02:00
|
|
|
static void sil_host_intr(struct ata_port *ap, u32 bmdma2)
|
|
|
|
{
|
2007-08-06 11:36:22 +02:00
|
|
|
struct ata_eh_info *ehi = &ap->link.eh_info;
|
|
|
|
struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag);
|
2006-05-31 11:27:55 +02:00
|
|
|
u8 status;
|
|
|
|
|
2006-05-31 11:28:16 +02:00
|
|
|
if (unlikely(bmdma2 & SIL_DMA_SATA_IRQ)) {
|
2006-06-12 11:45:55 +02:00
|
|
|
u32 serror;
|
|
|
|
|
|
|
|
/* SIEN doesn't mask SATA IRQs on some 3112s. Those
|
|
|
|
* controllers continue to assert IRQ as long as
|
|
|
|
* SError bits are pending. Clear SError immediately.
|
|
|
|
*/
|
2007-07-16 07:29:40 +02:00
|
|
|
sil_scr_read(ap, SCR_ERROR, &serror);
|
2006-06-12 11:45:55 +02:00
|
|
|
sil_scr_write(ap, SCR_ERROR, serror);
|
|
|
|
|
|
|
|
/* Trigger hotplug and accumulate SError only if the
|
|
|
|
* port isn't already frozen. Otherwise, PHY events
|
|
|
|
* during hardreset makes controllers with broken SIEN
|
|
|
|
* repeat probing needlessly.
|
|
|
|
*/
|
2006-06-28 18:29:30 +02:00
|
|
|
if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
|
2007-08-06 11:36:22 +02:00
|
|
|
ata_ehi_hotplugged(&ap->link.eh_info);
|
|
|
|
ap->link.eh_info.serror |= serror;
|
2006-06-12 11:45:55 +02:00
|
|
|
}
|
|
|
|
|
2006-05-31 11:28:16 +02:00
|
|
|
goto freeze;
|
|
|
|
}
|
|
|
|
|
2007-02-24 14:30:36 +01:00
|
|
|
if (unlikely(!qc))
|
2006-05-31 11:27:55 +02:00
|
|
|
goto freeze;
|
|
|
|
|
2007-02-24 14:30:36 +01:00
|
|
|
if (unlikely(qc->tf.flags & ATA_TFLAG_POLLING)) {
|
|
|
|
/* this sometimes happens, just clear IRQ */
|
|
|
|
ata_chk_status(ap);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2006-05-31 11:27:55 +02:00
|
|
|
/* Check whether we are expecting interrupt in this state */
|
|
|
|
switch (ap->hsm_task_state) {
|
|
|
|
case HSM_ST_FIRST:
|
|
|
|
/* Some pre-ATAPI-4 devices assert INTRQ
|
|
|
|
* at this state when ready to receive CDB.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Check the ATA_DFLAG_CDB_INTR flag is enough here.
|
|
|
|
* The flag was turned on only for atapi devices.
|
|
|
|
* No need to check is_atapi_taskfile(&qc->tf) again.
|
|
|
|
*/
|
|
|
|
if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
|
|
|
|
goto err_hsm;
|
|
|
|
break;
|
|
|
|
case HSM_ST_LAST:
|
|
|
|
if (qc->tf.protocol == ATA_PROT_DMA ||
|
|
|
|
qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
|
|
|
|
/* clear DMA-Start bit */
|
|
|
|
ap->ops->bmdma_stop(qc);
|
|
|
|
|
|
|
|
if (bmdma2 & SIL_DMA_ERROR) {
|
|
|
|
qc->err_mask |= AC_ERR_HOST_BUS;
|
|
|
|
ap->hsm_task_state = HSM_ST_ERR;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case HSM_ST:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto err_hsm;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* check main status, clearing INTRQ */
|
|
|
|
status = ata_chk_status(ap);
|
|
|
|
if (unlikely(status & ATA_BUSY))
|
|
|
|
goto err_hsm;
|
|
|
|
|
|
|
|
/* ack bmdma irq events */
|
|
|
|
ata_bmdma_irq_clear(ap);
|
|
|
|
|
|
|
|
/* kick HSM in the ass */
|
|
|
|
ata_hsm_move(ap, qc, status, 0);
|
|
|
|
|
2006-11-17 04:06:21 +01:00
|
|
|
if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
|
|
|
|
qc->tf.protocol == ATA_PROT_ATAPI_DMA))
|
|
|
|
ata_ehi_push_desc(ehi, "BMDMA2 stat 0x%x", bmdma2);
|
|
|
|
|
2006-05-31 11:27:55 +02:00
|
|
|
return;
|
|
|
|
|
|
|
|
err_hsm:
|
|
|
|
qc->err_mask |= AC_ERR_HSM;
|
|
|
|
freeze:
|
|
|
|
ata_port_freeze(ap);
|
|
|
|
}
|
|
|
|
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 15:55:46 +02:00
|
|
|
static irqreturn_t sil_interrupt(int irq, void *dev_instance)
|
2006-05-31 11:27:55 +02:00
|
|
|
{
|
2006-08-24 09:19:22 +02:00
|
|
|
struct ata_host *host = dev_instance;
|
2007-02-01 07:06:36 +01:00
|
|
|
void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR];
|
2006-05-31 11:27:55 +02:00
|
|
|
int handled = 0;
|
|
|
|
int i;
|
|
|
|
|
2006-08-24 09:19:22 +02:00
|
|
|
spin_lock(&host->lock);
|
2006-05-31 11:27:55 +02:00
|
|
|
|
2006-08-24 09:19:22 +02:00
|
|
|
for (i = 0; i < host->n_ports; i++) {
|
|
|
|
struct ata_port *ap = host->ports[i];
|
2006-05-31 11:27:55 +02:00
|
|
|
u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2);
|
|
|
|
|
|
|
|
if (unlikely(!ap || ap->flags & ATA_FLAG_DISABLED))
|
|
|
|
continue;
|
|
|
|
|
2006-06-26 14:23:52 +02:00
|
|
|
/* turn off SATA_IRQ if not supported */
|
|
|
|
if (ap->flags & SIL_FLAG_NO_SATA_IRQ)
|
|
|
|
bmdma2 &= ~SIL_DMA_SATA_IRQ;
|
|
|
|
|
2006-06-12 07:18:51 +02:00
|
|
|
if (bmdma2 == 0xffffffff ||
|
|
|
|
!(bmdma2 & (SIL_DMA_COMPLETE | SIL_DMA_SATA_IRQ)))
|
2006-05-31 11:27:55 +02:00
|
|
|
continue;
|
|
|
|
|
|
|
|
sil_host_intr(ap, bmdma2);
|
|
|
|
handled = 1;
|
|
|
|
}
|
|
|
|
|
2006-08-24 09:19:22 +02:00
|
|
|
spin_unlock(&host->lock);
|
2006-05-31 11:27:55 +02:00
|
|
|
|
|
|
|
return IRQ_RETVAL(handled);
|
|
|
|
}
|
|
|
|
|
2006-05-15 13:58:27 +02:00
|
|
|
static void sil_freeze(struct ata_port *ap)
|
|
|
|
{
|
2007-02-01 07:06:36 +01:00
|
|
|
void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];
|
2006-05-15 13:58:27 +02:00
|
|
|
u32 tmp;
|
|
|
|
|
2006-05-31 11:28:16 +02:00
|
|
|
/* global IRQ mask doesn't block SATA IRQ, turn off explicitly */
|
|
|
|
writel(0, mmio_base + sil_port[ap->port_no].sien);
|
|
|
|
|
2006-05-15 13:58:27 +02:00
|
|
|
/* plug IRQ */
|
|
|
|
tmp = readl(mmio_base + SIL_SYSCFG);
|
|
|
|
tmp |= SIL_MASK_IDE0_INT << ap->port_no;
|
|
|
|
writel(tmp, mmio_base + SIL_SYSCFG);
|
|
|
|
readl(mmio_base + SIL_SYSCFG); /* flush */
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sil_thaw(struct ata_port *ap)
|
|
|
|
{
|
2007-02-01 07:06:36 +01:00
|
|
|
void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];
|
2006-05-15 13:58:27 +02:00
|
|
|
u32 tmp;
|
|
|
|
|
|
|
|
/* clear IRQ */
|
|
|
|
ata_chk_status(ap);
|
|
|
|
ata_bmdma_irq_clear(ap);
|
|
|
|
|
2006-06-26 14:23:52 +02:00
|
|
|
/* turn on SATA IRQ if supported */
|
|
|
|
if (!(ap->flags & SIL_FLAG_NO_SATA_IRQ))
|
|
|
|
writel(SIL_SIEN_N, mmio_base + sil_port[ap->port_no].sien);
|
2006-05-31 11:28:16 +02:00
|
|
|
|
2006-05-15 13:58:27 +02:00
|
|
|
/* turn on IRQ */
|
|
|
|
tmp = readl(mmio_base + SIL_SYSCFG);
|
|
|
|
tmp &= ~(SIL_MASK_IDE0_INT << ap->port_no);
|
|
|
|
writel(tmp, mmio_base + SIL_SYSCFG);
|
|
|
|
}
|
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
/**
|
|
|
|
* sil_dev_config - Apply device/host-specific errata fixups
|
|
|
|
* @dev: Device to be examined
|
|
|
|
*
|
|
|
|
* After the IDENTIFY [PACKET] DEVICE step is complete, and a
|
|
|
|
* device is known to be present, this function is called.
|
|
|
|
* We apply two errata fixups which are specific to Silicon Image,
|
|
|
|
* a Seagate and a Maxtor fixup.
|
|
|
|
*
|
|
|
|
* For certain Seagate devices, we must limit the maximum sectors
|
|
|
|
* to under 8K.
|
|
|
|
*
|
|
|
|
* For certain Maxtor devices, we must not program the drive
|
|
|
|
* beyond udma5.
|
|
|
|
*
|
|
|
|
* Both fixups are unfairly pessimistic. As soon as I get more
|
|
|
|
* information on these errata, I will create a more exhaustive
|
|
|
|
* list, and apply the fixups to only the specific
|
|
|
|
* devices/hosts/firmwares that need it.
|
|
|
|
*
|
|
|
|
* 20040111 - Seagate drives affected by the Mod15Write bug are blacklisted
|
|
|
|
* The Maxtor quirk is in the blacklist, but I'm keeping the original
|
|
|
|
* pessimistic fix for the following reasons...
|
|
|
|
* - There seems to be less info on it, only one device gleaned off the
|
|
|
|
* Windows driver, maybe only one is affected. More info would be greatly
|
|
|
|
* appreciated.
|
|
|
|
* - But then again UDMA5 is hardly anything to complain about
|
|
|
|
*/
|
2007-03-02 01:56:15 +01:00
|
|
|
static void sil_dev_config(struct ata_device *dev)
|
2005-04-17 00:20:36 +02:00
|
|
|
{
|
2007-08-06 11:36:22 +02:00
|
|
|
struct ata_port *ap = dev->link->ap;
|
|
|
|
int print_info = ap->link.eh_context.i.flags & ATA_EHI_PRINTINFO;
|
2005-04-17 00:20:36 +02:00
|
|
|
unsigned int n, quirks = 0;
|
2007-01-02 12:18:49 +01:00
|
|
|
unsigned char model_num[ATA_ID_PROD_LEN + 1];
|
2005-04-17 00:20:36 +02:00
|
|
|
|
2007-01-02 12:18:49 +01:00
|
|
|
ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
|
2005-04-17 00:20:36 +02:00
|
|
|
|
2005-07-31 19:13:24 +02:00
|
|
|
for (n = 0; sil_blacklist[n].product; n++)
|
2006-02-12 14:47:04 +01:00
|
|
|
if (!strcmp(sil_blacklist[n].product, model_num)) {
|
2005-04-17 00:20:36 +02:00
|
|
|
quirks = sil_blacklist[n].quirk;
|
|
|
|
break;
|
|
|
|
}
|
2005-07-31 19:13:24 +02:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
/* limit requests to 15 sectors */
|
2006-01-27 22:50:27 +01:00
|
|
|
if (slow_down ||
|
|
|
|
((ap->flags & SIL_FLAG_MOD15WRITE) &&
|
|
|
|
(quirks & SIL_QUIRK_MOD15WRITE))) {
|
2006-11-01 10:38:52 +01:00
|
|
|
if (print_info)
|
|
|
|
ata_dev_printk(dev, KERN_INFO, "applying Seagate "
|
|
|
|
"errata fix (mod15write workaround)\n");
|
2006-02-12 15:32:59 +01:00
|
|
|
dev->max_sectors = 15;
|
2005-04-17 00:20:36 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* limit to udma5 */
|
|
|
|
if (quirks & SIL_QUIRK_UDMA5MAX) {
|
2006-11-01 10:38:52 +01:00
|
|
|
if (print_info)
|
|
|
|
ata_dev_printk(dev, KERN_INFO, "applying Maxtor "
|
|
|
|
"errata fix %s\n", model_num);
|
2006-03-24 06:07:50 +01:00
|
|
|
dev->udma_mask &= ATA_UDMA5;
|
2005-04-17 00:20:36 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
static void sil_init_controller(struct ata_host *host)
|
2006-07-03 09:07:27 +02:00
|
|
|
{
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
struct pci_dev *pdev = to_pci_dev(host->dev);
|
|
|
|
void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR];
|
2006-07-03 09:07:27 +02:00
|
|
|
u8 cls;
|
|
|
|
u32 tmp;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Initialize FIFO PCI bus arbitration */
|
|
|
|
cls = sil_get_device_cache_line(pdev);
|
|
|
|
if (cls) {
|
|
|
|
cls >>= 3;
|
|
|
|
cls++; /* cls = (line_size/8)+1 */
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
for (i = 0; i < host->n_ports; i++)
|
2006-07-03 09:07:27 +02:00
|
|
|
writew(cls << 8 | cls,
|
|
|
|
mmio_base + sil_port[i].fifo_cfg);
|
|
|
|
} else
|
|
|
|
dev_printk(KERN_WARNING, &pdev->dev,
|
|
|
|
"cache line size not set. Driver may not function\n");
|
|
|
|
|
|
|
|
/* Apply R_ERR on DMA activate FIS errata workaround */
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
if (host->ports[0]->flags & SIL_FLAG_RERR_ON_DMA_ACT) {
|
2006-07-03 09:07:27 +02:00
|
|
|
int cnt;
|
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
for (i = 0, cnt = 0; i < host->n_ports; i++) {
|
2006-07-03 09:07:27 +02:00
|
|
|
tmp = readl(mmio_base + sil_port[i].sfis_cfg);
|
|
|
|
if ((tmp & 0x3) != 0x01)
|
|
|
|
continue;
|
|
|
|
if (!cnt)
|
|
|
|
dev_printk(KERN_INFO, &pdev->dev,
|
|
|
|
"Applying R_ERR on DMA activate "
|
|
|
|
"FIS errata fix\n");
|
|
|
|
writel(tmp & ~0x3, mmio_base + sil_port[i].sfis_cfg);
|
|
|
|
cnt++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
if (host->n_ports == 4) {
|
2006-07-03 09:07:27 +02:00
|
|
|
/* flip the magic "make 4 ports work" bit */
|
|
|
|
tmp = readl(mmio_base + sil_port[2].bmdma);
|
|
|
|
if ((tmp & SIL_INTR_STEERING) == 0)
|
|
|
|
writel(tmp | SIL_INTR_STEERING,
|
|
|
|
mmio_base + sil_port[2].bmdma);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
|
|
|
|
{
|
|
|
|
static int printed_version;
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
int board_id = ent->driver_data;
|
|
|
|
const struct ata_port_info *ppi[] = { &sil_port_info[board_id], NULL };
|
|
|
|
struct ata_host *host;
|
2005-08-30 11:18:18 +02:00
|
|
|
void __iomem *mmio_base;
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
int n_ports, rc;
|
2005-04-17 00:20:36 +02:00
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
if (!printed_version++)
|
2005-10-30 20:39:11 +01:00
|
|
|
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
|
2005-04-17 00:20:36 +02:00
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
/* allocate host */
|
|
|
|
n_ports = 2;
|
|
|
|
if (board_id == sil_3114)
|
|
|
|
n_ports = 4;
|
|
|
|
|
|
|
|
host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
|
|
|
|
if (!host)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/* acquire resources and fill host */
|
2007-01-20 08:00:28 +01:00
|
|
|
rc = pcim_enable_device(pdev);
|
2005-04-17 00:20:36 +02:00
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
2007-02-01 07:06:36 +01:00
|
|
|
rc = pcim_iomap_regions(pdev, 1 << SIL_MMIO_BAR, DRV_NAME);
|
|
|
|
if (rc == -EBUSY)
|
2007-01-20 08:00:28 +01:00
|
|
|
pcim_pin_device(pdev);
|
2007-02-01 07:06:36 +01:00
|
|
|
if (rc)
|
2007-01-20 08:00:28 +01:00
|
|
|
return rc;
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
host->iomap = pcim_iomap_table(pdev);
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
|
|
|
|
if (rc)
|
2007-01-20 08:00:28 +01:00
|
|
|
return rc;
|
2005-04-17 00:20:36 +02:00
|
|
|
rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
|
|
|
|
if (rc)
|
2007-01-20 08:00:28 +01:00
|
|
|
return rc;
|
2005-04-17 00:20:36 +02:00
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
mmio_base = host->iomap[SIL_MMIO_BAR];
|
2005-04-17 00:20:36 +02:00
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
for (i = 0; i < host->n_ports; i++) {
|
|
|
|
struct ata_ioports *ioaddr = &host->ports[i]->ioaddr;
|
|
|
|
|
|
|
|
ioaddr->cmd_addr = mmio_base + sil_port[i].tf;
|
|
|
|
ioaddr->altstatus_addr =
|
|
|
|
ioaddr->ctl_addr = mmio_base + sil_port[i].ctl;
|
|
|
|
ioaddr->bmdma_addr = mmio_base + sil_port[i].bmdma;
|
|
|
|
ioaddr->scr_addr = mmio_base + sil_port[i].scr;
|
|
|
|
ata_std_ports(ioaddr);
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
/* initialize and activate */
|
|
|
|
sil_init_controller(host);
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
pci_set_master(pdev);
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
return ata_host_activate(host, pdev->irq, sil_interrupt, IRQF_SHARED,
|
|
|
|
&sil_sht);
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
2006-08-15 07:49:30 +02:00
|
|
|
#ifdef CONFIG_PM
|
2006-07-03 09:07:27 +02:00
|
|
|
static int sil_pci_device_resume(struct pci_dev *pdev)
|
|
|
|
{
|
2006-08-24 09:19:22 +02:00
|
|
|
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
2006-12-26 11:39:50 +01:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = ata_pci_device_do_resume(pdev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2006-07-03 09:07:27 +02:00
|
|
|
|
libata: convert the remaining SATA drivers to new init model
Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv,
sata_sx4, sata_vsc and sata_inic162x to new init model.
Now that host and ap are available during intialization, functions are
converted to take either host or ap instead of low level parameters
which were inevitable for functions shared between init and other
paths. This simplifies code quite a bit.
* init_one()'s now follow more consistent init order
* ahci_setup_port() and ahci_host_init() collapsed into
ahci_init_one() for init order consistency
* sata_vsc uses port_info instead of setting fields manually
* in sata_svw, k2_board_info converted to port_info (info is now in
port flags). port number is honored now.
Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-17 16:44:08 +02:00
|
|
|
sil_init_controller(host);
|
2006-08-24 09:19:22 +02:00
|
|
|
ata_host_resume(host);
|
2006-07-03 09:07:27 +02:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2006-08-15 07:49:30 +02:00
|
|
|
#endif
|
2006-07-03 09:07:27 +02:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
static int __init sil_init(void)
|
|
|
|
{
|
2006-08-10 11:13:18 +02:00
|
|
|
return pci_register_driver(&sil_pci_driver);
|
2005-04-17 00:20:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit sil_exit(void)
|
|
|
|
{
|
|
|
|
pci_unregister_driver(&sil_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
module_init(sil_init);
|
|
|
|
module_exit(sil_exit);
|