2019-05-08 17:21:35 +02:00
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.. SPDX-License-Identifier: GPL-2.0
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===========================
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AMD64 Specific Boot Options
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===========================
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There are many others (usually documented in driver documentation), but
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only the AMD64 specific ones are listed here.
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Machine check
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=============
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2019-06-07 20:54:32 +02:00
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Please see Documentation/x86/x86_64/machinecheck.rst for sysfs runtime tunables.
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2019-05-08 17:21:35 +02:00
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mce=off
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Disable machine check
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mce=no_cmci
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Disable CMCI(Corrected Machine Check Interrupt) that
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Intel processor supports. Usually this disablement is
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not recommended, but it might be handy if your hardware
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is misbehaving.
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Note that you'll get more problems without CMCI than with
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due to the shared banks, i.e. you might get duplicated
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error logs.
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mce=dont_log_ce
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Don't make logs for corrected errors. All events reported
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as corrected are silently cleared by OS.
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This option will be useful if you have no interest in any
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of corrected errors.
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mce=ignore_ce
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Disable features for corrected errors, e.g. polling timer
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and CMCI. All events reported as corrected are not cleared
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by OS and remained in its error banks.
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Usually this disablement is not recommended, however if
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there is an agent checking/clearing corrected errors
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(e.g. BIOS or hardware monitoring applications), conflicting
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with OS's error handling, and you cannot deactivate the agent,
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then this option will be a help.
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mce=no_lmce
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Do not opt-in to Local MCE delivery. Use legacy method
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to broadcast MCEs.
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mce=bootlog
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Enable logging of machine checks left over from booting.
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Disabled by default on AMD Fam10h and older because some BIOS
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leave bogus ones.
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If your BIOS doesn't do that it's a good idea to enable though
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to make sure you log even machine check events that result
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in a reboot. On Intel systems it is enabled by default.
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mce=nobootlog
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Disable boot machine check logging.
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mce=tolerancelevel[,monarchtimeout] (number,number)
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tolerance levels:
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0: always panic on uncorrected errors, log corrected errors
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1: panic or SIGBUS on uncorrected errors, log corrected errors
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2: SIGBUS or log uncorrected errors, log corrected errors
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3: never panic or SIGBUS, log all errors (for testing only)
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Default is 1
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Can be also set using sysfs which is preferable.
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monarchtimeout:
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Sets the time in us to wait for other CPUs on machine checks. 0
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to disable.
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mce=bios_cmci_threshold
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Don't overwrite the bios-set CMCI threshold. This boot option
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prevents Linux from overwriting the CMCI threshold set by the
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bios. Without this option, Linux always sets the CMCI
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threshold to 1. Enabling this may make memory predictive failure
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analysis less effective if the bios sets thresholds for memory
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errors since we will not see details for all errors.
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mce=recovery
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Force-enable recoverable machine check code paths
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nomce (for compatibility with i386)
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same as mce=off
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Everything else is in sysfs now.
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APICs
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=====
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apic
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Use IO-APIC. Default
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noapic
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Don't use the IO-APIC.
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disableapic
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Don't use the local APIC
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nolapic
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Don't use the local APIC (alias for i386 compatibility)
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pirq=...
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2019-06-07 20:54:32 +02:00
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See Documentation/x86/i386/IO-APIC.rst
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2019-05-08 17:21:35 +02:00
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noapictimer
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Don't set up the APIC timer
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no_timer_check
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Don't check the IO-APIC timer. This can work around
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problems with incorrect timer initialization on some boards.
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apicpmtimer
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Do APIC timer calibration using the pmtimer. Implies
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apicmaintimer. Useful when your PIT timer is totally broken.
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Timing
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======
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notsc
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Deprecated, use tsc=unstable instead.
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nohpet
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Don't use the HPET timer.
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Idle loop
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=========
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idle=poll
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Don't do power saving in the idle loop using HLT, but poll for rescheduling
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event. This will make the CPUs eat a lot more power, but may be useful
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to get slightly better performance in multiprocessor benchmarks. It also
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makes some profiling using performance counters more accurate.
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Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
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CPUs) this option has no performance advantage over the normal idle loop.
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It may also interact badly with hyperthreading.
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Rebooting
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=========
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reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
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bios
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Use the CPU reboot vector for warm reset
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warm
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Don't set the cold reboot flag
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cold
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Set the cold reboot flag
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triple
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Force a triple fault (init)
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kbd
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Use the keyboard controller. cold reset (default)
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acpi
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Use the ACPI RESET_REG in the FADT. If ACPI is not configured or
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the ACPI reset does not work, the reboot path attempts the reset
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using the keyboard controller.
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efi
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Use efi reset_system runtime service. If EFI is not configured or
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the EFI reset does not work, the reboot path attempts the reset using
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the keyboard controller.
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Using warm reset will be much faster especially on big memory
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systems because the BIOS will not go through the memory check.
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Disadvantage is that not all hardware will be completely reinitialized
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on reboot so there may be boot problems on some systems.
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reboot=force
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Don't stop other CPUs on reboot. This can make reboot more reliable
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in some cases.
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Non Executable Mappings
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=======================
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noexec=on|off
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on
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Enable(default)
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off
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Disable
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NUMA
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====
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numa=off
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Only set up a single NUMA node spanning all memory.
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numa=noacpi
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Don't parse the SRAT table for NUMA setup
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numa=fake=<size>[MG]
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If given as a memory unit, fills all system RAM with nodes of
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size interleaved over physical nodes.
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numa=fake=<N>
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If given as an integer, fills all system RAM with N fake nodes
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interleaved over physical nodes.
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numa=fake=<N>U
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If given as an integer followed by 'U', it will divide each
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physical node into N emulated nodes.
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ACPI
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====
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acpi=off
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Don't enable ACPI
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acpi=ht
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Use ACPI boot table parsing, but don't enable ACPI interpreter
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acpi=force
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Force ACPI on (currently not needed)
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acpi=strict
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Disable out of spec ACPI workarounds.
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acpi_sci={edge,level,high,low}
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Set up ACPI SCI interrupt.
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acpi=noirq
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Don't route interrupts
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acpi=nocmcff
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Disable firmware first mode for corrected errors. This
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disables parsing the HEST CMC error source to check if
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firmware has set the FF flag. This may result in
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duplicate corrected error reports.
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PCI
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===
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pci=off
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Don't use PCI
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pci=conf1
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Use conf1 access.
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pci=conf2
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Use conf2 access.
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pci=rom
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Assign ROMs.
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pci=assign-busses
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Assign busses
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pci=irqmask=MASK
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Set PCI interrupt mask to MASK
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pci=lastbus=NUMBER
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Scan up to NUMBER busses, no matter what the mptable says.
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pci=noacpi
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Don't use ACPI to set up PCI interrupt routing.
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IOMMU (input/output memory management unit)
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===========================================
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Multiple x86-64 PCI-DMA mapping implementations exist, for example:
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1. <lib/dma-direct.c>: use no hardware/software IOMMU at all
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(e.g. because you have < 3 GB memory).
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Kernel boot message: "PCI-DMA: Disabling IOMMU"
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2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
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Kernel boot message: "PCI-DMA: using GART IOMMU"
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3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
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e.g. if there is no hardware IOMMU in the system and it is need because
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you have >3GB memory or told the kernel to us it (iommu=soft))
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Kernel boot message: "PCI-DMA: Using software bounce buffering
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for IO (SWIOTLB)"
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4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
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pSeries and xSeries servers. This hardware IOMMU supports DMA address
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mapping with memory protection, etc.
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Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
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::
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iommu=[<size>][,noagp][,off][,force][,noforce]
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[,memaper[=<order>]][,merge][,fullflush][,nomerge]
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[,noaperture][,calgary]
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General iommu options:
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off
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Don't initialize and use any kind of IOMMU.
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noforce
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Don't force hardware IOMMU usage when it is not needed. (default).
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force
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Force the use of the hardware IOMMU even when it is
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not actually needed (e.g. because < 3 GB memory).
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soft
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Use software bounce buffering (SWIOTLB) (default for
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Intel machines). This can be used to prevent the usage
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of an available hardware IOMMU.
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iommu options only relevant to the AMD GART hardware IOMMU:
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<size>
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Set the size of the remapping area in bytes.
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allowed
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Overwrite iommu off workarounds for specific chipsets.
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fullflush
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Flush IOMMU on each allocation (default).
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nofullflush
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Don't use IOMMU fullflush.
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memaper[=<order>]
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Allocate an own aperture over RAM with size 32MB<<order.
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(default: order=1, i.e. 64MB)
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merge
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Do scatter-gather (SG) merging. Implies "force" (experimental).
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nomerge
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Don't do scatter-gather (SG) merging.
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noaperture
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Ask the IOMMU not to touch the aperture for AGP.
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noagp
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Don't initialize the AGP driver and use full aperture.
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panic
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Always panic when IOMMU overflows.
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calgary
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Use the Calgary IOMMU if it is available
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iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
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implementation:
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swiotlb=<pages>[,force]
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<pages>
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Prereserve that many 128K pages for the software IO bounce buffering.
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force
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Force all IO through the software TLB.
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Settings for the IBM Calgary hardware IOMMU currently found in IBM
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pSeries and xSeries machines
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calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
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Set the size of each PCI slot's translation table when using the
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Calgary IOMMU. This is the size of the translation table itself
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in main memory. The smallest table, 64k, covers an IO space of
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32MB; the largest, 8MB table, can cover an IO space of 4GB.
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Normally the kernel will make the right choice by itself.
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calgary=[translate_empty_slots]
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Enable translation even on slots that have no devices attached to
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them, in case a device will be hotplugged in the future.
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calgary=[disable=<PCI bus number>]
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Disable translation on a given PHB. For
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example, the built-in graphics adapter resides on the first bridge
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(PCI bus number 0); if translation (isolation) is enabled on this
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bridge, X servers that access the hardware directly from user
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space might stop working. Use this option if you have devices that
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are accessed from userspace directly on some PCI host bridge.
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panic
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Always panic when IOMMU overflows
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Miscellaneous
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=============
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nogbpages
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Do not use GB pages for kernel direct mappings.
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gbpages
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Use GB pages for kernel direct mappings.
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