video: fbdev: Fix multiple style issues in xilinxfb
All reported by from checkpatch
./scripts/checkpatch.pl --max-line-length 120 -strict -f
drivers/video/fbdev/xilinxfb.c
WARNING: Block comments should align the * on each line
WARNING: Block comments use a trailing */ on a separate line
WARNING: Block comments use * on subsequent lines
WARNING: please, no space before tabs
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: braces {} are not necessary for single statement blocks
WARNING: Missing a blank line after declarations
WARNING: struct of_device_id should normally be const
CHECK: Please don't use multiple blank lines
CHECK: Blank lines aren't necessary after an open brace '{'
CHECK: Alignment should match open parenthesis
CHECK: 'Endianess' may be misspelled - perhaps 'Endianness'?
CHECK: spaces preferred around that '*' (ctx:VxV)
ERROR: that open brace { should be on the previous line
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Cc: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
This commit is contained in:
Hyun Kwon
Bartlomiej Zolnierkiewicz
parent
69de849605
commit
00a0af9a6b
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@ -41,7 +41,6 @@
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#define DRIVER_NAME "xilinxfb"
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/*
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* Xilinx calls it "TFT LCD Controller" though it can also be used for
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* the VGA port on the Xilinx ML40x board. This is a hardware display
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@ -92,8 +91,9 @@ struct xilinxfb_platform_data {
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u32 xvirt, yvirt; /* resolution of memory buffer */
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/* Physical address of framebuffer memory; If non-zero, driver
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* will use provided memory address instead of allocating one from
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* the consistent pool. */
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* will use provided memory address instead of allocating one from
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* the consistent pool.
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*/
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u32 fb_phys;
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};
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@ -128,18 +128,18 @@ static const struct fb_var_screeninfo xilinx_fb_var = {
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.activate = FB_ACTIVATE_NOW
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};
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#define BUS_ACCESS_FLAG 0x1 /* 1 = BUS, 0 = DCR */
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#define LITTLE_ENDIAN_ACCESS 0x2 /* LITTLE ENDIAN IO functions */
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struct xilinxfb_drvdata {
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struct fb_info info; /* FB driver info record */
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phys_addr_t regs_phys; /* phys. address of the control
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registers */
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* registers
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*/
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void __iomem *regs; /* virt. address of the control
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registers */
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* registers
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*/
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#ifdef CONFIG_PPC_DCR
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dcr_host_t dcr_host;
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unsigned int dcr_len;
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@ -148,7 +148,7 @@ struct xilinxfb_drvdata {
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dma_addr_t fb_phys; /* phys. address of the frame buffer */
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int fb_alloced; /* Flag, was the fb memory alloced? */
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u8 flags; /* features of the driver */
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u8 flags; /* features of the driver */
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u32 reg_ctrl_default;
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@ -165,7 +165,7 @@ struct xilinxfb_drvdata {
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* which bus its connected and call the appropriate write API.
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*/
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static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
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u32 val)
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u32 val)
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{
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if (drvdata->flags & BUS_ACCESS_FLAG) {
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if (drvdata->flags & LITTLE_ENDIAN_ACCESS)
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@ -195,8 +195,8 @@ static u32 xilinx_fb_in32(struct xilinxfb_drvdata *drvdata, u32 offset)
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}
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static int
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xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
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unsigned transp, struct fb_info *fbi)
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xilinx_fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
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unsigned int blue, unsigned int transp, struct fb_info *fbi)
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{
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u32 *palette = fbi->pseudo_palette;
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@ -205,9 +205,11 @@ xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
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if (fbi->var.grayscale) {
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/* Convert color to grayscale.
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* grayscale = 0.30*R + 0.59*G + 0.11*B */
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red = green = blue =
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(red * 77 + green * 151 + blue * 28 + 127) >> 8;
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* grayscale = 0.30*R + 0.59*G + 0.11*B
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*/
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blue = (red * 77 + green * 151 + blue * 28 + 127) >> 8;
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green = blue;
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red = green;
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}
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/* fbi->fix.visual is always FB_VISUAL_TRUECOLOR */
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@ -241,13 +243,11 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
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xilinx_fb_out32(drvdata, REG_CTRL, 0);
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default:
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break;
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}
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return 0; /* success */
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}
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static struct fb_ops xilinxfb_ops =
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{
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static struct fb_ops xilinxfb_ops = {
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.owner = THIS_MODULE,
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.fb_setcolreg = xilinx_fb_setcolreg,
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.fb_blank = xilinx_fb_blank,
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@ -286,7 +286,8 @@ static int xilinxfb_assign(struct platform_device *pdev,
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} else {
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drvdata->fb_alloced = 1;
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drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(fbsize),
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&drvdata->fb_phys, GFP_KERNEL);
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&drvdata->fb_phys,
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GFP_KERNEL);
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}
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if (!drvdata->fb_virt) {
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@ -300,7 +301,7 @@ static int xilinxfb_assign(struct platform_device *pdev,
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/* Tell the hardware where the frame buffer is */
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xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
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rc = xilinx_fb_in32(drvdata, REG_FB_ADDR);
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/* Endianess detection */
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/* Endianness detection */
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if (rc != drvdata->fb_phys) {
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drvdata->flags |= LITTLE_ENDIAN_ACCESS;
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xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
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@ -310,8 +311,7 @@ static int xilinxfb_assign(struct platform_device *pdev,
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drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
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if (pdata->rotate_screen)
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drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
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xilinx_fb_out32(drvdata, REG_CTRL,
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drvdata->reg_ctrl_default);
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xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
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/* Fill struct fb_info */
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drvdata->info.device = dev;
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@ -364,7 +364,7 @@ err_regfb:
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err_cmap:
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if (drvdata->fb_alloced)
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dma_free_coherent(dev, PAGE_ALIGN(fbsize), drvdata->fb_virt,
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drvdata->fb_phys);
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drvdata->fb_phys);
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else
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iounmap(drvdata->fb_virt);
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@ -435,12 +435,12 @@ static int xilinxfb_of_probe(struct platform_device *pdev)
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* Fill the resource structure if its direct BUS interface
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* otherwise fill the dcr_host structure.
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*/
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if (tft_access) {
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if (tft_access)
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drvdata->flags |= BUS_ACCESS_FLAG;
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}
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#ifdef CONFIG_PPC_DCR
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else {
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int start;
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start = dcr_resource_start(pdev->dev.of_node, 0);
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drvdata->dcr_len = dcr_resource_len(pdev->dev.of_node, 0);
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drvdata->dcr_host = dcr_map(pdev->dev.of_node, start, drvdata->dcr_len);
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@ -452,19 +452,19 @@ static int xilinxfb_of_probe(struct platform_device *pdev)
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#endif
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prop = of_get_property(pdev->dev.of_node, "phys-size", &size);
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if ((prop) && (size >= sizeof(u32)*2)) {
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if ((prop) && (size >= sizeof(u32) * 2)) {
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pdata.screen_width_mm = prop[0];
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pdata.screen_height_mm = prop[1];
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}
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prop = of_get_property(pdev->dev.of_node, "resolution", &size);
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if ((prop) && (size >= sizeof(u32)*2)) {
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if ((prop) && (size >= sizeof(u32) * 2)) {
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pdata.xres = prop[0];
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pdata.yres = prop[1];
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}
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prop = of_get_property(pdev->dev.of_node, "virtual-resolution", &size);
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if ((prop) && (size >= sizeof(u32)*2)) {
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if ((prop) && (size >= sizeof(u32) * 2)) {
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pdata.xvirt = prop[0];
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pdata.yvirt = prop[1];
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}
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@ -482,7 +482,7 @@ static int xilinxfb_of_remove(struct platform_device *op)
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}
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/* Match table for of_platform binding */
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static struct of_device_id xilinxfb_of_match[] = {
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static const struct of_device_id xilinxfb_of_match[] = {
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{ .compatible = "xlnx,xps-tft-1.00.a", },
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{ .compatible = "xlnx,xps-tft-2.00.a", },
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{ .compatible = "xlnx,xps-tft-2.01.a", },
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