hwmon: lis3: Enhance lis3 selftest with IRQ line test
Configure chip to data ready mode in selftest and count received interrupts to see that interrupt line(s) are working. Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com> Acked-by: Eric Piel <eric.piel@tremplin-utc.net> Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
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@ -48,6 +48,13 @@
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#define LIS3_SYSFS_POWERDOWN_DELAY 5000 /* In milliseconds */
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#define LIS3_SYSFS_POWERDOWN_DELAY 5000 /* In milliseconds */
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#define SELFTEST_OK 0
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#define SELFTEST_FAIL -1
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#define SELFTEST_IRQ -2
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#define IRQ_LINE0 0
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#define IRQ_LINE1 1
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/*
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/*
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* The sensor can also generate interrupts (DRDY) but it's pretty pointless
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* The sensor can also generate interrupts (DRDY) but it's pretty pointless
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* because they are generated even if the data do not change. So it's better
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* because they are generated even if the data do not change. So it's better
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@ -226,8 +233,25 @@ static int lis3lv02d_selftest(struct lis3lv02d *lis3, s16 results[3])
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s16 x, y, z;
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s16 x, y, z;
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u8 selftest;
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u8 selftest;
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int ret;
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int ret;
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u8 ctrl_reg_data;
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unsigned char irq_cfg;
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mutex_lock(&lis3->mutex);
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mutex_lock(&lis3->mutex);
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irq_cfg = lis3->irq_cfg;
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if (lis3_dev.whoami == WAI_8B) {
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lis3->data_ready_count[IRQ_LINE0] = 0;
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lis3->data_ready_count[IRQ_LINE1] = 0;
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/* Change interrupt cfg to data ready for selftest */
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atomic_inc(&lis3_dev.wake_thread);
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lis3->irq_cfg = LIS3_IRQ1_DATA_READY | LIS3_IRQ2_DATA_READY;
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lis3->read(lis3, CTRL_REG3, &ctrl_reg_data);
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lis3->write(lis3, CTRL_REG3, (ctrl_reg_data &
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~(LIS3_IRQ1_MASK | LIS3_IRQ2_MASK)) |
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(LIS3_IRQ1_DATA_READY | LIS3_IRQ2_DATA_READY));
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}
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if (lis3_dev.whoami == WAI_3DC) {
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if (lis3_dev.whoami == WAI_3DC) {
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ctlreg = CTRL_REG4;
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ctlreg = CTRL_REG4;
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selftest = CTRL4_ST0;
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selftest = CTRL4_ST0;
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@ -257,13 +281,33 @@ static int lis3lv02d_selftest(struct lis3lv02d *lis3, s16 results[3])
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results[2] = z - lis3->read_data(lis3, OUTZ);
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results[2] = z - lis3->read_data(lis3, OUTZ);
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ret = 0;
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ret = 0;
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if (lis3_dev.whoami == WAI_8B) {
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/* Restore original interrupt configuration */
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atomic_dec(&lis3_dev.wake_thread);
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lis3->write(lis3, CTRL_REG3, ctrl_reg_data);
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lis3->irq_cfg = irq_cfg;
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if ((irq_cfg & LIS3_IRQ1_MASK) &&
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lis3->data_ready_count[IRQ_LINE0] < 2) {
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ret = SELFTEST_IRQ;
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goto fail;
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}
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if ((irq_cfg & LIS3_IRQ2_MASK) &&
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lis3->data_ready_count[IRQ_LINE1] < 2) {
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ret = SELFTEST_IRQ;
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goto fail;
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}
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}
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if (lis3->pdata) {
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if (lis3->pdata) {
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int i;
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int i;
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for (i = 0; i < 3; i++) {
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for (i = 0; i < 3; i++) {
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/* Check against selftest acceptance limits */
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/* Check against selftest acceptance limits */
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if ((results[i] < lis3->pdata->st_min_limits[i]) ||
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if ((results[i] < lis3->pdata->st_min_limits[i]) ||
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(results[i] > lis3->pdata->st_max_limits[i])) {
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(results[i] > lis3->pdata->st_max_limits[i])) {
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ret = -EIO;
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ret = SELFTEST_FAIL;
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goto fail;
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goto fail;
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}
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}
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}
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}
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@ -426,13 +470,24 @@ static void lis302dl_interrupt_handle_click(struct lis3lv02d *lis3)
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mutex_unlock(&lis3->mutex);
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mutex_unlock(&lis3->mutex);
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}
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}
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static inline void lis302dl_data_ready(struct lis3lv02d *lis3, int index)
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{
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int dummy;
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/* Dummy read to ack interrupt */
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lis3lv02d_get_xyz(lis3, &dummy, &dummy, &dummy);
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lis3->data_ready_count[index]++;
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}
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static irqreturn_t lis302dl_interrupt_thread1_8b(int irq, void *data)
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static irqreturn_t lis302dl_interrupt_thread1_8b(int irq, void *data)
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{
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{
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struct lis3lv02d *lis3 = data;
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struct lis3lv02d *lis3 = data;
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u8 irq_cfg = lis3->irq_cfg & LIS3_IRQ1_MASK;
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if ((lis3->irq_cfg & LIS3_IRQ1_MASK) == LIS3_IRQ1_CLICK)
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if (irq_cfg == LIS3_IRQ1_CLICK)
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lis302dl_interrupt_handle_click(lis3);
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lis302dl_interrupt_handle_click(lis3);
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else if (unlikely(irq_cfg == LIS3_IRQ1_DATA_READY))
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lis302dl_data_ready(lis3, IRQ_LINE0);
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else
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else
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lis3lv02d_joystick_poll(lis3->idev);
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lis3lv02d_joystick_poll(lis3->idev);
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@ -441,11 +496,13 @@ static irqreturn_t lis302dl_interrupt_thread1_8b(int irq, void *data)
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static irqreturn_t lis302dl_interrupt_thread2_8b(int irq, void *data)
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static irqreturn_t lis302dl_interrupt_thread2_8b(int irq, void *data)
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{
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{
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struct lis3lv02d *lis3 = data;
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struct lis3lv02d *lis3 = data;
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u8 irq_cfg = lis3->irq_cfg & LIS3_IRQ2_MASK;
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if ((lis3->irq_cfg & LIS3_IRQ2_MASK) == LIS3_IRQ2_CLICK)
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if (irq_cfg == LIS3_IRQ2_CLICK)
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lis302dl_interrupt_handle_click(lis3);
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lis302dl_interrupt_handle_click(lis3);
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else if (unlikely(irq_cfg == LIS3_IRQ2_DATA_READY))
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lis302dl_data_ready(lis3, IRQ_LINE1);
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else
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else
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lis3lv02d_joystick_poll(lis3->idev);
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lis3lv02d_joystick_poll(lis3->idev);
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@ -648,12 +705,27 @@ static void lis3lv02d_sysfs_poweron(struct lis3lv02d *lis3)
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static ssize_t lis3lv02d_selftest_show(struct device *dev,
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static ssize_t lis3lv02d_selftest_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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struct device_attribute *attr, char *buf)
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{
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{
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int result;
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s16 values[3];
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s16 values[3];
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static const char ok[] = "OK";
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static const char fail[] = "FAIL";
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static const char irq[] = "FAIL_IRQ";
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const char *res;
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lis3lv02d_sysfs_poweron(&lis3_dev);
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lis3lv02d_sysfs_poweron(&lis3_dev);
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result = lis3lv02d_selftest(&lis3_dev, values);
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switch (lis3lv02d_selftest(&lis3_dev, values)) {
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return sprintf(buf, "%s %d %d %d\n", result == 0 ? "OK" : "FAIL",
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case SELFTEST_FAIL:
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res = fail;
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break;
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case SELFTEST_IRQ:
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res = irq;
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break;
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case SELFTEST_OK:
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default:
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res = ok;
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break;
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}
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return sprintf(buf, "%s %d %d %d\n", res,
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values[0], values[1], values[2]);
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values[0], values[1], values[2]);
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}
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}
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@ -273,7 +273,8 @@ struct lis3lv02d {
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struct fasync_struct *async_queue; /* queue for the misc device */
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struct fasync_struct *async_queue; /* queue for the misc device */
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wait_queue_head_t misc_wait; /* Wait queue for the misc device */
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wait_queue_head_t misc_wait; /* Wait queue for the misc device */
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unsigned long misc_opened; /* bit0: whether the device is open */
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unsigned long misc_opened; /* bit0: whether the device is open */
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atomic_t wake_thread;
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int data_ready_count[2];
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atomic_t wake_thread;
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unsigned char irq_cfg;
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unsigned char irq_cfg;
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struct lis3lv02d_platform_data *pdata; /* for passing board config */
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struct lis3lv02d_platform_data *pdata; /* for passing board config */
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