OpenE2K
/
linux
6
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

sh: Revert CONFIG_NR_ONCHIP_DMA_CHANNELS to MAX_DMA_CHANNELS 

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Nobuhiro Iwamatsu 2009-03-12 06:34:39 +00:00 committed by Paul Mundt
parent 4c3f450ba4
commit 039a718ebb
1 changed files with 9 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
arch/sh/include/asm/dma-sh.h
View File

@ -11,6 +11,7 @@
#ifndef __DMA_SH_H #ifndef __DMA_SH_H
#define __DMA_SH_H #define __DMA_SH_H
#include <asm/dma.h>
#include <cpu/dma.h> #include <cpu/dma.h>
/* DMAOR contorl: The DMAOR access size is different by CPU.*/ /* DMAOR contorl: The DMAOR access size is different by CPU.*/
@ -29,21 +30,21 @@
#endif #endif
static int dmte_irq_map[] __maybe_unused = { static int dmte_irq_map[] __maybe_unused = {
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 4) #if (MAX_DMA_CHANNELS >= 4)
DMTE0_IRQ, DMTE0_IRQ,
DMTE0_IRQ + 1, DMTE0_IRQ + 1,
DMTE0_IRQ + 2, DMTE0_IRQ + 2,
DMTE0_IRQ + 3, DMTE0_IRQ + 3,
#endif #endif
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 6) #if (MAX_DMA_CHANNELS >= 6)
DMTE4_IRQ, DMTE4_IRQ,
DMTE4_IRQ + 1, DMTE4_IRQ + 1,
#endif #endif
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 8) #if (MAX_DMA_CHANNELS >= 8)
DMTE6_IRQ, DMTE6_IRQ,
DMTE6_IRQ + 1, DMTE6_IRQ + 1,
#endif #endif
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 12) #if (MAX_DMA_CHANNELS >= 12)
DMTE8_IRQ, DMTE8_IRQ,
DMTE9_IRQ, DMTE9_IRQ,
DMTE10_IRQ, DMTE10_IRQ,
@ -85,21 +86,21 @@ static int dmte_irq_map[] __maybe_unused = {
/* DMA base address */ /* DMA base address */
static u32 dma_base_addr[] __maybe_unused = { static u32 dma_base_addr[] __maybe_unused = {
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 4) #if (MAX_DMA_CHANNELS >= 4)
SH_DMAC_BASE0 + 0x00, /* channel 0 */ SH_DMAC_BASE0 + 0x00, /* channel 0 */
SH_DMAC_BASE0 + 0x10, SH_DMAC_BASE0 + 0x10,
SH_DMAC_BASE0 + 0x20, SH_DMAC_BASE0 + 0x20,
SH_DMAC_BASE0 + 0x30, SH_DMAC_BASE0 + 0x30,
#endif #endif
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 6) #if (MAX_DMA_CHANNELS >= 6)
SH_DMAC_BASE0 + 0x50, SH_DMAC_BASE0 + 0x50,
SH_DMAC_BASE0 + 0x60, SH_DMAC_BASE0 + 0x60,
#endif #endif
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 8) #if (MAX_DMA_CHANNELS >= 8)
SH_DMAC_BASE1 + 0x00, SH_DMAC_BASE1 + 0x00,
SH_DMAC_BASE1 + 0x10, SH_DMAC_BASE1 + 0x10,
#endif #endif
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 12) #if (MAX_DMA_CHANNELS >= 12)
SH_DMAC_BASE1 + 0x20, SH_DMAC_BASE1 + 0x20,
SH_DMAC_BASE1 + 0x30, SH_DMAC_BASE1 + 0x30,
SH_DMAC_BASE1 + 0x50, SH_DMAC_BASE1 + 0x50,