msm: Remove chip-ifdefs for GPIO io mappings
The two GPIO controllers are always mapped to the same virtual address across all MSM devices. Instead of selecting this at compile time, determine the physical address at runtime, eliminating yet something else preventing multiple MSM targets from being compiled into the same kernel. Change-Id: I1672219d978ab6243526adeda6badf49472baa27 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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@ -55,13 +55,11 @@
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#define MSM_DMOV_PHYS 0xA9700000
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#define MSM_DMOV_SIZE SZ_4K
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#define MSM_GPIO1_BASE IOMEM(0xE0003000)
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#define MSM_GPIO1_PHYS 0xA9200000
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#define MSM_GPIO1_SIZE SZ_4K
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#define MSM7X00_GPIO1_PHYS 0xA9200000
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#define MSM7X00_GPIO1_SIZE SZ_4K
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#define MSM_GPIO2_BASE IOMEM(0xE0004000)
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#define MSM_GPIO2_PHYS 0xA9300000
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#define MSM_GPIO2_SIZE SZ_4K
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#define MSM7X00_GPIO2_PHYS 0xA9300000
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#define MSM7X00_GPIO2_SIZE SZ_4K
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#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
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#define MSM_CLK_CTL_PHYS 0xA8600000
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@ -46,13 +46,11 @@
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#define MSM_DMOV_PHYS 0xAC400000
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#define MSM_DMOV_SIZE SZ_4K
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#define MSM_GPIO1_BASE IOMEM(0xE0003000)
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#define MSM_GPIO1_PHYS 0xAC001000
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#define MSM_GPIO1_SIZE SZ_4K
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#define MSM7X30_GPIO1_PHYS 0xAC001000
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#define MSM7X30_GPIO1_SIZE SZ_4K
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#define MSM_GPIO2_BASE IOMEM(0xE0004000)
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#define MSM_GPIO2_PHYS 0xAC101000
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#define MSM_GPIO2_SIZE SZ_4K
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#define MSM7X30_GPIO2_PHYS 0xAC101000
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#define MSM7X30_GPIO2_SIZE SZ_4K
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#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
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#define MSM_CLK_CTL_PHYS 0xAB800000
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@ -46,13 +46,11 @@
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#define MSM_DMOV_PHYS 0xA9700000
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#define MSM_DMOV_SIZE SZ_4K
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#define MSM_GPIO1_BASE IOMEM(0xE0003000)
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#define MSM_GPIO1_PHYS 0xA9000000
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#define MSM_GPIO1_SIZE SZ_4K
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#define QSD8X50_GPIO1_PHYS 0xA9000000
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#define QSD8X50_GPIO1_SIZE SZ_4K
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#define MSM_GPIO2_BASE IOMEM(0xE0004000)
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#define MSM_GPIO2_PHYS 0xA9100000
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#define MSM_GPIO2_SIZE SZ_4K
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#define QSD8X50_GPIO2_PHYS 0xA9100000
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#define QSD8X50_GPIO2_SIZE SZ_4K
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#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
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#define MSM_CLK_CTL_PHYS 0xA8600000
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@ -61,5 +61,7 @@
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#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)
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#define MSM_TMR_BASE IOMEM(0xF0200000)
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#define MSM_TMR0_BASE IOMEM(0xF0201000)
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#define MSM_GPIO1_BASE IOMEM(0xE0003000)
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#define MSM_GPIO2_BASE IOMEM(0xE0004000)
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#endif
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@ -43,8 +43,8 @@ static struct map_desc msm_io_desc[] __initdata = {
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MSM_DEVICE(VIC),
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MSM_CHIP_DEVICE(CSR, MSM7X00),
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MSM_DEVICE(DMOV),
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MSM_DEVICE(GPIO1),
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MSM_DEVICE(GPIO2),
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MSM_CHIP_DEVICE(GPIO1, MSM7X00),
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MSM_CHIP_DEVICE(GPIO2, MSM7X00),
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MSM_DEVICE(CLK_CTL),
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#ifdef CONFIG_MSM_DEBUG_UART
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MSM_DEVICE(DEBUG_UART),
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@ -76,8 +76,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
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MSM_DEVICE(VIC),
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MSM_CHIP_DEVICE(CSR, QSD8X50),
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MSM_DEVICE(DMOV),
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MSM_DEVICE(GPIO1),
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MSM_DEVICE(GPIO2),
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MSM_CHIP_DEVICE(GPIO1, QSD8X50),
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MSM_CHIP_DEVICE(GPIO2, QSD8X50),
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MSM_DEVICE(CLK_CTL),
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MSM_DEVICE(SIRC),
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MSM_DEVICE(SCPLL),
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@ -135,8 +135,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
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MSM_DEVICE(VIC),
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MSM_CHIP_DEVICE(CSR, MSM7X30),
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MSM_DEVICE(DMOV),
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MSM_DEVICE(GPIO1),
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MSM_DEVICE(GPIO2),
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MSM_CHIP_DEVICE(GPIO1, MSM7X30),
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MSM_CHIP_DEVICE(GPIO2, MSM7X30),
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MSM_DEVICE(CLK_CTL),
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MSM_DEVICE(CLK_CTL_SH2),
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MSM_DEVICE(AD5),
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