[media] saa7115: make multi-line comments compliant with CodingStyle
changeset 2ccf12a
did a crappy job when added multi-line comment lines,
violating CodingStyle.
Change the comments added there to fulfill CodingStyle, and document
the platform_data using Documentation/kernel-doc-nano-HOWTO.txt.
Cc: Jon Arne Jørgensen <jonarne@jonarne.no>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
parent
2ccf12afe6
commit
04074f1fdf
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@ -225,12 +225,14 @@ static const unsigned char saa7111_init[] = {
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0x00, 0x00
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0x00, 0x00
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};
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};
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/* This table has one illegal value, and some values that are not
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/*
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correct according to the datasheet initialization table.
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* This table has one illegal value, and some values that are not
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* correct according to the datasheet initialization table.
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If you need a table with legal/default values tell the driver in
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*
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i2c_board_info.platform_data, and you will get the gm7113c_init
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* If you need a table with legal/default values tell the driver in
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table instead. */
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* i2c_board_info.platform_data, and you will get the gm7113c_init
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* table instead.
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*/
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/* SAA7113 Init codes */
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/* SAA7113 Init codes */
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static const unsigned char saa7113_init[] = {
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static const unsigned char saa7113_init[] = {
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@ -265,10 +267,12 @@ static const unsigned char saa7113_init[] = {
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0x00, 0x00
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0x00, 0x00
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};
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};
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/* GM7113C is a clone of the SAA7113 chip
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/*
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This init table is copied out of the saa7113 datasheet.
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* GM7113C is a clone of the SAA7113 chip
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In R_08 we enable "Automatic Field Detection" [AUFD],
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* This init table is copied out of the saa7113 datasheet.
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this is disabled when saa711x_set_v4lstd is called. */
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* In R_08 we enable "Automatic Field Detection" [AUFD],
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* this is disabled when saa711x_set_v4lstd is called.
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*/
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static const unsigned char gm7113c_init[] = {
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static const unsigned char gm7113c_init[] = {
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R_01_INC_DELAY, 0x08,
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R_01_INC_DELAY, 0x08,
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R_02_INPUT_CNTL_1, 0xc0,
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R_02_INPUT_CNTL_1, 0xc0,
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@ -47,9 +47,11 @@
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#define SAA7111_FMT_YUV411 0xc0
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#define SAA7111_FMT_YUV411 0xc0
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/* config flags */
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/* config flags */
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/* Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit
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/*
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* Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit
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* controls the IDQ signal polarity which is set to 'inverted' if the bit
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* controls the IDQ signal polarity which is set to 'inverted' if the bit
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* it 1 and to 'default' if it is 0. */
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* it 1 and to 'default' if it is 0.
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*/
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#define SAA7115_IDQ_IS_DEFAULT (1 << 0)
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#define SAA7115_IDQ_IS_DEFAULT (1 << 0)
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/* s_crystal_freq values and flags */
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/* s_crystal_freq values and flags */
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@ -84,11 +86,13 @@ enum saa7113_r10_ofts {
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SAA7113_OFTS_VFLAG_BY_DATA_TYPE
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SAA7113_OFTS_VFLAG_BY_DATA_TYPE
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};
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};
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/* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
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/*
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* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
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* This is used to select what data is output on the RTS0 and RTS1 pins.
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* This is used to select what data is output on the RTS0 and RTS1 pins.
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* RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0)
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* RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0)
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* RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified
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* RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified
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* in the datasheet, but is set to HREF_HS in the saa7113_init table. */
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* in the datasheet, but is set to HREF_HS in the saa7113_init table.
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*/
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enum saa7113_r12_rts {
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enum saa7113_r12_rts {
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SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */
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SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */
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SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */
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SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */
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@ -108,24 +112,29 @@ enum saa7113_r12_rts {
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SAA7113_RTS_FID
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SAA7113_RTS_FID
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};
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};
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/**
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* struct saa7115_platform_data - Allow overriding default initialization
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*
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* @saa7113_force_gm7113c_init: Force the use of the gm7113c_init table
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* instead of saa7113_init table
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* (saa7113 only)
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* @saa7113_r08_htc: [R_08 - Bit 3..4]
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* @saa7113_r10_vrln: [R_10 - Bit 3]
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* default: Disabled for gm7113c_init
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* Enabled for saa7113c_init
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* @saa7113_r10_ofts: [R_10 - Bit 6..7]
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* @saa7113_r12_rts0: [R_12 - Bit 0..3]
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* @saa7113_r12_rts1: [R_12 - Bit 4..7]
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* @saa7113_r13_adlsb: [R_13 - Bit 7] - default: disabled
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*/
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struct saa7115_platform_data {
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struct saa7115_platform_data {
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/* saa7113 only: Force the use of the gm7113c_init table,
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* instead of the old saa7113_init table. */
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bool saa7113_force_gm7113c_init;
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bool saa7113_force_gm7113c_init;
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enum saa7113_r08_htc *saa7113_r08_htc;
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/* SAA7113/GM7113C Specific configurations */
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bool *saa7113_r10_vrln;
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enum saa7113_r08_htc *saa7113_r08_htc; /* [R_08 - Bit 3..4] */
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enum saa7113_r10_ofts *saa7113_r10_ofts;
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enum saa7113_r12_rts *saa7113_r12_rts0;
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bool *saa7113_r10_vrln; /* [R_10 - Bit 3]
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enum saa7113_r12_rts *saa7113_r12_rts1;
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Disabled for gm7113c_init
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bool *saa7113_r13_adlsb;
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Enabled for saa7113c_init */
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enum saa7113_r10_ofts *saa7113_r10_ofts; /* [R_10 - Bit 6..7] */
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enum saa7113_r12_rts *saa7113_r12_rts0; /* [R_12 - Bit 0..3] */
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enum saa7113_r12_rts *saa7113_r12_rts1; /* [R_12 - Bit 4..7] */
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bool *saa7113_r13_adlsb; /* [R_13 - Bit 7]
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Default disabled */
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};
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};
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#endif
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#endif
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