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ARM: dts: mt8127: enable basic SMP bringup for mt8127 

Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.

This also set cpu enable-method to enable SMP.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Yingjoe Chen 2015-10-02 23:19:41 +08:00 committed by Matthias Brugger
parent d186a394bb
commit 060646a218
1 changed files with 27 additions and 0 deletions
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27
arch/arm/boot/dts/mt8127.dtsi
View File

@ -23,6 +23,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "mediatek,mt81xx-tz-smp";
cpu@0 {
device_type = "cpu";
@ -47,6 +48,17 @@
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
trustzone-bootinfo@80002000 {
compatible = "mediatek,trustzone-bootinfo";
reg = <0 0x80002000 0 0x1000>;
};
};
clocks {
#address-cells = <2>;
#size-cells = <2>;
@ -72,6 +84,21 @@
};
};
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <13000000>;
arm,cpu-registers-not-fw-configured;
};
soc {
#address-cells = <2>;
#size-cells = <2>;