m68k: ColdFire V4e MMU paging init code and miss handler
The different ColdFire V4e MMU requires its own dedicated paging init code, and a TLB miss handler for its software driven TLB. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Matt Waddel <mwaddel@yahoo.com> Acked-by: Kurt Mahan <kmahan@xmission.com>
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@ -105,6 +105,8 @@ static inline void mmu_write(u32 a, u32 v)
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__asm__ __volatile__ ("nop");
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}
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int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word);
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#endif
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#endif /* MCFMMU_H */
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@ -0,0 +1,198 @@
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/*
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* Based upon linux/arch/m68k/mm/sun3mmu.c
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* Based upon linux/arch/ppc/mm/mmu_context.c
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*
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* Implementations of mm routines specific to the Coldfire MMU.
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*
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* Copyright (c) 2008 Freescale Semiconductor, Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/bootmem.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/mmu_context.h>
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#include <asm/mcf_pgalloc.h>
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#include <asm/tlbflush.h>
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#define KMAPAREA(x) ((x >= VMALLOC_START) && (x < KMAP_END))
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mm_context_t next_mmu_context;
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unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
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atomic_t nr_free_contexts;
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struct mm_struct *context_mm[LAST_CONTEXT+1];
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extern unsigned long num_pages;
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void free_initmem(void)
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{
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}
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/*
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* ColdFire paging_init derived from sun3.
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*/
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void __init paging_init(void)
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{
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pgd_t *pg_dir;
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pte_t *pg_table;
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unsigned long address, size;
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unsigned long next_pgtable, bootmem_end;
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unsigned long zones_size[MAX_NR_ZONES];
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enum zone_type zone;
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int i;
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empty_zero_page = (void *) alloc_bootmem_pages(PAGE_SIZE);
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memset((void *) empty_zero_page, 0, PAGE_SIZE);
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pg_dir = swapper_pg_dir;
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memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
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size = num_pages * sizeof(pte_t);
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size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1);
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next_pgtable = (unsigned long) alloc_bootmem_pages(size);
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bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK;
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pg_dir += PAGE_OFFSET >> PGDIR_SHIFT;
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address = PAGE_OFFSET;
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while (address < (unsigned long)high_memory) {
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pg_table = (pte_t *) next_pgtable;
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next_pgtable += PTRS_PER_PTE * sizeof(pte_t);
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pgd_val(*pg_dir) = (unsigned long) pg_table;
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pg_dir++;
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/* now change pg_table to kernel virtual addresses */
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for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) {
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pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT);
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if (address >= (unsigned long) high_memory)
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pte_val(pte) = 0;
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set_pte(pg_table, pte);
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address += PAGE_SIZE;
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}
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}
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current->mm = NULL;
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for (zone = 0; zone < MAX_NR_ZONES; zone++)
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zones_size[zone] = 0x0;
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zones_size[ZONE_DMA] = num_pages;
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free_area_init(zones_size);
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}
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int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
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{
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unsigned long flags, mmuar;
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struct mm_struct *mm;
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pgd_t *pgd;
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pmd_t *pmd;
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pte_t *pte;
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int asid;
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local_irq_save(flags);
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mmuar = (dtlb) ? mmu_read(MMUAR) :
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regs->pc + (extension_word * sizeof(long));
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mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm;
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if (!mm) {
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local_irq_restore(flags);
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return -1;
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}
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pgd = pgd_offset(mm, mmuar);
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if (pgd_none(*pgd)) {
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local_irq_restore(flags);
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return -1;
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}
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pmd = pmd_offset(pgd, mmuar);
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if (pmd_none(*pmd)) {
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local_irq_restore(flags);
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return -1;
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}
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pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar)
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: pte_offset_map(pmd, mmuar);
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if (pte_none(*pte) || !pte_present(*pte)) {
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local_irq_restore(flags);
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return -1;
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}
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if (write) {
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if (!pte_write(*pte)) {
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local_irq_restore(flags);
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return -1;
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}
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set_pte(pte, pte_mkdirty(*pte));
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}
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set_pte(pte, pte_mkyoung(*pte));
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asid = mm->context & 0xff;
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if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
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set_pte(pte, pte_wrprotect(*pte));
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mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
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(((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
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>> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
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mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
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((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
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if (dtlb)
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mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
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else
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mmu_write(MMUOR, MMUOR_ITLB | MMUOR_ACC | MMUOR_UAA);
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local_irq_restore(flags);
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return 0;
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}
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/*
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* Initialize the context management stuff.
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* The following was taken from arch/ppc/mmu_context.c
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*/
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void __init mmu_context_init(void)
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{
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/*
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* Some processors have too few contexts to reserve one for
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* init_mm, and require using context 0 for a normal task.
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* Other processors reserve the use of context zero for the kernel.
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* This code assumes FIRST_CONTEXT < 32.
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*/
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context_map[0] = (1 << FIRST_CONTEXT) - 1;
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next_mmu_context = FIRST_CONTEXT;
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atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
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}
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/*
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* Steal a context from a task that has one at the moment.
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* This is only used on 8xx and 4xx and we presently assume that
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* they don't do SMP. If they do then thicfpgalloc.hs will have to check
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* whether the MM we steal is in use.
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* We also assume that this is only used on systems that don't
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* use an MMU hash table - this is true for 8xx and 4xx.
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* This isn't an LRU system, it just frees up each context in
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* turn (sort-of pseudo-random replacement :). This would be the
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* place to implement an LRU scheme if anyone was motivated to do it.
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* -- paulus
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*/
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void steal_context(void)
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{
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struct mm_struct *mm;
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/*
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* free up context `next_mmu_context'
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* if we shouldn't free context 0, don't...
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*/
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if (next_mmu_context < FIRST_CONTEXT)
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next_mmu_context = FIRST_CONTEXT;
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mm = context_mm[next_mmu_context];
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flush_tlb_mm(mm);
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destroy_context(mm);
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}
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