From 3ab65f2bca8259cebb80bfe6aebecc80dc0f3742 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 17 Apr 2013 16:26:30 -0500 Subject: [PATCH 01/52] ARM: dts: OMAP4+: Remove multimedia carveouts The carveouts that have been reserved for multimedia usecases are not being used currently by any driver and so have been cleaned up. Memory will be allocated runtime through CMA for enabling the multimedia usecases. Signed-off-by: Suman Anna Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4.dtsi | 8 -------- arch/arm/boot/dts/omap5.dtsi | 8 -------- 2 files changed, 16 deletions(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 2a5642882c8a..006563eec767 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -6,14 +6,6 @@ * published by the Free Software Foundation. */ -/* - * Carveout for multimedia usecases - * It should be the last 48MB of the first 512MB memory part - * In theory, it should not even exist. That zone should be reserved - * dynamically during the .reserve callback. - */ -/memreserve/ 0x9d000000 0x03000000; - /include/ "skeleton.dtsi" / { diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 635cae283011..28ec8061757a 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -7,14 +7,6 @@ * Based on "omap4.dtsi" */ -/* - * Carveout for multimedia usecases - * It should be the last 48MB of the first 512MB memory part - * In theory, it should not even exist. That zone should be reserved - * dynamically during the .reserve callback. - */ -/memreserve/ 0x9d000000 0x03000000; - /include/ "skeleton.dtsi" / { From 3f8664457ca4f654b836e6f434ae94e1be23c88e Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Tue, 26 Mar 2013 14:14:01 +0530 Subject: [PATCH 02/52] ARM: dts: AM33XX: Add default pinctrl binding for I2C device Add pin control binding for I2C device nodes in all board specific DT files (as per current usage), EVM: Both i2c0 and i2c1 EVM-SK and Bone: Only i2c0 Signed-off-by: Vaibhav Hiremath Acked-by: Matt Porter Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 10 ++++++++++ arch/arm/boot/dts/am335x-evm.dts | 20 ++++++++++++++++++++ arch/arm/boot/dts/am335x-evmsk.dts | 10 ++++++++++ 3 files changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 5302f79c05b7..860630b425ea 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -36,6 +36,13 @@ 0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */ >; }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */ + 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ + >; + }; }; ocp { @@ -44,6 +51,9 @@ }; i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 0423298a26fe..0668843004e8 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -44,6 +44,20 @@ 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */ >; }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */ + 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x158 0x32 /* spi0_d1.i2c1_sda PULLUP | INPUTENABLE | MODE2 */ + 0x15c 0x32 /* spi0_cs0.i2c1_scl PULLUP | INPUTENABLE | MODE2 */ + >; + }; }; ocp { @@ -52,6 +66,9 @@ }; i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; clock-frequency = <400000>; @@ -61,6 +78,9 @@ }; i2c1: i2c@4802a000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; clock-frequency = <100000>; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index f67c360844f4..15a305224bba 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -51,6 +51,13 @@ 0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */ >; }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */ + 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ + >; + }; }; ocp { @@ -59,6 +66,9 @@ }; i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; clock-frequency = <400000>; From b8f70c3a80599df8421b764bf20fcc04ce9d24a2 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Tue, 26 Mar 2013 15:42:15 +0530 Subject: [PATCH 03/52] ARM: dts: AM33XX: Add pinctrl binding to gpio-leds node Now gpio-leds driver is using devm_pinctrl_get_select_default() api to set default pinmux configuration required for the functionality of the driver, so this patch moves respective pinctrl binding inside leds node. Signed-off-by: Vaibhav Hiremath Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 5 ++++- arch/arm/boot/dts/am335x-evmsk.dts | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 860630b425ea..1d623e41d163 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -26,7 +26,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&user_leds_s0>; + pinctrl-0 = <>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < @@ -65,6 +65,9 @@ }; leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + compatible = "gpio-leds"; led@2 { diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 15a305224bba..21d5a0804f6c 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -32,7 +32,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>; + pinctrl-0 = <&gpio_keys_s0>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < @@ -121,6 +121,9 @@ }; leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + compatible = "gpio-leds"; led@1 { From dde3b0d64c3df7272082128133f0af592d7ac50f Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Thu, 28 Mar 2013 11:36:05 +0530 Subject: [PATCH 04/52] ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath Acked-by: Matt Porter Cc: Peter Korsgaard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 2 +- arch/arm/boot/dts/am335x-evm.dts | 2 +- arch/arm/boot/dts/am335x-evmsk.dts | 2 +- arch/arm/boot/dts/am33xx.dtsi | 24 ++++++++++++------------ 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 1d623e41d163..be2c501a0b58 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -46,7 +46,7 @@ }; ocp { - uart1: serial@44e09000 { + uart0: serial@44e09000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 0668843004e8..f2cb19290f7a 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -61,7 +61,7 @@ }; ocp { - uart1: serial@44e09000 { + uart0: serial@44e09000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 21d5a0804f6c..bcd702897d51 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -61,7 +61,7 @@ }; ocp { - uart1: serial@44e09000 { + uart0: serial@44e09000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 8e1248f01fab..e7cabe2c890b 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -15,12 +15,12 @@ interrupt-parent = <&intc>; aliases { - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - serial3 = &uart4; - serial4 = &uart5; - serial5 = &uart6; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; d_can0 = &dcan0; d_can1 = &dcan1; }; @@ -133,7 +133,7 @@ interrupts = <62>; }; - uart1: serial@44e09000 { + uart0: serial@44e09000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart1"; clock-frequency = <48000000>; @@ -142,7 +142,7 @@ status = "disabled"; }; - uart2: serial@48022000 { + uart1: serial@48022000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart2"; clock-frequency = <48000000>; @@ -151,7 +151,7 @@ status = "disabled"; }; - uart3: serial@48024000 { + uart2: serial@48024000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart3"; clock-frequency = <48000000>; @@ -160,7 +160,7 @@ status = "disabled"; }; - uart4: serial@481a6000 { + uart3: serial@481a6000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart4"; clock-frequency = <48000000>; @@ -169,7 +169,7 @@ status = "disabled"; }; - uart5: serial@481a8000 { + uart4: serial@481a8000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart5"; clock-frequency = <48000000>; @@ -178,7 +178,7 @@ status = "disabled"; }; - uart6: serial@481aa000 { + uart5: serial@481aa000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart6"; clock-frequency = <48000000>; From 9f2fbe174124f9ec0bb4e690f303d342dfa8b3dd Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Wed, 27 Mar 2013 16:31:34 +0530 Subject: [PATCH 05/52] ARM: dts: AM33XX: Add default pinctrl binding for UART0 device Add pin control binding for UART0 device nodes in all board specific DT files. Signed-off-by: Vaibhav Hiremath Acked-by: Matt Porter Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 10 ++++++++++ arch/arm/boot/dts/am335x-evm.dts | 10 ++++++++++ arch/arm/boot/dts/am335x-evmsk.dts | 10 ++++++++++ 3 files changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index be2c501a0b58..bfba6fc9e868 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -43,10 +43,20 @@ 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ >; }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */ + 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ + >; + }; }; ocp { uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index f2cb19290f7a..7647c9d2c813 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -58,10 +58,20 @@ 0x15c 0x32 /* spi0_cs0.i2c1_scl PULLUP | INPUTENABLE | MODE2 */ >; }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */ + 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ + >; + }; }; ocp { uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index bcd702897d51..0eec644471c4 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -58,10 +58,20 @@ 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ >; }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */ + 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ + >; + }; }; ocp { uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; }; From 4d9275709649f82dcec157766e86318f6c2c61f6 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 20 May 2013 18:58:10 +0530 Subject: [PATCH 06/52] ARM: dts: AM33XX: Set pinmux for clkout2 pad used for clock output xdma_event_intr1.clkout2 pad can be used to source clock from either 32K OSC or any of the PLL (except MPU) outputs. On the existing AM335x based boards (EVM, EVM-SK and Bone), this pad is used to feed the clock to audio codes. So, this patch configures the pinmux to get clkout2 on the pad. Signed-off-by: Vaibhav Hiremath Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 8 +++++++- arch/arm/boot/dts/am335x-evm.dts | 8 +++++++- arch/arm/boot/dts/am335x-evmsk.dts | 8 +++++++- 3 files changed, 21 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index bfba6fc9e868..74bfcc611051 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -26,7 +26,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <>; + pinctrl-0 = <&clkout2_pin>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < @@ -50,6 +50,12 @@ 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ >; }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + >; + }; }; ocp { diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 7647c9d2c813..896d392dc14d 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -26,7 +26,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>; + pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; matrix_keypad_s0: matrix_keypad_s0 { pinctrl-single,pins = < @@ -65,6 +65,12 @@ 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ >; }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + >; + }; }; ocp { diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 0eec644471c4..4d81dbcb53ea 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -32,7 +32,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys_s0>; + pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < @@ -65,6 +65,12 @@ 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ >; }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + >; + }; }; ocp { From d72b4415011e3b5949bf03973ac633d2e36bad0d Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Wed, 17 Apr 2013 18:32:09 +0200 Subject: [PATCH 07/52] ARM: dts: omap3-igep0020: Add SMSC911x LAN chip support The IGEPv2 board has an SMSC LAN9221i ethernet chip connected to the OMAP3 processor though the General-Purpose Memory Controller. This patch adds a device node for the ethernet chip as a GPMC child and all its dependencies (regulators, GPIO and pin muxs). Signed-off-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep.dtsi | 6 ++++ arch/arm/boot/dts/omap3-igep0020.dts | 53 ++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index f8fe3b748c3e..d5cd504bc180 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -62,6 +62,12 @@ 0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */ >; }; + + smsc911x_pins: pinmux_smsc911x_pins { + pinctrl-single,pins = < + 0x1a2 0x0104 /* mcspi1_cs2.gpio_176 INPUT | MODE4 */ + >; + }; }; &i2c1 { diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index e2b98490cc9a..4bac32e77be4 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -40,6 +40,18 @@ gpios = <&twl_gpio 19 1>; }; }; + + vddvario: regulator-vddvario { + compatible = "regulator-fixed"; + regulator-name = "vddvario"; + regulator-always-on; + }; + + vdd33a: regulator-vdd33a { + compatible = "regulator-fixed"; + regulator-name = "vdd33a"; + regulator-always-on; + }; }; &i2c3 { @@ -54,3 +66,44 @@ reg = <0x50>; }; }; + +&gpmc { + ranges = <5 0 0x2c000000 0x1000000>; + ethernet@5,0 { + pinctrl-names = "default"; + pinctrl-0 = <&smsc911x_pins>; + compatible = "smsc,lan9221", "smsc,lan9115"; + reg = <5 0 0xff>; + bank-width = <2>; + + gpmc,mux-add-data; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <186>; + gpmc,cs-wr-off-ns = <186>; + gpmc,adv-on-ns = <12>; + gpmc,adv-rd-off-ns = <48>; + gpmc,adv-wr-off-ns = <48>; + gpmc,oe-on-ns = <54>; + gpmc,oe-off-ns = <168>; + gpmc,we-on-ns = <54>; + gpmc,we-off-ns = <168>; + gpmc,rd-cycle-ns = <186>; + gpmc,wr-cycle-ns = <186>; + gpmc,access-ns = <114>; + gpmc,page-burst-access-ns = <6>; + gpmc,bus-turnaround-ns = <12>; + gpmc,cycle2cycle-delay-ns = <18>; + gpmc,wr-data-mux-bus-ns = <90>; + gpmc,wr-access-ns = <186>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + + interrupt-parent = <&gpio6>; + interrupts = <16 8>; + vmmc-supply = <&vddvario>; + vmmc_aux-supply = <&vdd33a>; + reg-io-width = <4>; + + smsc,save-mac-address; + }; +}; From 7f674b3fcf63cd289813d2c1d95e5dfb0f267963 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Fri, 10 May 2013 21:31:10 +0200 Subject: [PATCH 08/52] ARM: dts: omap3-igep0020: Add NAND flash support The IGEPv2 board has an 512MB NAND flash memory. Add a device node for this NAND and its partition layout. Signed-off-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0020.dts | 50 +++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index 4bac32e77be4..0ba43136a37f 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -68,7 +68,55 @@ }; &gpmc { - ranges = <5 0 0x2c000000 0x1000000>; + ranges = <0 0 0x00000000 0x20000000>, + <5 0 0x2c000000 0x01000000>; + + nand@0,0 { + linux,mtd-name= "micron,mt29c4g96maz"; + reg = <0 0 0>; + nand-bus-width = <16>; + ti,nand-ecc-opt = "bch8"; + + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-off-ns = <40>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SPL"; + reg = <0 0x100000>; + }; + partition@0x80000 { + label = "U-Boot"; + reg = <0x100000 0x180000>; + }; + partition@0x1c0000 { + label = "Environment"; + reg = <0x280000 0x100000>; + }; + partition@0x280000 { + label = "Kernel"; + reg = <0x380000 0x300000>; + }; + partition@0x780000 { + label = "Filesystem"; + reg = <0x680000 0x1f980000>; + }; + }; + ethernet@5,0 { pinctrl-names = "default"; pinctrl-0 = <&smsc911x_pins>; From bc6b820d5605a8bdc29438b26814e3b4b355c24d Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Fri, 10 May 2013 21:40:59 +0200 Subject: [PATCH 09/52] ARM: dts: omap3-igep0030: Add NAND flash support The IGEP COM Module has an 512MB NAND flash memory. Add a device node for this NAND and its partition layout. Signed-off-by: Javier Martinez Canillas Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-igep0030.dts | 50 ++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index 9dc48d262ffb..f65bc3a87bbe 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -42,3 +42,53 @@ }; }; }; + +&gpmc { + ranges = <0 0 0x00000000 0x20000000>; + + nand@0,0 { + linux,mtd-name= "micron,mt29c4g96maz"; + reg = <0 0 0>; + nand-bus-width = <16>; + ti,nand-ecc-opt = "bch8"; + + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-off-ns = <40>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SPL"; + reg = <0 0x100000>; + }; + partition@0x80000 { + label = "U-Boot"; + reg = <0x100000 0x180000>; + }; + partition@0x1c0000 { + label = "Environment"; + reg = <0x280000 0x100000>; + }; + partition@0x280000 { + label = "Kernel"; + reg = <0x380000 0x300000>; + }; + partition@0x780000 { + label = "Filesystem"; + reg = <0x680000 0x1f980000>; + }; + }; +}; From 15e8246bd61bf4723bf39af9811b593a87b1cb38 Mon Sep 17 00:00:00 2001 From: "Philip, Avinash" Date: Fri, 31 May 2013 13:19:03 +0530 Subject: [PATCH 10/52] ARM: dts: AM33XX: Add ELM node ELM hardware engine is used for locating bit-flips in NAND data This patch is required for working of hardware based NAND ECC schemes with DT support. Signed-off-by: Philip Avinash Acked-by: Peter Korsgaard Signed-off-by: Pekon Gupta Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index e7cabe2c890b..7818bf497e31 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -404,6 +404,14 @@ ti,hwmods = "wkup_m3"; }; + elm: elm@48080000 { + compatible = "ti,am3352-elm"; + reg = <0x48080000 0x2000>; + interrupts = <4>; + ti,hwmods = "elm"; + status = "disabled"; + }; + gpmc: gpmc@50000000 { compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc"; From fdc6a2ddd8ee033ffcd8a63ea81a96272587da04 Mon Sep 17 00:00:00 2001 From: Philip Avinash Date: Fri, 31 May 2013 13:19:05 +0530 Subject: [PATCH 11/52] ARM: dts: AM33XX: Add NAND flash device tree data to am335x-evm GPMC controller on AM335x-EVM has a NAND flash connected to it. This patch updates following in am335x-evm.dts: - adds nandflash specific pin-mux configs - adds nand node as child of GPMC contoller, with information about NAND flash interface, NAND partition table, ECC scheme, elm handle id. - updates GPMC node for newer GPMC DT properties added in linux-3.10. Signed-off-by: Philip Avinash Signed-off-by: Gupta, Pekon Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-evm.dts | 105 +++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 896d392dc14d..4dc46fa7ce1c 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -71,6 +71,26 @@ 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ >; }; + + nandflash_pins_s0: nandflash_pins_s0 { + pinctrl-single,pins = < + 0x0 0x30 /* gpmc_ad0.gpmc_ad0, INPUT | PULLUP | MODE0 */ + 0x4 0x30 /* gpmc_ad1.gpmc_ad1, INPUT | PULLUP | MODE0 */ + 0x8 0x30 /* gpmc_ad2.gpmc_ad2, INPUT | PULLUP | MODE0 */ + 0xc 0x30 /* gpmc_ad3.gpmc_ad3, INPUT | PULLUP | MODE0 */ + 0x10 0x30 /* gpmc_ad4.gpmc_ad4, INPUT | PULLUP | MODE0 */ + 0x14 0x30 /* gpmc_ad5.gpmc_ad5, INPUT | PULLUP | MODE0 */ + 0x18 0x30 /* gpmc_ad6.gpmc_ad6, INPUT | PULLUP | MODE0 */ + 0x1c 0x30 /* gpmc_ad7.gpmc_ad7, INPUT | PULLUP | MODE0 */ + 0x70 0x30 /* gpmc_wait0.gpmc_wait0, INPUT | PULLUP | MODE0 */ + 0x74 0x37 /* gpmc_wpn.gpio0_30, INPUT | PULLUP | MODE7 */ + 0x7c 0x8 /* gpmc_csn0.gpmc_csn0, PULL DISA */ + 0x90 0x8 /* gpmc_advn_ale.gpmc_advn_ale, PULL DISA */ + 0x94 0x8 /* gpmc_oen_ren.gpmc_oen_ren, PULL DISA */ + 0x98 0x8 /* gpmc_wen.gpmc_wen, PULL DISA */ + 0x9c 0x8 /* gpmc_be0n_cle.gpmc_be0n_cle, PULL DISA */ + >; + }; }; ocp { @@ -138,6 +158,91 @@ reg = <0x48>; }; }; + + elm: elm@48080000 { + status = "okay"; + }; + + gpmc: gpmc@50000000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins_s0>; + ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ + nand@0,0 { + reg = <0 0 0>; /* CS0, offset 0 */ + nand-bus-width = <8>; + ti,nand-ecc-opt = "bch8"; + gpmc,device-nand = "true"; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <40>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + elm_id = <&elm>; + + /* MTD partition table */ + partition@0 { + label = "SPL1"; + reg = <0x00000000 0x000020000>; + }; + + partition@1 { + label = "SPL2"; + reg = <0x00020000 0x00020000>; + }; + + partition@2 { + label = "SPL3"; + reg = <0x00040000 0x00020000>; + }; + + partition@3 { + label = "SPL4"; + reg = <0x00060000 0x00020000>; + }; + + partition@4 { + label = "U-boot"; + reg = <0x00080000 0x001e0000>; + }; + + partition@5 { + label = "environment"; + reg = <0x00260000 0x00020000>; + }; + + partition@6 { + label = "Kernel"; + reg = <0x00280000 0x00500000>; + }; + + partition@7 { + label = "File-System"; + reg = <0x00780000 0x0F880000>; + }; + }; + }; }; vbat: fixedregulator@0 { From 98ef795714a31b3470e9fdd6e977f6733b83f101 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Fri, 31 May 2013 14:32:55 +0200 Subject: [PATCH 12/52] ARM: dts: OMAP2+: Use #include for all device trees Replace /include/ by #include for OMAP2+ DT, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Florian Vaussard Acked-by: Santosh Shilimkar Reviewed-by: Stephen Warren Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap2.dtsi | 2 +- arch/arm/boot/dts/omap2420-h4.dts | 2 +- arch/arm/boot/dts/omap2420.dtsi | 2 +- arch/arm/boot/dts/omap2430.dtsi | 2 +- arch/arm/boot/dts/omap3-beagle-xm.dts | 4 ++-- arch/arm/boot/dts/omap3-beagle.dts | 4 ++-- arch/arm/boot/dts/omap3-devkit8000.dts | 4 ++-- arch/arm/boot/dts/omap3-evm.dts | 4 ++-- arch/arm/boot/dts/omap3-igep.dtsi | 4 ++-- arch/arm/boot/dts/omap3-igep0020.dts | 2 +- arch/arm/boot/dts/omap3-igep0030.dts | 2 +- arch/arm/boot/dts/omap3-overo.dtsi | 4 ++-- arch/arm/boot/dts/omap3-tobi.dts | 2 +- arch/arm/boot/dts/omap3.dtsi | 2 +- arch/arm/boot/dts/omap3430-sdp.dts | 4 ++-- arch/arm/boot/dts/omap34xx.dtsi | 2 +- arch/arm/boot/dts/omap36xx.dtsi | 2 +- arch/arm/boot/dts/omap4-panda-a4.dts | 4 ++-- arch/arm/boot/dts/omap4-panda-common.dtsi | 4 ++-- arch/arm/boot/dts/omap4-panda-es.dts | 4 ++-- arch/arm/boot/dts/omap4-panda.dts | 4 ++-- arch/arm/boot/dts/omap4-sdp-es23plus.dts | 2 +- arch/arm/boot/dts/omap4-sdp.dts | 6 +++--- arch/arm/boot/dts/omap4-var-som.dts | 4 ++-- arch/arm/boot/dts/omap4.dtsi | 2 +- arch/arm/boot/dts/omap443x.dtsi | 2 +- arch/arm/boot/dts/omap4460.dtsi | 2 +- arch/arm/boot/dts/omap5-evm.dts | 4 ++-- arch/arm/boot/dts/omap5.dtsi | 2 +- 29 files changed, 44 insertions(+), 44 deletions(-) diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 37aa7487d4d8..e6e4587b2a4d 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts index 68282ee13e26..224c08f472f4 100644 --- a/arch/arm/boot/dts/omap2420-h4.dts +++ b/arch/arm/boot/dts/omap2420-h4.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap2420.dtsi" +#include "omap2420.dtsi" / { model = "TI OMAP2420 H4 board"; diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index da5b285b73be..c8f9c55169ea 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap2.dtsi" +#include "omap2.dtsi" / { compatible = "ti,omap2420", "ti,omap2"; diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index 054bc4439568..c535a5a2b27f 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap2.dtsi" +#include "omap2.dtsi" / { compatible = "ti,omap2430", "ti,omap2"; diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index 3046d1f81be0..e0ce823d20b0 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap36xx.dtsi" +#include "omap36xx.dtsi" / { model = "TI OMAP3 BeagleBoard xM"; @@ -75,7 +75,7 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 6eec69997607..fcac96aac3e6 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI OMAP3 BeagleBoard"; @@ -107,7 +107,7 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index 8a5cdcc6debd..8d0f5e40eafe 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TimLL OMAP3 Devkit8000"; compatible = "timll,omap3-devkit8000", "ti,omap3"; @@ -80,7 +80,7 @@ status = "disabled"; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts index 96d1c206a57b..d75759b59841 100644 --- a/arch/arm/boot/dts/omap3-evm.dts +++ b/arch/arm/boot/dts/omap3-evm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI OMAP3 EVM (OMAP3530, AM/DM37x)"; @@ -44,7 +44,7 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index d5cd504bc180..d1d2ba7a9390 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -10,7 +10,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { memory { @@ -86,7 +86,7 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index 0ba43136a37f..c50ce5927af7 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -9,7 +9,7 @@ * published by the Free Software Foundation. */ -/include/ "omap3-igep.dtsi" +#include "omap3-igep.dtsi" / { model = "IGEPv2"; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index f65bc3a87bbe..5061a27563b6 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -9,7 +9,7 @@ * published by the Free Software Foundation. */ -/include/ "omap3-igep.dtsi" +#include "omap3-igep.dtsi" / { model = "IGEP COM Module"; diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index a626c50041f6..e112a424c7a5 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -11,7 +11,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { pwmleds { @@ -49,7 +49,7 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" /* i2c2 pins are used for gpio */ &i2c2 { diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-tobi.dts index a13d12de77ff..5df894f8bdef 100644 --- a/arch/arm/boot/dts/omap3-tobi.dts +++ b/arch/arm/boot/dts/omap3-tobi.dts @@ -10,7 +10,7 @@ * Tobi expansion board is manufactured by Gumstix Inc. */ -/include/ "omap3-overo.dtsi" +#include "omap3-overo.dtsi" / { model = "TI OMAP3 Gumstix Overo on Tobi"; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 99ba6e14ebf3..a0a7b447e48f 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { compatible = "ti,omap3430", "ti,omap3"; diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts index 144ae43453c4..2a725a041668 100644 --- a/arch/arm/boot/dts/omap3430-sdp.dts +++ b/arch/arm/boot/dts/omap3430-sdp.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI OMAP3430 SDP"; @@ -28,7 +28,7 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi index 75ed4ae2e631..5355d6173748 100644 --- a/arch/arm/boot/dts/omap34xx.dtsi +++ b/arch/arm/boot/dts/omap34xx.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap3.dtsi" +#include "omap3.dtsi" / { cpus { diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index f3447bc1b032..f8b3765eb9be 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap3.dtsi" +#include "omap3.dtsi" / { aliases { diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts index e30cdf0f5ac1..f18fb5c25395 100644 --- a/arch/arm/boot/dts/omap4-panda-a4.dts +++ b/arch/arm/boot/dts/omap4-panda-a4.dts @@ -7,8 +7,8 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" -/include/ "omap4-panda-common.dtsi" +#include "omap443x.dtsi" +#include "omap4-panda-common.dtsi" /* Pandaboard Rev A4+ have external pullups on SCL & SDA */ &dss_hdmi_pins { diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index eeb734e25709..171a18533703 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -5,7 +5,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -/include/ "elpida_ecb240abacn.dtsi" +#include "elpida_ecb240abacn.dtsi" / { model = "TI OMAP4 PandaBoard"; @@ -184,7 +184,7 @@ }; }; -/include/ "twl6030.dtsi" +#include "twl6030.dtsi" &i2c2 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index f1d8c217ce12..c6f012ed2a1c 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -7,8 +7,8 @@ */ /dts-v1/; -/include/ "omap4460.dtsi" -/include/ "omap4-panda-common.dtsi" +#include "omap4460.dtsi" +#include "omap4-panda-common.dtsi" /* Audio routing is differnet between PandaBoard4430 and PandaBoardES */ &sound { diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index f8b221f0168e..6189a8b77d7f 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts @@ -7,5 +7,5 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" -/include/ "omap4-panda-common.dtsi" +#include "omap443x.dtsi" +#include "omap4-panda-common.dtsi" diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts index b4a40ffbce31..4f26355bfed1 100644 --- a/arch/arm/boot/dts/omap4-sdp-es23plus.dts +++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts @@ -5,7 +5,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -/include/ "omap4-sdp.dts" +#include "omap4-sdp.dts" /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */ &dss_hdmi_pins { diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 98505a2ef162..fc7c7f490e94 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -7,8 +7,8 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" -/include/ "elpida_ecb240abacn.dtsi" +#include "omap443x.dtsi" +#include "elpida_ecb240abacn.dtsi" / { model = "TI OMAP4 SDP board"; @@ -336,7 +336,7 @@ }; }; -/include/ "twl6030.dtsi" +#include "twl6030.dtsi" &i2c2 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/omap4-var-som.dts b/arch/arm/boot/dts/omap4-var-som.dts index 7e04103779c4..6593607bf2a6 100644 --- a/arch/arm/boot/dts/omap4-var-som.dts +++ b/arch/arm/boot/dts/omap4-var-som.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" +#include "omap443x.dtsi" / { model = "Variscite OMAP4 SOM"; @@ -39,7 +39,7 @@ }; }; -/include/ "twl6030.dtsi" +#include "twl6030.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 006563eec767..7fe2c1883899 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -6,7 +6,7 @@ * published by the Free Software Foundation. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { compatible = "ti,omap4430", "ti,omap4"; diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi index cccf39af4925..a81f8dfb836b 100644 --- a/arch/arm/boot/dts/omap443x.dtsi +++ b/arch/arm/boot/dts/omap443x.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap4.dtsi" +#include "omap4.dtsi" / { cpus { diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi index 2cf227c86099..41762c263a62 100644 --- a/arch/arm/boot/dts/omap4460.dtsi +++ b/arch/arm/boot/dts/omap4460.dtsi @@ -7,7 +7,7 @@ * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ -/include/ "omap4.dtsi" +#include "omap4.dtsi" / { cpus { diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts index 982acd19477d..f5f55d1d88fa 100644 --- a/arch/arm/boot/dts/omap5-evm.dts +++ b/arch/arm/boot/dts/omap5-evm.dts @@ -7,8 +7,8 @@ */ /dts-v1/; -/include/ "omap5.dtsi" -/include/ "samsung_k3pe0e000b.dtsi" +#include "omap5.dtsi" +#include "samsung_k3pe0e000b.dtsi" / { model = "TI OMAP5 EVM board"; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 28ec8061757a..2a48a029a23f 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -7,7 +7,7 @@ * Based on "omap4.dtsi" */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { #address-cells = <1>; From 6d624eabcd4bd11f1304b12f7409a48d3a7743e6 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Fri, 31 May 2013 14:32:56 +0200 Subject: [PATCH 13/52] ARM: dts: OMAP2+: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard Acked-by: Santosh Shilimkar Reviewed-by: Stephen Warren Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap2.dtsi | 2 ++ arch/arm/boot/dts/omap3-beagle-xm.dts | 4 ++-- arch/arm/boot/dts/omap3-beagle.dts | 6 +++--- arch/arm/boot/dts/omap3-devkit8000.dts | 6 +++--- arch/arm/boot/dts/omap3-evm.dts | 2 +- arch/arm/boot/dts/omap3-igep0020.dts | 8 ++++---- arch/arm/boot/dts/omap3-igep0030.dts | 8 ++++---- arch/arm/boot/dts/omap3-tobi.dts | 2 +- arch/arm/boot/dts/omap3.dtsi | 2 ++ arch/arm/boot/dts/omap4-panda-common.dtsi | 4 ++-- arch/arm/boot/dts/omap4-sdp.dts | 16 ++++++++-------- arch/arm/boot/dts/omap4.dtsi | 2 ++ arch/arm/boot/dts/omap5.dtsi | 2 ++ 13 files changed, 36 insertions(+), 28 deletions(-) diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index e6e4587b2a4d..f39b237b9011 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -8,6 +8,8 @@ * kind, whether express or implied. */ +#include + #include "skeleton.dtsi" / { diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index e0ce823d20b0..1e580d9c88ed 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -29,13 +29,13 @@ heartbeat { label = "beagleboard::usr0"; - gpios = <&gpio5 22 0>; /* 150 -> D6 LED */ + gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ linux,default-trigger = "heartbeat"; }; mmc { label = "beagleboard::usr1"; - gpios = <&gpio5 21 0>; /* 149 -> D7 LED */ + gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */ linux,default-trigger = "mmc0"; }; }; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index fcac96aac3e6..434288f30078 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -28,18 +28,18 @@ compatible = "gpio-leds"; pmu_stat { label = "beagleboard::pmu_stat"; - gpios = <&twl_gpio 19 0>; /* LEDB */ + gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ }; heartbeat { label = "beagleboard::usr0"; - gpios = <&gpio5 22 0>; /* 150 -> D6 LED */ + gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ linux,default-trigger = "heartbeat"; }; mmc { label = "beagleboard::usr1"; - gpios = <&gpio5 21 0>; /* 149 -> D7 LED */ + gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */ linux,default-trigger = "mmc0"; }; }; diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index 8d0f5e40eafe..5be71b1b2bdc 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -22,21 +22,21 @@ heartbeat { label = "devkit8000::led1"; - gpios = <&gpio6 26 0>; /* 186 -> LED1 */ + gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */ default-state = "on"; linux,default-trigger = "heartbeat"; }; mmc { label = "devkit8000::led2"; - gpios = <&gpio6 3 0>; /* 163 -> LED2 */ + gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */ default-state = "on"; linux,default-trigger = "none"; }; usr { label = "devkit8000::led3"; - gpios = <&gpio6 4 0>; /* 164 -> LED3 */ + gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */ default-state = "on"; linux,default-trigger = "usr"; }; diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts index d75759b59841..baa24bbbcf57 100644 --- a/arch/arm/boot/dts/omap3-evm.dts +++ b/arch/arm/boot/dts/omap3-evm.dts @@ -28,7 +28,7 @@ compatible = "gpio-leds"; ledb { label = "omap3evm::ledb"; - gpios = <&twl_gpio 19 0>; /* LEDB */ + gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ linux,default-trigger = "default-on"; }; }; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index c50ce5927af7..e8c48284587c 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -19,25 +19,25 @@ compatible = "gpio-leds"; boot { label = "omap3:green:boot"; - gpios = <&gpio1 26 0>; + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; default-state = "on"; }; user0 { label = "omap3:red:user0"; - gpios = <&gpio1 27 0>; + gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; default-state = "off"; }; user1 { label = "omap3:red:user1"; - gpios = <&gpio1 28 0>; + gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; default-state = "off"; }; user2 { label = "omap3:green:user1"; - gpios = <&twl_gpio 19 1>; + gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; }; }; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index 5061a27563b6..644d05383836 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -19,25 +19,25 @@ compatible = "gpio-leds"; boot { label = "omap3:green:boot"; - gpios = <&twl_gpio 13 1>; + gpios = <&twl_gpio 13 GPIO_ACTIVE_LOW>; default-state = "on"; }; user0 { label = "omap3:red:user0"; - gpios = <&twl_gpio 18 1>; /* LEDA */ + gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */ default-state = "off"; }; user1 { label = "omap3:green:user1"; - gpios = <&twl_gpio 19 1>; /* LEDB */ + gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; /* LEDB */ default-state = "off"; }; user2 { label = "omap3:red:user1"; - gpios = <&gpio1 16 1>; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; default-state = "off"; }; }; diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-tobi.dts index 5df894f8bdef..c7eebbf932f5 100644 --- a/arch/arm/boot/dts/omap3-tobi.dts +++ b/arch/arm/boot/dts/omap3-tobi.dts @@ -20,7 +20,7 @@ compatible = "gpio-leds"; heartbeat { label = "overo:red:gpio21"; - gpios = <&gpio1 21 0>; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index a0a7b447e48f..fac923b0afd4 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -8,6 +8,8 @@ * kind, whether express or implied. */ +#include + #include "skeleton.dtsi" / { diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 171a18533703..f5bec4d0a6fa 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -20,13 +20,13 @@ compatible = "gpio-leds"; heartbeat { label = "pandaboard::status1"; - gpios = <&gpio1 7 0>; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; mmc { label = "pandaboard::status2"; - gpios = <&gpio1 8 0>; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; }; }; diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index fc7c7f490e94..7a2619470e8b 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -41,42 +41,42 @@ compatible = "gpio-leds"; debug0 { label = "omap4:green:debug0"; - gpios = <&gpio2 29 0>; /* 61 */ + gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; /* 61 */ }; debug1 { label = "omap4:green:debug1"; - gpios = <&gpio1 30 0>; /* 30 */ + gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; /* 30 */ }; debug2 { label = "omap4:green:debug2"; - gpios = <&gpio1 7 0>; /* 7 */ + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; /* 7 */ }; debug3 { label = "omap4:green:debug3"; - gpios = <&gpio1 8 0>; /* 8 */ + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* 8 */ }; debug4 { label = "omap4:green:debug4"; - gpios = <&gpio2 18 0>; /* 50 */ + gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; /* 50 */ }; user1 { label = "omap4:blue:user"; - gpios = <&gpio6 9 0>; /* 169 */ + gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* 169 */ }; user2 { label = "omap4:red:user"; - gpios = <&gpio6 10 0>; /* 170 */ + gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; /* 170 */ }; user3 { label = "omap4:green:user"; - gpios = <&gpio5 11 0>; /* 139 */ + gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* 139 */ }; }; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 7fe2c1883899..4160d7d8db48 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -6,6 +6,8 @@ * published by the Free Software Foundation. */ +#include + #include "skeleton.dtsi" / { diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 2a48a029a23f..fa3d5a043d93 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -7,6 +7,8 @@ * Based on "omap4.dtsi" */ +#include + #include "skeleton.dtsi" / { From 8fea7d5a749b148a6a914ef2805797682072a6ab Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Fri, 31 May 2013 14:32:57 +0200 Subject: [PATCH 14/52] ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard Acked-by: Santosh Shilimkar Reviewed-by: Stephen Warren Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4-panda-common.dtsi | 8 +- arch/arm/boot/dts/omap4-sdp.dts | 6 +- arch/arm/boot/dts/omap4-var-som.dts | 4 +- arch/arm/boot/dts/omap4.dtsi | 113 ++++++++++---------- arch/arm/boot/dts/omap4460.dtsi | 4 +- arch/arm/boot/dts/omap5.dtsi | 123 +++++++++++----------- 6 files changed, 130 insertions(+), 128 deletions(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index f5bec4d0a6fa..8d09cf55925d 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -165,16 +165,16 @@ twl: twl@48 { reg = <0x48>; - /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ - interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ + /* IRQ# = 7 */ + interrupts = ; /* IRQ_SYS_1N cascaded to gic */ interrupt-parent = <&gic>; }; twl6040: twl@4b { compatible = "ti,twl6040"; reg = <0x4b>; - /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ - interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */ + /* IRQ# = 119 */ + interrupts = ; /* IRQ_SYS_2N cascaded to gic */ interrupt-parent = <&gic>; ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 7a2619470e8b..e9df3ea35834 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -306,7 +306,7 @@ twl: twl@48 { reg = <0x48>; /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ - interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ + interrupts = ; /* IRQ_SYS_1N cascaded to gic */ interrupt-parent = <&gic>; }; @@ -314,7 +314,7 @@ compatible = "ti,twl6040"; reg = <0x4b>; /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ - interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */ + interrupts = ; /* IRQ_SYS_2N cascaded to gic */ interrupt-parent = <&gic>; ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ @@ -395,7 +395,7 @@ spi-max-frequency = <24000000>; reg = <0>; interrupt-parent = <&gpio2>; - interrupts = <2 8>; /* gpio line 34, low triggered */ + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */ vdd-supply = <&vdd_eth>; }; }; diff --git a/arch/arm/boot/dts/omap4-var-som.dts b/arch/arm/boot/dts/omap4-var-som.dts index 6593607bf2a6..b41269e871dd 100644 --- a/arch/arm/boot/dts/omap4-var-som.dts +++ b/arch/arm/boot/dts/omap4-var-som.dts @@ -34,7 +34,7 @@ twl: twl@48 { reg = <0x48>; /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ - interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ + interrupts = ; /* IRQ_SYS_1N cascaded to gic */ interrupt-parent = <&gic>; }; }; @@ -68,7 +68,7 @@ spi-max-frequency = <24000000>; reg = <0>; interrupt-parent = <&gpio6>; - interrupts = <11 8>; /* gpio line 171, low triggered */ + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; /* gpio line 171 */ vdd-supply = <&vdd_eth>; }; }; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 4160d7d8db48..6137aff7dd3b 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -7,6 +7,7 @@ */ #include +#include #include "skeleton.dtsi" @@ -50,7 +51,7 @@ local-timer@0x48240600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x48240600 0x20>; - interrupts = <1 13 0x304>; + interrupts = ; }; /* @@ -91,8 +92,8 @@ reg = <0x44000000 0x1000>, <0x44800000 0x2000>, <0x45000000 0x1000>; - interrupts = <0 9 0x4>, - <0 10 0x4>; + interrupts = , + ; counter32k: counter@4a304000 { compatible = "ti,omap-counter32k"; @@ -120,10 +121,10 @@ sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <0 12 0x4>, - <0 13 0x4>, - <0 14 0x4>, - <0 15 0x4>; + interrupts = , + , + , + ; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -132,7 +133,7 @@ gpio1: gpio@4a310000 { compatible = "ti,omap4-gpio"; reg = <0x4a310000 0x200>; - interrupts = <0 29 0x4>; + interrupts = ; ti,hwmods = "gpio1"; ti,gpio-always-on; gpio-controller; @@ -144,7 +145,7 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <0 30 0x4>; + interrupts = ; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -155,7 +156,7 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <0 31 0x4>; + interrupts = ; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -166,7 +167,7 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <0 32 0x4>; + interrupts = ; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -177,7 +178,7 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <0 33 0x4>; + interrupts = ; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -188,7 +189,7 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <0 34 0x4>; + interrupts = ; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -201,7 +202,7 @@ reg = <0x50000000 0x1000>; #address-cells = <2>; #size-cells = <1>; - interrupts = <0 20 0x4>; + interrupts = ; gpmc,num-cs = <8>; gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; @@ -210,7 +211,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <0 72 0x4>; + interrupts = ; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; @@ -218,7 +219,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <0 73 0x4>; + interrupts = ; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; @@ -226,7 +227,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <0 74 0x4>; + interrupts = ; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; @@ -234,7 +235,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <0 70 0x4>; + interrupts = ; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; @@ -242,7 +243,7 @@ i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <0 56 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -251,7 +252,7 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <0 57 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -260,7 +261,7 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <0 61 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -269,7 +270,7 @@ i2c4: i2c@48350000 { compatible = "ti,omap4-i2c"; reg = <0x48350000 0x100>; - interrupts = <0 62 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -278,7 +279,7 @@ mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <0 65 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -298,7 +299,7 @@ mcspi2: spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <0 66 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -313,7 +314,7 @@ mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <0 91 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -325,7 +326,7 @@ mcspi4: spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <0 48 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; @@ -337,7 +338,7 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <0 83 0x4>; + interrupts = ; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -348,7 +349,7 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <0 86 0x4>; + interrupts = ; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -358,7 +359,7 @@ mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <0 94 0x4>; + interrupts = ; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -368,7 +369,7 @@ mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <0 96 0x4>; + interrupts = ; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -378,7 +379,7 @@ mmc5: mmc@480d5000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d5000 0x400>; - interrupts = <0 59 0x4>; + interrupts = ; ti,hwmods = "mmc5"; ti,needs-special-reset; dmas = <&sdma 59>, <&sdma 60>; @@ -388,7 +389,7 @@ wdt2: wdt@4a314000 { compatible = "ti,omap4-wdt", "ti,omap3-wdt"; reg = <0x4a314000 0x80>; - interrupts = <0 80 0x4>; + interrupts = ; ti,hwmods = "wd_timer2"; }; @@ -397,7 +398,7 @@ reg = <0x40132000 0x7f>, /* MPU private access */ <0x49032000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 112 0x4>; + interrupts = ; ti,hwmods = "mcpdm"; dmas = <&sdma 65>, <&sdma 66>; @@ -409,7 +410,7 @@ reg = <0x4012e000 0x7f>, /* MPU private access */ <0x4902e000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 114 0x4>; + interrupts = ; ti,hwmods = "dmic"; dmas = <&sdma 67>; dma-names = "up_link"; @@ -420,7 +421,7 @@ reg = <0x40122000 0xff>, /* MPU private access */ <0x49022000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 17 0x4>; + interrupts = ; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; @@ -434,7 +435,7 @@ reg = <0x40124000 0xff>, /* MPU private access */ <0x49024000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 22 0x4>; + interrupts = ; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; @@ -448,7 +449,7 @@ reg = <0x40126000 0xff>, /* MPU private access */ <0x49026000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 23 0x4>; + interrupts = ; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; @@ -461,7 +462,7 @@ compatible = "ti,omap4-mcbsp"; reg = <0x48096000 0xff>; /* L4 Interconnect */ reg-names = "mpu"; - interrupts = <0 16 0x4>; + interrupts = ; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; @@ -473,7 +474,7 @@ keypad: keypad@4a31c000 { compatible = "ti,omap4-keypad"; reg = <0x4a31c000 0x80>; - interrupts = <0 120 0x4>; + interrupts = ; reg-names = "mpu"; ti,hwmods = "kbd"; }; @@ -481,7 +482,7 @@ emif1: emif@4c000000 { compatible = "ti,emif-4d"; reg = <0x4c000000 0x100>; - interrupts = <0 110 0x4>; + interrupts = ; ti,hwmods = "emif1"; phy-type = <1>; hw-caps-read-idle-ctrl; @@ -492,7 +493,7 @@ emif2: emif@4d000000 { compatible = "ti,emif-4d"; reg = <0x4d000000 0x100>; - interrupts = <0 111 0x4>; + interrupts = ; ti,hwmods = "emif2"; phy-type = <1>; hw-caps-read-idle-ctrl; @@ -517,7 +518,7 @@ timer1: timer@4a318000 { compatible = "ti,omap3430-timer"; reg = <0x4a318000 0x80>; - interrupts = <0 37 0x4>; + interrupts = ; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -525,21 +526,21 @@ timer2: timer@48032000 { compatible = "ti,omap3430-timer"; reg = <0x48032000 0x80>; - interrupts = <0 38 0x4>; + interrupts = ; ti,hwmods = "timer2"; }; timer3: timer@48034000 { compatible = "ti,omap4430-timer"; reg = <0x48034000 0x80>; - interrupts = <0 39 0x4>; + interrupts = ; ti,hwmods = "timer3"; }; timer4: timer@48036000 { compatible = "ti,omap4430-timer"; reg = <0x48036000 0x80>; - interrupts = <0 40 0x4>; + interrupts = ; ti,hwmods = "timer4"; }; @@ -547,7 +548,7 @@ compatible = "ti,omap4430-timer"; reg = <0x40138000 0x80>, <0x49038000 0x80>; - interrupts = <0 41 0x4>; + interrupts = ; ti,hwmods = "timer5"; ti,timer-dsp; }; @@ -556,7 +557,7 @@ compatible = "ti,omap4430-timer"; reg = <0x4013a000 0x80>, <0x4903a000 0x80>; - interrupts = <0 42 0x4>; + interrupts = ; ti,hwmods = "timer6"; ti,timer-dsp; }; @@ -565,7 +566,7 @@ compatible = "ti,omap4430-timer"; reg = <0x4013c000 0x80>, <0x4903c000 0x80>; - interrupts = <0 43 0x4>; + interrupts = ; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -574,7 +575,7 @@ compatible = "ti,omap4430-timer"; reg = <0x4013e000 0x80>, <0x4903e000 0x80>; - interrupts = <0 44 0x4>; + interrupts = ; ti,hwmods = "timer8"; ti,timer-pwm; ti,timer-dsp; @@ -583,7 +584,7 @@ timer9: timer@4803e000 { compatible = "ti,omap4430-timer"; reg = <0x4803e000 0x80>; - interrupts = <0 45 0x4>; + interrupts = ; ti,hwmods = "timer9"; ti,timer-pwm; }; @@ -591,7 +592,7 @@ timer10: timer@48086000 { compatible = "ti,omap3430-timer"; reg = <0x48086000 0x80>; - interrupts = <0 46 0x4>; + interrupts = ; ti,hwmods = "timer10"; ti,timer-pwm; }; @@ -599,7 +600,7 @@ timer11: timer@48088000 { compatible = "ti,omap4430-timer"; reg = <0x48088000 0x80>; - interrupts = <0 47 0x4>; + interrupts = ; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -607,7 +608,7 @@ usbhstll: usbhstll@4a062000 { compatible = "ti,usbhs-tll"; reg = <0x4a062000 0x1000>; - interrupts = <0 78 0x4>; + interrupts = ; ti,hwmods = "usb_tll_hs"; }; @@ -623,14 +624,14 @@ compatible = "ti,ohci-omap3", "usb-ohci"; reg = <0x4a064800 0x400>; interrupt-parent = <&gic>; - interrupts = <0 76 0x4>; + interrupts = ; }; usbhsehci: ehci@4a064c00 { compatible = "ti,ehci-omap", "usb-ehci"; reg = <0x4a064c00 0x400>; interrupt-parent = <&gic>; - interrupts = <0 77 0x4>; + interrupts = ; }; }; @@ -645,7 +646,7 @@ usb_otg_hs: usb_otg_hs@4a0ab000 { compatible = "ti,omap4-musb"; reg = <0x4a0ab000 0x7ff>; - interrupts = <0 92 0x4>, <0 93 0x4>; + interrupts = , ; interrupt-names = "mc", "dma"; ti,hwmods = "usb_otg_hs"; usb-phy = <&usb2_phy>; diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi index 41762c263a62..19628b171b01 100644 --- a/arch/arm/boot/dts/omap4460.dtsi +++ b/arch/arm/boot/dts/omap4460.dtsi @@ -25,8 +25,8 @@ pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <0 54 0x4>, - <0 55 0x4>; + interrupts = , + ; ti,hwmods = "debugss"; }; }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index fa3d5a043d93..c2f59dea4e55 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -8,6 +8,7 @@ */ #include +#include #include "skeleton.dtsi" @@ -38,11 +39,11 @@ timer { compatible = "arm,armv7-timer"; - /* PPI secure/nonsecure IRQ, active low level-sensitive */ - interrupts = <1 13 0x308>, - <1 14 0x308>, - <1 11 0x308>, - <1 10 0x308>; + /* PPI secure/nonsecure IRQ */ + interrupts = , + , + , + ; clock-frequency = <6144000>; }; @@ -84,8 +85,8 @@ reg = <0x44000000 0x2000>, <0x44800000 0x3000>, <0x45000000 0x4000>; - interrupts = <0 9 0x4>, - <0 10 0x4>; + interrupts = , + ; counter32k: counter@4ae04000 { compatible = "ti,omap-counter32k"; @@ -113,10 +114,10 @@ sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <0 12 0x4>, - <0 13 0x4>, - <0 14 0x4>, - <0 15 0x4>; + interrupts = , + , + , + ; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -125,7 +126,7 @@ gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; - interrupts = <0 29 0x4>; + interrupts = ; ti,hwmods = "gpio1"; ti,gpio-always-on; gpio-controller; @@ -137,7 +138,7 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <0 30 0x4>; + interrupts = ; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -148,7 +149,7 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <0 31 0x4>; + interrupts = ; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -159,7 +160,7 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <0 32 0x4>; + interrupts = ; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -170,7 +171,7 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <0 33 0x4>; + interrupts = ; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -181,7 +182,7 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <0 34 0x4>; + interrupts = ; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -192,7 +193,7 @@ gpio7: gpio@48051000 { compatible = "ti,omap4-gpio"; reg = <0x48051000 0x200>; - interrupts = <0 35 0x4>; + interrupts = ; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -203,7 +204,7 @@ gpio8: gpio@48053000 { compatible = "ti,omap4-gpio"; reg = <0x48053000 0x200>; - interrupts = <0 121 0x4>; + interrupts = ; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>; @@ -216,7 +217,7 @@ reg = <0x50000000 0x1000>; #address-cells = <2>; #size-cells = <1>; - interrupts = <0 20 0x4>; + interrupts = ; gpmc,num-cs = <8>; gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; @@ -225,7 +226,7 @@ i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <0 56 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -234,7 +235,7 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <0 57 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -243,7 +244,7 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <0 61 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -252,7 +253,7 @@ i2c4: i2c@4807a000 { compatible = "ti,omap4-i2c"; reg = <0x4807a000 0x100>; - interrupts = <0 62 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -261,7 +262,7 @@ i2c5: i2c@4807c000 { compatible = "ti,omap4-i2c"; reg = <0x4807c000 0x100>; - interrupts = <0 60 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5"; @@ -270,7 +271,7 @@ mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <0 65 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -290,7 +291,7 @@ mcspi2: spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <0 66 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -305,7 +306,7 @@ mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <0 91 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -317,7 +318,7 @@ mcspi4: spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <0 48 0x4>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; @@ -329,7 +330,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <0 72 0x4>; + interrupts = ; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; @@ -337,7 +338,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <0 73 0x4>; + interrupts = ; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; @@ -345,7 +346,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <0 74 0x4>; + interrupts = ; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; @@ -353,7 +354,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <0 70 0x4>; + interrupts = ; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; @@ -361,7 +362,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = <0 105 0x4>; + interrupts = ; ti,hwmods = "uart5"; clock-frequency = <48000000>; }; @@ -369,7 +370,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = <0 106 0x4>; + interrupts = ; ti,hwmods = "uart6"; clock-frequency = <48000000>; }; @@ -377,7 +378,7 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <0 83 0x4>; + interrupts = ; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -388,7 +389,7 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <0 86 0x4>; + interrupts = ; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -398,7 +399,7 @@ mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <0 94 0x4>; + interrupts = ; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -408,7 +409,7 @@ mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <0 96 0x4>; + interrupts = ; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -418,7 +419,7 @@ mmc5: mmc@480d5000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d5000 0x400>; - interrupts = <0 59 0x4>; + interrupts = ; ti,hwmods = "mmc5"; ti,needs-special-reset; dmas = <&sdma 59>, <&sdma 60>; @@ -436,7 +437,7 @@ reg = <0x40132000 0x7f>, /* MPU private access */ <0x49032000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 112 0x4>; + interrupts = ; ti,hwmods = "mcpdm"; dmas = <&sdma 65>, <&sdma 66>; @@ -448,7 +449,7 @@ reg = <0x4012e000 0x7f>, /* MPU private access */ <0x4902e000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 114 0x4>; + interrupts = ; ti,hwmods = "dmic"; dmas = <&sdma 67>; dma-names = "up_link"; @@ -459,7 +460,7 @@ reg = <0x40122000 0xff>, /* MPU private access */ <0x49022000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 17 0x4>; + interrupts = ; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; @@ -473,7 +474,7 @@ reg = <0x40124000 0xff>, /* MPU private access */ <0x49024000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 22 0x4>; + interrupts = ; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; @@ -487,7 +488,7 @@ reg = <0x40126000 0xff>, /* MPU private access */ <0x49026000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 23 0x4>; + interrupts = ; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; @@ -499,7 +500,7 @@ timer1: timer@4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; - interrupts = <0 37 0x4>; + interrupts = ; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -507,21 +508,21 @@ timer2: timer@48032000 { compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; - interrupts = <0 38 0x4>; + interrupts = ; ti,hwmods = "timer2"; }; timer3: timer@48034000 { compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; - interrupts = <0 39 0x4>; + interrupts = ; ti,hwmods = "timer3"; }; timer4: timer@48036000 { compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; - interrupts = <0 40 0x4>; + interrupts = ; ti,hwmods = "timer4"; }; @@ -529,7 +530,7 @@ compatible = "ti,omap5430-timer"; reg = <0x40138000 0x80>, <0x49038000 0x80>; - interrupts = <0 41 0x4>; + interrupts = ; ti,hwmods = "timer5"; ti,timer-dsp; ti,timer-pwm; @@ -539,7 +540,7 @@ compatible = "ti,omap5430-timer"; reg = <0x4013a000 0x80>, <0x4903a000 0x80>; - interrupts = <0 42 0x4>; + interrupts = ; ti,hwmods = "timer6"; ti,timer-dsp; ti,timer-pwm; @@ -549,7 +550,7 @@ compatible = "ti,omap5430-timer"; reg = <0x4013c000 0x80>, <0x4903c000 0x80>; - interrupts = <0 43 0x4>; + interrupts = ; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -558,7 +559,7 @@ compatible = "ti,omap5430-timer"; reg = <0x4013e000 0x80>, <0x4903e000 0x80>; - interrupts = <0 44 0x4>; + interrupts = ; ti,hwmods = "timer8"; ti,timer-dsp; ti,timer-pwm; @@ -567,7 +568,7 @@ timer9: timer@4803e000 { compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; - interrupts = <0 45 0x4>; + interrupts = ; ti,hwmods = "timer9"; ti,timer-pwm; }; @@ -575,7 +576,7 @@ timer10: timer@48086000 { compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; - interrupts = <0 46 0x4>; + interrupts = ; ti,hwmods = "timer10"; ti,timer-pwm; }; @@ -583,7 +584,7 @@ timer11: timer@48088000 { compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; - interrupts = <0 47 0x4>; + interrupts = ; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -591,7 +592,7 @@ wdt2: wdt@4ae14000 { compatible = "ti,omap5-wdt", "ti,omap3-wdt"; reg = <0x4ae14000 0x80>; - interrupts = <0 80 0x4>; + interrupts = ; ti,hwmods = "wd_timer2"; }; @@ -600,7 +601,7 @@ ti,hwmods = "emif1"; phy-type = <2>; /* DDR PHY type: Intelli PHY */ reg = <0x4c000000 0x400>; - interrupts = <0 110 0x4>; + interrupts = ; hw-caps-read-idle-ctrl; hw-caps-ll-interface; hw-caps-temp-alert; @@ -611,7 +612,7 @@ ti,hwmods = "emif2"; phy-type = <2>; /* DDR PHY type: Intelli PHY */ reg = <0x4d000000 0x400>; - interrupts = <0 111 0x4>; + interrupts = ; hw-caps-read-idle-ctrl; hw-caps-ll-interface; hw-caps-temp-alert; @@ -629,7 +630,7 @@ compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss"; reg = <0x4a020000 0x1000>; - interrupts = <0 93 4>; + interrupts = ; #address-cells = <1>; #size-cells = <1>; utmi-mode = <2>; @@ -637,7 +638,7 @@ dwc3@4a030000 { compatible = "synopsys,dwc3"; reg = <0x4a030000 0x1000>; - interrupts = <0 92 4>; + interrupts = ; usb-phy = <&usb2_phy>, <&usb3_phy>; tx-fifo-resize; }; From 10a3472a83d3be18495d18ed5612394bb6262f58 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Fri, 31 May 2013 14:32:58 +0200 Subject: [PATCH 15/52] ARM: dts: OMAP2+: Header file for pinctrl constants Most of the constants are taken from arch/arm/mach-omap2/mux.h. Define some others for the PIN_OUTPUT_* flavours. Signed-off-by: Florian Vaussard Acked-by: Santosh Shilimkar Reviewed-by: Stephen Warren Signed-off-by: Benoit Cousson --- include/dt-bindings/pinctrl/omap.h | 50 ++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 include/dt-bindings/pinctrl/omap.h diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h new file mode 100644 index 000000000000..370df3f376cb --- /dev/null +++ b/include/dt-bindings/pinctrl/omap.h @@ -0,0 +1,50 @@ +/* + * This header provides constants for OMAP pinctrl bindings. + * + * Copyright (C) 2009 Nokia + * Copyright (C) 2009-2010 Texas Instruments + */ + +/* 34xx mux mode options for each pin. See TRM for options */ +#define MUX_MODE0 0 +#define MUX_MODE1 1 +#define MUX_MODE2 2 +#define MUX_MODE3 3 +#define MUX_MODE4 4 +#define MUX_MODE5 5 +#define MUX_MODE6 6 +#define MUX_MODE7 7 + +/* 24xx/34xx mux bit defines */ +#define PULL_ENA (1 << 3) +#define PULL_UP (1 << 4) +#define ALTELECTRICALSEL (1 << 5) + +/* 34xx specific mux bit defines */ +#define INPUT_EN (1 << 8) +#define OFF_EN (1 << 9) +#define OFFOUT_EN (1 << 10) +#define OFFOUT_VAL (1 << 11) +#define OFF_PULL_EN (1 << 12) +#define OFF_PULL_UP (1 << 13) +#define WAKEUP_EN (1 << 14) + +/* 44xx specific mux bit defines */ +#define WAKEUP_EVENT (1 << 15) + +/* Active pin states */ +#define PIN_OUTPUT 0 +#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) +#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) +#define PIN_INPUT INPUT_EN +#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) + +/* Off mode states */ +#define PIN_OFF_NONE 0 +#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL) +#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN) +#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP) +#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN) +#define PIN_OFF_WAKEUPENABLE WAKEUP_EN + From bcd3cca741a1bb28e78cdcc83551630ed83c8244 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Fri, 31 May 2013 14:32:59 +0200 Subject: [PATCH 16/52] ARM: dts: OMAP2+: Use pinctrl constants Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard Acked-by: Santosh Shilimkar Reviewed-by: Stephen Warren Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap2.dtsi | 1 + arch/arm/boot/dts/omap3-beagle.dts | 24 +++--- arch/arm/boot/dts/omap3-igep.dtsi | 34 ++++---- arch/arm/boot/dts/omap3.dtsi | 1 + arch/arm/boot/dts/omap4-panda-a4.dts | 6 +- arch/arm/boot/dts/omap4-panda-common.dtsi | 54 ++++++------- arch/arm/boot/dts/omap4-panda-es.dts | 6 +- arch/arm/boot/dts/omap4-sdp-es23plus.dts | 6 +- arch/arm/boot/dts/omap4-sdp.dts | 98 +++++++++++------------ arch/arm/boot/dts/omap4.dtsi | 1 + arch/arm/boot/dts/omap5-evm.dts | 88 ++++++++++---------- arch/arm/boot/dts/omap5.dtsi | 1 + 12 files changed, 162 insertions(+), 158 deletions(-) diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index f39b237b9011..b3cc896af6eb 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -9,6 +9,7 @@ */ #include +#include #include "skeleton.dtsi" diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 434288f30078..6d47c4b72bc5 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -81,18 +81,18 @@ hsusbb2_pins: pinmux_hsusbb2_pins { pinctrl-single,pins = < - 0x5c0 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk OUTPUT */ - 0x5c2 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */ - 0x5c4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */ - 0x5c6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */ - 0x5c8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */ - 0x5cA 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */ - 0x1a4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */ - 0x1a6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */ - 0x1a8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */ - 0x1aa 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */ - 0x1ac 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */ - 0x1ae 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */ + 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_clk */ + 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_stp */ + 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dir */ + 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_nxt */ + 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat0 */ + 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat1 */ + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat2 */ + 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat3 */ + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat4 */ + 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat5 */ + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat6 */ + 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat7 */ >; }; }; diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index d1d2ba7a9390..5224c291461f 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -29,43 +29,43 @@ &omap3_pmx_core { uart1_pins: pinmux_uart1_pins { pinctrl-single,pins = < - 0x152 0x100 /* uart1_rx.uart1_rx INPUT | MODE0 */ - 0x14c 0 /* uart1_tx.uart1_tx OUTPUT | MODE0 */ + 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ + 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */ >; }; uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < - 0x14a 0x100 /* uart2_rx.uart2_rx INPUT | MODE0 */ - 0x148 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */ + 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ + 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < - 0x16e 0x100 /* uart3_rx.uart3_rx INPUT | MODE0 */ - 0x170 0 /* uart3_tx.uart3_tx OUTPUT | MODE0 */ + 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0x114 0x0118 /* sdmmc1_clk.sdmmc1_clk INPUT PULLUP | MODE 0 */ - 0x116 0x0118 /* sdmmc1_cmd.sdmmc1_cmd INPUT PULLUP | MODE 0 */ - 0x118 0x0118 /* sdmmc1_dat0.sdmmc1_dat0 INPUT PULLUP | MODE 0 */ - 0x11a 0x0118 /* sdmmc1_dat1.sdmmc1_dat1 INPUT PULLUP | MODE 0 */ - 0x11c 0x0118 /* sdmmc1_dat2.sdmmc1_dat2 INPUT PULLUP | MODE 0 */ - 0x11e 0x0118 /* sdmmc1_dat3.sdmmc1_dat3 INPUT PULLUP | MODE 0 */ - 0x120 0x0100 /* sdmmc1_dat4.sdmmc1_dat4 INPUT | MODE 0 */ - 0x122 0x0100 /* sdmmc1_dat5.sdmmc1_dat5 INPUT | MODE 0 */ - 0x124 0x0100 /* sdmmc1_dat6.sdmmc1_dat6 INPUT | MODE 0 */ - 0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */ + 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ + 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ + 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ + 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ + 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ + 0x120 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ + 0x122 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ + 0x124 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ + 0x126 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ >; }; smsc911x_pins: pinmux_smsc911x_pins { pinctrl-single,pins = < - 0x1a2 0x0104 /* mcspi1_cs2.gpio_176 INPUT | MODE4 */ + 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ >; }; }; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index fac923b0afd4..6d05ee09b3f2 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -9,6 +9,7 @@ */ #include +#include #include "skeleton.dtsi" diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts index f18fb5c25395..133f1b74e8ae 100644 --- a/arch/arm/boot/dts/omap4-panda-a4.dts +++ b/arch/arm/boot/dts/omap4-panda-a4.dts @@ -13,8 +13,8 @@ /* Pandaboard Rev A4+ have external pullups on SCL & SDA */ &dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ - 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 8d09cf55925d..d5d144a1a6c2 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -64,7 +64,7 @@ twl6030_wkup_pins: pinmux_twl6030_wkup_pins { pinctrl-single,pins = < - 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */ + 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ >; }; }; @@ -82,77 +82,77 @@ twl6030_pins: pinmux_twl6030_pins { pinctrl-single,pins = < - 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */ + 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ >; }; twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < - 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ - 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */ + 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ + 0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ >; }; mcpdm_pins: pinmux_mcpdm_pins { pinctrl-single,pins = < - 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */ - 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */ - 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */ - 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */ - 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ + 0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */ + 0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */ + 0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */ + 0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */ + 0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */ >; }; mcbsp1_pins: pinmux_mcbsp1_pins { pinctrl-single,pins = < - 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */ - 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */ - 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */ - 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ + 0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */ + 0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */ + 0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */ + 0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */ >; }; dss_hdmi_pins: pinmux_dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ - 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; tpd12s015_pins: pinmux_tpd12s015_pins { pinctrl-single,pins = < - 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ - 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ - 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ + 0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */ + 0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */ + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < - 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ + 0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < - 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ + 0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ >; }; i2c3_pins: pinmux_i2c3_pins { pinctrl-single,pins = < - 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */ - 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */ + 0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ + 0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ >; }; i2c4_pins: pinmux_i2c4_pins { pinctrl-single,pins = < - 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */ - 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */ + 0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */ + 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ >; }; }; diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index c6f012ed2a1c..5cfdf194252f 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -29,8 +29,8 @@ /* PandaboardES has external pullups on SCL & SDA */ &dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ - 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts index 4f26355bfed1..aad5dda0f469 100644 --- a/arch/arm/boot/dts/omap4-sdp-es23plus.dts +++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts @@ -10,8 +10,8 @@ /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */ &dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ - 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index e9df3ea35834..7951b4ea500a 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -150,7 +150,7 @@ twl6030_wkup_pins: pinmux_twl6030_wkup_pins { pinctrl-single,pins = < - 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */ + 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ >; }; }; @@ -170,129 +170,129 @@ uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < - 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */ - 0xda 0 /* uart2_rts.uart2_rts OUTPUT | MODE0 */ - 0xdc 0x118 /* uart2_rx.uart2_rx INPUT_PULLUP | MODE0 */ - 0xde 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */ + 0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ + 0xda (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ + 0xdc (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */ + 0xde (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < - 0x100 0x118 /* uart3_cts_rctx.uart3_cts_rctx INPUT_PULLUP | MODE0 */ - 0x102 0 /* uart3_rts_sd.uart3_rts_sd OUTPUT | MODE0 */ - 0x104 0x100 /* uart3_rx_irrx.uart3_rx_irrx INPUT | MODE0 */ - 0x106 0 /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ + 0x102 (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ + 0x104 (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x106 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ >; }; uart4_pins: pinmux_uart4_pins { pinctrl-single,pins = < - 0x11c 0x100 /* uart4_rx.uart4_rx INPUT | MODE0 */ - 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */ + 0x11c (PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */ + 0x11e (PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */ >; }; twl6030_pins: pinmux_twl6030_pins { pinctrl-single,pins = < - 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */ + 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ >; }; twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < - 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ - 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */ + 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ + 0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ >; }; mcpdm_pins: pinmux_mcpdm_pins { pinctrl-single,pins = < - 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */ - 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */ - 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */ - 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */ - 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ + 0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */ + 0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */ + 0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */ + 0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */ + 0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */ >; }; dmic_pins: pinmux_dmic_pins { pinctrl-single,pins = < - 0xd0 0 /* abe_dmic_clk1.abe_dmic_clk1 OUTPUT | MODE0 */ - 0xd2 0x100 /* abe_dmic_din1.abe_dmic_din1 INPUT | MODE0 */ - 0xd4 0x100 /* abe_dmic_din2.abe_dmic_din2 INPUT | MODE0 */ - 0xd6 0x100 /* abe_dmic_din3.abe_dmic_din3 INPUT | MODE0 */ + 0xd0 (PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */ + 0xd2 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */ + 0xd4 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */ + 0xd6 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */ >; }; mcbsp1_pins: pinmux_mcbsp1_pins { pinctrl-single,pins = < - 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */ - 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */ - 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */ - 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ + 0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */ + 0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */ + 0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */ + 0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */ >; }; mcbsp2_pins: pinmux_mcbsp2_pins { pinctrl-single,pins = < - 0xb6 0x100 /* abe_mcbsp2_clkx.abe_mcbsp2_clkx INPUT | MODE0 */ - 0xb8 0x108 /* abe_mcbsp2_dr.abe_mcbsp2_dr INPUT PULLDOWN | MODE0 */ - 0xba 0x8 /* abe_mcbsp2_dx.abe_mcbsp2_dx OUTPUT PULLDOWN | MODE0 */ - 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ + 0xb6 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */ + 0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */ + 0xba (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */ + 0xbc (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */ >; }; mcspi1_pins: pinmux_mcspi1_pins { pinctrl-single,pins = < - 0xf2 0x100 /* mcspi1_clk.mcspi1_clk INPUT | MODE0 */ - 0xf4 0x100 /* mcspi1_somi.mcspi1_somi INPUT | MODE0 */ - 0xf6 0x100 /* mcspi1_simo.mcspi1_simo INPUT | MODE0 */ - 0xf8 0x100 /* mcspi1_cs0.mcspi1_cs0 INPUT | MODE0*/ + 0xf2 (PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ + 0xf4 (PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ + 0xf6 (PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ + 0xf8 (PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ >; }; dss_hdmi_pins: pinmux_dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ - 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; tpd12s015_pins: pinmux_tpd12s015_pins { pinctrl-single,pins = < - 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ - 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ - 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ + 0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */ + 0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */ + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < - 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ + 0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < - 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ + 0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ >; }; i2c3_pins: pinmux_i2c3_pins { pinctrl-single,pins = < - 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */ - 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */ + 0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ + 0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ >; }; i2c4_pins: pinmux_i2c4_pins { pinctrl-single,pins = < - 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */ - 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */ + 0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */ + 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ >; }; }; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 6137aff7dd3b..463b97de9ec5 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -8,6 +8,7 @@ #include #include +#include #include "skeleton.dtsi" diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts index f5f55d1d88fa..22e9ee8daedb 100644 --- a/arch/arm/boot/dts/omap5-evm.dts +++ b/arch/arm/boot/dts/omap5-evm.dts @@ -40,106 +40,106 @@ twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < - 0x18a 0x6 /* perslimbus2_clock.gpio5_145 OUTPUT | MODE6 */ + 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */ >; }; mcpdm_pins: pinmux_mcpdm_pins { pinctrl-single,pins = < - 0x142 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ - 0x15c 0x108 /* abemcpdm_ul_data.abemcpdm_ul_data INPUT PULLDOWN | MODE0 */ - 0x15e 0x108 /* abemcpdm_dl_data.abemcpdm_dl_data INPUT PULLDOWN | MODE0 */ - 0x160 0x118 /* abemcpdm_frame.abemcpdm_frame INPUT PULLUP | MODE0 */ - 0x162 0x108 /* abemcpdm_lb_clk.abemcpdm_lb_clk INPUT PULLDOWN | MODE0 */ + 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */ + 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */ + 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */ + 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */ + 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */ >; }; dmic_pins: pinmux_dmic_pins { pinctrl-single,pins = < - 0x144 0x100 /* abedmic_din1.abedmic_din1 INPUT | MODE0 */ - 0x146 0x100 /* abedmic_din2.abedmic_din2 INPUT | MODE0 */ - 0x148 0x100 /* abedmic_din3.abedmic_din3 INPUT | MODE0 */ - 0x14a 0 /* abedmic_clk1.abedmic_clk1 OUTPUT | MODE0 */ + 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */ + 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */ + 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */ + 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */ >; }; mcbsp1_pins: pinmux_mcbsp1_pins { pinctrl-single,pins = < - 0x14c 0x101 /* abedmic_clk2.abemcbsp1_fsx INPUT | MODE1 */ - 0x14e 0x9 /* abedmic_clk3.abemcbsp1_dx OUTPUT PULLDOWN | MODE1 */ - 0x150 0x101 /* abeslimbus1_clock.abemcbsp1_clkx INPUT | MODE0 */ - 0x152 0x109 /* abeslimbus1_data.abemcbsp1_dr INPUT PULLDOWN | MODE1 */ + 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */ + 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */ + 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */ + 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */ >; }; mcbsp2_pins: pinmux_mcbsp2_pins { pinctrl-single,pins = < - 0x154 0x108 /* abemcbsp2_dr.abemcbsp2_dr INPUT PULLDOWN | MODE0 */ - 0x156 0x8 /* abemcbsp2_dx.abemcbsp2_dx OUTPUT PULLDOWN | MODE0 */ - 0x158 0x100 /* abemcbsp2_fsx.abemcbsp2_fsx INPUT | MODE0 */ - 0x15a 0x100 /* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */ + 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */ + 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */ + 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */ + 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */ >; }; - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - 0x1b2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ - 0x1b4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ - >; - }; + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ + 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ + >; + }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < - 0x178 0x100 /* i2c2_scl INPUTENABLE | MODE0 */ - 0x17a 0x100 /* i2c2_sda INPUTENABLE | MODE0 */ + 0x178 (PIN_INPUT | MUX_MODE0) /* i2c2_scl */ + 0x17a (PIN_INPUT | MUX_MODE0) /* i2c2_sda */ >; }; i2c3_pins: pinmux_i2c3_pins { pinctrl-single,pins = < - 0x13a 0x100 /* i2c3_scl INPUTENABLE | MODE0 */ - 0x13c 0x100 /* i2c3_sda INPUTENABLE | MODE0 */ + 0x13a (PIN_INPUT | MUX_MODE0) /* i2c3_scl */ + 0x13c (PIN_INPUT | MUX_MODE0) /* i2c3_sda */ >; }; i2c4_pins: pinmux_i2c4_pins { pinctrl-single,pins = < - 0xb8 0x100 /* i2c4_scl INPUTENABLE | MODE0 */ - 0xba 0x100 /* i2c4_sda INPUTENABLE | MODE0 */ + 0xb8 (PIN_INPUT | MUX_MODE0) /* i2c4_scl */ + 0xba (PIN_INPUT | MUX_MODE0) /* i2c4_sda */ >; }; i2c5_pins: pinmux_i2c5_pins { pinctrl-single,pins = < - 0x184 0x100 /* i2c5_scl INPUTENABLE | MODE0 */ - 0x186 0x100 /* i2c5_sda INPUTENABLE | MODE0 */ + 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */ + 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */ >; }; mcspi2_pins: pinmux_mcspi2_pins { pinctrl-single,pins = < - 0xbc 0x100 /* MCSPI2_CLK INPUTENABLE | MODE0 */ - 0xbe 0x100 /* MCSPI2_SIMO INPUTENABLE | MODE0 */ - 0xc0 0x118 /* MCSPI2_SOMI PULLUP | INPUTENABLE | MODE0*/ - 0xc2 0x0 /* MCSPI2_CS MODE0*/ + 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */ + 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */ + 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */ + 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */ >; }; mcspi3_pins: pinmux_mcspi3_pins { pinctrl-single,pins = < - 0x78 0x101 /* MCSPI2_SOMI INPUTENABLE | MODE1 */ - 0x7a 0x101 /* MCSPI2_CS INPUTENABLE | MODE1 */ - 0x7c 0x101 /* MCSPI2_SIMO INPUTENABLE | MODE1 */ - 0x7e 0x101 /* MCSPI2_CLK INPUTENABLE | MODE1 */ + 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ + 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ + 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ + 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ >; }; mcspi4_pins: pinmux_mcspi4_pins { pinctrl-single,pins = < - 0x164 0x101 /* MCSPI2_CLK INPUTENABLE | MODE1 */ - 0x168 0x101 /* MCSPI2_SIMO INPUTENABLE | MODE1 */ - 0x16a 0x101 /* MCSPI2_SOMI INPUTENABLE | MODE1 */ - 0x16c 0x101 /* MCSPI2_CS INPUTENABLE | MODE1 */ + 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ + 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ + 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ + 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ >; }; }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index c2f59dea4e55..1e84db866af6 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -9,6 +9,7 @@ #include #include +#include #include "skeleton.dtsi" From 3818d7ca11501653c5acd70452fded2184e68bba Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Fri, 31 May 2013 10:44:55 -0500 Subject: [PATCH 17/52] ARM: dts: omap4-panda: Update the LED support for the panda The GPIO for LED D1 on the omap4-panda a1-a3 rev and the omap4-panda-es are different. A1-A3 = gpio_wk7 ES = gpio_110 There is no change to LED D2 Abstract away the pinmux and the LED definitions for the two boards into the respective DTS files. Signed-off-by: Dan Murphy Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4-panda-common.dtsi | 16 ++++++++++++- arch/arm/boot/dts/omap4-panda-es.dts | 28 +++++++++++++++++++++++ 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index d5d144a1a6c2..800fa4e99249 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -16,8 +16,13 @@ reg = <0x80000000 0x40000000>; /* 1 GB */ }; - leds { + leds: leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = < + &led_wkgpio_pins + >; + heartbeat { label = "pandaboard::status1"; gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; @@ -157,6 +162,15 @@ }; }; +&omap4_pmx_wkup { + led_wkgpio_pins: pinmux_leds_wkpins { + pinctrl-single,pins = < + 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */ + 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ + >; + }; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index 5cfdf194252f..56c435468e94 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -34,3 +34,31 @@ 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; + +&omap4_pmx_core { + led_gpio_pins: gpio_led_pmx { + pinctrl-single,pins = < + 0xb6 (PIN_OUTPUT | MUX_MODE3) /* gpio_110 */ + >; + }; +}; + +&led_wkgpio_pins { + pinctrl-single,pins = < + 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ + >; +}; + +&leds { + pinctrl-0 = < + &led_gpio_pins + &led_wkgpio_pins + >; + + heartbeat { + gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>; + }; + mmc { + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; +}; From 78eb938ef2398f3cd090ac60dfbf43f2fc8e96e5 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Fri, 31 May 2013 10:45:22 -0500 Subject: [PATCH 18/52] ARM: dts: omap4-panda: Update the twl6040 gpio to macro definition Update the dt property ti,audpwron-gpio to use the gpio macro definition for GPIO_ACTIVE_HIGH. Signed-off-by: Dan Murphy Reviewed-by: Florian Vaussard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4-panda-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 800fa4e99249..00cbaa51b74b 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -190,7 +190,7 @@ /* IRQ# = 119 */ interrupts = ; /* IRQ_SYS_2N cascaded to gic */ interrupt-parent = <&gic>; - ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ + ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio line 127 */ vio-supply = <&v1v8>; v2v1-supply = <&v2v1>; From 6cfd8117f5722689a9125b5b30302dbe9025b663 Mon Sep 17 00:00:00 2001 From: Afzal Mohammed Date: Mon, 3 Jun 2013 18:49:54 +0530 Subject: [PATCH 19/52] ARM: dts: AM43x: Initial support DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those represented here are the minimal DT nodes necessary to get kernel booting. In DT nodes, "ti,hwmod" property has not been added, this would be added along with PRCM support for AM43x. Signed-off-by: Ankur Kishore Signed-off-by: Afzal Mohammed Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am4372.dtsi | 68 +++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 arch/arm/boot/dts/am4372.dtsi diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi new file mode 100644 index 000000000000..ddc1df77ac52 --- /dev/null +++ b/arch/arm/boot/dts/am4372.dtsi @@ -0,0 +1,68 @@ +/* + * Device Tree Source for AM4372 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include + +#include "skeleton.dtsi" + +/ { + compatible = "ti,am4372", "ti,am43"; + interrupt-parent = <&gic>; + + + aliases { + serial0 = &uart0; + }; + + cpus { + cpu@0 { + compatible = "arm,cortex-a9"; + }; + }; + + gic: interrupt-controller@48241000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48241000 0x1000>, + <0x48240100 0x0100>; + }; + + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart0: serial@44e09000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x44e09000 0x2000>; + interrupts = ; + }; + + timer1: timer@44e31000 { + compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; + reg = <0x44e31000 0x400>; + interrupts = ; + ti,timer-alwon; + }; + + timer2: timer@48040000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48040000 0x400>; + interrupts = ; + }; + + counter32k: counter@44e86000 { + compatible = "ti,am4372-counter32k","ti,omap-counter32k"; + reg = <0x44e86000 0x40>; + }; + }; +}; From eb33ef6619f57304cecc644bfe934f6833da53fb Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Mon, 3 Jun 2013 16:12:22 +0200 Subject: [PATCH 20/52] ARM: dts: AM3XXX: Use #include for all device trees Replace /include/ by #include for AM33XX and AM35XX device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Florian Vaussard Tested-by: Afzal Mohammed Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 2 +- arch/arm/boot/dts/am335x-evm.dts | 4 ++-- arch/arm/boot/dts/am335x-evmsk.dts | 4 ++-- arch/arm/boot/dts/am33xx.dtsi | 2 +- arch/arm/boot/dts/am3517-evm.dts | 2 +- arch/arm/boot/dts/am3517_mt_ventoux.dts | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 74bfcc611051..0365e56e02b5 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "am33xx.dtsi" +#include "am33xx.dtsi" / { model = "TI AM335x BeagleBone"; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 4dc46fa7ce1c..93027736b20b 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "am33xx.dtsi" +#include "am33xx.dtsi" / { model = "TI AM335x EVM"; @@ -301,7 +301,7 @@ }; }; -/include/ "tps65910.dtsi" +#include "tps65910.dtsi" &tps { vcc1-supply = <&vbat>; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 4d81dbcb53ea..83ded8e3b3b2 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -13,7 +13,7 @@ /dts-v1/; -/include/ "am33xx.dtsi" +#include "am33xx.dtsi" / { model = "TI AM335x EVM-SK"; @@ -201,7 +201,7 @@ }; }; -/include/ "tps65910.dtsi" +#include "tps65910.dtsi" &tps { vcc1-supply = <&vbat>; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 7818bf497e31..f6a0117d5c06 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { compatible = "ti,am33xx"; diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts index e9b5bdae4908..e99dfaf70052 100644 --- a/arch/arm/boot/dts/am3517-evm.dts +++ b/arch/arm/boot/dts/am3517-evm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI AM3517 EVM (AM3517/05)"; diff --git a/arch/arm/boot/dts/am3517_mt_ventoux.dts b/arch/arm/boot/dts/am3517_mt_ventoux.dts index 556868388a23..fdf5ce63c8e6 100644 --- a/arch/arm/boot/dts/am3517_mt_ventoux.dts +++ b/arch/arm/boot/dts/am3517_mt_ventoux.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TeeJet Mt.Ventoux"; From e94233c287890a4236cfccc1be7d663435dd1aff Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Mon, 3 Jun 2013 16:12:23 +0200 Subject: [PATCH 21/52] ARM: dts: AM33XX: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard Tested-by: Afzal Mohammed Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 8 ++++---- arch/arm/boot/dts/am335x-evm.dts | 14 +++++++------- arch/arm/boot/dts/am335x-evmsk.dts | 16 ++++++++-------- arch/arm/boot/dts/am33xx.dtsi | 2 ++ 4 files changed, 21 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 0365e56e02b5..5bfb7dd640c2 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -88,27 +88,27 @@ led@2 { label = "beaglebone:green:heartbeat"; - gpios = <&gpio1 21 0>; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "off"; }; led@3 { label = "beaglebone:green:mmc0"; - gpios = <&gpio1 22 0>; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; default-state = "off"; }; led@4 { label = "beaglebone:green:usr2"; - gpios = <&gpio1 23 0>; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led@5 { label = "beaglebone:green:usr3"; - gpios = <&gpio1 24 0>; + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; default-state = "off"; }; }; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 93027736b20b..b74dbdf9253b 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -264,12 +264,12 @@ debounce-delay-ms = <5>; col-scan-delay-us = <2>; - row-gpios = <&gpio1 25 0 /* Bank1, pin25 */ - &gpio1 26 0 /* Bank1, pin26 */ - &gpio1 27 0>; /* Bank1, pin27 */ + row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */ + &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */ + &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */ - col-gpios = <&gpio1 21 0 /* Bank1, pin21 */ - &gpio1 22 0>; /* Bank1, pin22 */ + col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */ + &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */ linux,keymap = <0x0000008b /* MENU */ 0x0100009e /* BACK */ @@ -288,14 +288,14 @@ switch@9 { label = "volume-up"; linux,code = <115>; - gpios = <&gpio0 2 1>; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; gpio-key,wakeup; }; switch@10 { label = "volume-down"; linux,code = <114>; - gpios = <&gpio0 3 1>; + gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; gpio-key,wakeup; }; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 83ded8e3b3b2..16d17d6f4d7f 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -144,26 +144,26 @@ led@1 { label = "evmsk:green:usr0"; - gpios = <&gpio1 4 0>; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led@2 { label = "evmsk:green:usr1"; - gpios = <&gpio1 5 0>; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led@3 { label = "evmsk:green:mmc0"; - gpios = <&gpio1 6 0>; + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; default-state = "off"; }; led@4 { label = "evmsk:green:heartbeat"; - gpios = <&gpio1 7 0>; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "off"; }; @@ -177,26 +177,26 @@ switch@1 { label = "button0"; linux,code = <0x100>; - gpios = <&gpio2 3 0>; + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; }; switch@2 { label = "button1"; linux,code = <0x101>; - gpios = <&gpio2 2 0>; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; }; switch@3 { label = "button2"; linux,code = <0x102>; - gpios = <&gpio0 30 0>; + gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; gpio-key,wakeup; }; switch@4 { label = "button3"; linux,code = <0x103>; - gpios = <&gpio2 5 0>; + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; }; }; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index f6a0117d5c06..d62feb2db350 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -8,6 +8,8 @@ * kind, whether express or implied. */ +#include + #include "skeleton.dtsi" / { From 3f2d1658a759692af19a0867100bd777a3d93184 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Mon, 3 Jun 2013 16:12:24 +0200 Subject: [PATCH 22/52] ARM: dts: AM33XX: Specific pinctrl header The pinctrl IP inside the AM33XX family differs slightly from what is found on OMAP2+. Define a specific header to take account of the differences. Signed-off-by: Florian Vaussard Tested-by: Afzal Mohammed Signed-off-by: Benoit Cousson --- include/dt-bindings/pinctrl/am33xx.h | 37 ++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 include/dt-bindings/pinctrl/am33xx.h diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h new file mode 100644 index 000000000000..a3fddd4f6ecf --- /dev/null +++ b/include/dt-bindings/pinctrl/am33xx.h @@ -0,0 +1,37 @@ +/* + * This header provides constants specific to AM33XX pinctrl bindings. + */ + +#include + +/* am33xx specific mux bit defines */ +#undef PULL_ENA +#undef INPUT_EN + +#define PULL_DISABLE (1 << 3) +#define INPUT_EN (1 << 5) +#define SLEWCTRL_FAST (1 << 6) + +/* update macro depending on INPUT_EN and PULL_ENA */ +#undef PIN_OUTPUT +#undef PIN_OUTPUT_PULLUP +#undef PIN_OUTPUT_PULLDOWN +#undef PIN_INPUT +#undef PIN_INPUT_PULLUP +#undef PIN_INPUT_PULLDOWN + +#define PIN_OUTPUT (PULL_DISABLE) +#define PIN_OUTPUT_PULLUP (PULL_UP) +#define PIN_OUTPUT_PULLDOWN 0 +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (INPUT_EN) + +/* undef non-existing modes */ +#undef PIN_OFF_NONE +#undef PIN_OFF_OUTPUT_HIGH +#undef PIN_OFF_OUTPUT_LOW +#undef PIN_OFF_INPUT_PULLUP +#undef PIN_OFF_INPUT_PULLDOWN +#undef PIN_OFF_WAKEUPENABLE + From 6a8a6b6548216fafb2db6e24a39b728707422bfb Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Mon, 3 Jun 2013 16:12:25 +0200 Subject: [PATCH 23/52] ARM: dts: AM33XX: Use pinctrl constants Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard Tested-by: Afzal Mohammed Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 18 +++++----- arch/arm/boot/dts/am335x-evm.dts | 58 +++++++++++++++--------------- arch/arm/boot/dts/am335x-evmsk.dts | 26 +++++++------- arch/arm/boot/dts/am33xx.dtsi | 1 + 4 files changed, 52 insertions(+), 51 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 5bfb7dd640c2..fd48173dae09 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -30,30 +30,30 @@ user_leds_s0: user_leds_s0 { pinctrl-single,pins = < - 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ - 0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */ - 0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */ - 0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ + 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */ - 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */ - 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < - 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; }; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index b74dbdf9253b..2c5324703c7b 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -30,65 +30,65 @@ matrix_keypad_s0: matrix_keypad_s0 { pinctrl-single,pins = < - 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ - 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */ - 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */ - 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */ - 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ >; }; volume_keys_s0: volume_keys_s0 { pinctrl-single,pins = < - 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */ - 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */ + 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ + 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */ - 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < - 0x158 0x32 /* spi0_d1.i2c1_sda PULLUP | INPUTENABLE | MODE2 */ - 0x15c 0x32 /* spi0_cs0.i2c1_scl PULLUP | INPUTENABLE | MODE2 */ + 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ + 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */ - 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < - 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; nandflash_pins_s0: nandflash_pins_s0 { pinctrl-single,pins = < - 0x0 0x30 /* gpmc_ad0.gpmc_ad0, INPUT | PULLUP | MODE0 */ - 0x4 0x30 /* gpmc_ad1.gpmc_ad1, INPUT | PULLUP | MODE0 */ - 0x8 0x30 /* gpmc_ad2.gpmc_ad2, INPUT | PULLUP | MODE0 */ - 0xc 0x30 /* gpmc_ad3.gpmc_ad3, INPUT | PULLUP | MODE0 */ - 0x10 0x30 /* gpmc_ad4.gpmc_ad4, INPUT | PULLUP | MODE0 */ - 0x14 0x30 /* gpmc_ad5.gpmc_ad5, INPUT | PULLUP | MODE0 */ - 0x18 0x30 /* gpmc_ad6.gpmc_ad6, INPUT | PULLUP | MODE0 */ - 0x1c 0x30 /* gpmc_ad7.gpmc_ad7, INPUT | PULLUP | MODE0 */ - 0x70 0x30 /* gpmc_wait0.gpmc_wait0, INPUT | PULLUP | MODE0 */ - 0x74 0x37 /* gpmc_wpn.gpio0_30, INPUT | PULLUP | MODE7 */ - 0x7c 0x8 /* gpmc_csn0.gpmc_csn0, PULL DISA */ - 0x90 0x8 /* gpmc_advn_ale.gpmc_advn_ale, PULL DISA */ - 0x94 0x8 /* gpmc_oen_ren.gpmc_oen_ren, PULL DISA */ - 0x98 0x8 /* gpmc_wen.gpmc_wen, PULL DISA */ - 0x9c 0x8 /* gpmc_be0n_cle.gpmc_be0n_cle, PULL DISA */ + 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ + 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ + 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ + 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ + 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ + 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ + 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ + 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ + 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 16d17d6f4d7f..338b68188349 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -36,39 +36,39 @@ user_leds_s0: user_leds_s0 { pinctrl-single,pins = < - 0x10 0x7 /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */ - 0x14 0x7 /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */ - 0x18 0x7 /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */ - 0x1c 0x7 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */ + 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ + 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ + 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ + 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ >; }; gpio_keys_s0: gpio_keys_s0 { pinctrl-single,pins = < - 0x94 0x27 /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */ - 0x90 0x27 /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */ - 0x70 0x27 /* gpmc_wait0.gpio0_30, INPUT | MODE7 */ - 0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */ + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ + 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ + 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */ - 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */ + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */ - 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < - 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index d62feb2db350..7334642fd74d 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -9,6 +9,7 @@ */ #include +#include #include "skeleton.dtsi" From 44b5b2d2d405c148545bef910d953e2323769a7c Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Fri, 31 May 2013 16:05:51 +0200 Subject: [PATCH 24/52] ARM: dts: OMAP4/AM35xx: Add missing dtb in the dtbs target When making the dtbs target on OMAP/AM35xx, some trees are not built. Signed-off-by: Florian Vaussard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f0895c581a89..bd388b1b165d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -149,10 +149,13 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap4-panda-es.dtb \ omap4-var-som.dtb \ omap4-sdp.dtb \ + omap4-sdp-es23plus.dtb \ omap5-evm.dtb \ am335x-evm.dtb \ am335x-evmsk.dtb \ - am335x-bone.dtb + am335x-bone.dtb \ + am3517-evm.dtb \ + am3517_mt_ventoux.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ From fa63d037283a6bd0db96078d87192d1aaa073f3c Mon Sep 17 00:00:00 2001 From: Sricharan R Date: Fri, 7 Jun 2013 18:52:47 +0530 Subject: [PATCH 25/52] ARM: dts: omap5: Make uevm as the official board and deprecate sevm support The uevm is the only official board supported for the OMAP5 soc in mainline. The existent sevm platform will no more be supported. Hence cleaning up the board dts file to have only the data required for uevm. Renaming the board dts file and adding the following cleanups. * There are no devices connected on I2C 2,3,4 buses. So remove the pinmux data for the same. * OMAP5432 and DDR3 memory is used in the uevm. Temperature polling is not supported with DDR3 memories. Because of DDR3 phy limitation the voltage change across DVFS and all shadow registers for DVFS on DDR3 is not supported. Hence the emif kernel driver is not required, so removing the DDR3 device file and emif nodes for uevm. * Keypad is not supported on uevm. So remove the device node. Signed-off-by: Sricharan R Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/Makefile | 2 +- .../dts/{omap5-evm.dts => omap5-uevm.dts} | 83 +------------------ 2 files changed, 4 insertions(+), 81 deletions(-) rename arch/arm/boot/dts/{omap5-evm.dts => omap5-uevm.dts} (73%) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index bd388b1b165d..8e507615146b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -150,7 +150,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap4-var-som.dtb \ omap4-sdp.dtb \ omap4-sdp-es23plus.dtb \ - omap5-evm.dtb \ + omap5-uevm.dtb \ am335x-evm.dtb \ am335x-evmsk.dtb \ am335x-bone.dtb \ diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-uevm.dts similarity index 73% rename from arch/arm/boot/dts/omap5-evm.dts rename to arch/arm/boot/dts/omap5-uevm.dts index 22e9ee8daedb..843a0018d541 100644 --- a/arch/arm/boot/dts/omap5-evm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -8,11 +8,10 @@ /dts-v1/; #include "omap5.dtsi" -#include "samsung_k3pe0e000b.dtsi" / { - model = "TI OMAP5 EVM board"; - compatible = "ti,omap5-evm", "ti,omap5"; + model = "TI OMAP5 uEVM board"; + compatible = "ti,omap5-uevm", "ti,omap5"; memory { device_type = "memory"; @@ -88,27 +87,6 @@ >; }; - i2c2_pins: pinmux_i2c2_pins { - pinctrl-single,pins = < - 0x178 (PIN_INPUT | MUX_MODE0) /* i2c2_scl */ - 0x17a (PIN_INPUT | MUX_MODE0) /* i2c2_sda */ - >; - }; - - i2c3_pins: pinmux_i2c3_pins { - pinctrl-single,pins = < - 0x13a (PIN_INPUT | MUX_MODE0) /* i2c3_scl */ - 0x13c (PIN_INPUT | MUX_MODE0) /* i2c3_sda */ - >; - }; - - i2c4_pins: pinmux_i2c4_pins { - pinctrl-single,pins = < - 0xb8 (PIN_INPUT | MUX_MODE0) /* i2c4_scl */ - 0xba (PIN_INPUT | MUX_MODE0) /* i2c4_sda */ - >; - }; - i2c5_pins: pinmux_i2c5_pins { pinctrl-single,pins = < 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */ @@ -175,39 +153,6 @@ clock-frequency = <400000>; }; -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - - clock-frequency = <400000>; - - /* Pressure Sensor */ - bmp085@77 { - compatible = "bosch,bmp085"; - reg = <0x77>; - }; -}; - -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - - clock-frequency = <400000>; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_pins>; - - clock-frequency = <400000>; - - /* Temperature Sensor */ - tmp102@48{ - compatible = "ti,tmp102"; - reg = <0x48>; - }; -}; - &i2c5 { pinctrl-names = "default"; pinctrl-0 = <&i2c5_pins>; @@ -215,32 +160,10 @@ clock-frequency = <400000>; }; -&keypad { - keypad,num-rows = <8>; - keypad,num-columns = <8>; - linux,keymap = <0x02020073 /* VOLUP */ - 0x02030072 /* VOLDOWM */ - 0x020400e7 /* SEND */ - 0x02050066 /* HOME */ - 0x0206006b /* END */ - 0x020700d9>; /* SEARCH */ - linux,input-no-autorepeat; -}; - &mcbsp3 { status = "disabled"; }; -&emif1 { - cs1-used; - device-handle = <&samsung_K3PE0E000B>; -}; - -&emif2 { - cs1-used; - device-handle = <&samsung_K3PE0E000B>; -}; - &mcspi1 { }; From ed7f8e8a1c2a40c332f1701ce317077f3cd35e7c Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 7 Jun 2013 18:52:48 +0530 Subject: [PATCH 26/52] ARM: dts: omap5-uevm: Add USB Host support Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices. Also provide pin multiplexer information for the USB host pins. Signed-off-by: Roger Quadros [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: Sricharan R Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 70 ++++++++++++++++++++++++++++++++ arch/arm/boot/dts/omap5.dtsi | 30 ++++++++++++++ 2 files changed, 100 insertions(+) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 843a0018d541..a31e42f8ec14 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -25,6 +25,40 @@ regulator-max-microvolt = <3000000>; }; + /* HS USB Port 2 RESET */ + hsusb2_reset: hsusb2_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Host PHY on PORT 2 */ + hsusb2_phy: hsusb2_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb2_reset>; + }; + + /* HS USB Port 3 RESET */ + hsusb3_reset: hsusb3_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb3_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Host PHY on PORT 3 */ + hsusb3_phy: hsusb3_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb3_reset>; + }; + }; &omap5_pmx_core { @@ -35,6 +69,7 @@ &dmic_pins &mcbsp1_pins &mcbsp2_pins + &usbhost_pins >; twl6040_pins: pinmux_twl6040_pins { @@ -120,6 +155,32 @@ 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ >; }; + + usbhost_pins: pinmux_usbhost_pins { + pinctrl-single,pins = < + 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */ + 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */ + + 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */ + 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */ + + 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */ + 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */ + >; + }; +}; + +&omap5_pmx_wkup { + pinctrl-names = "default"; + pinctrl-0 = < + &usbhost_wkup_pins + >; + + usbhost_wkup_pins: pinmux_usbhost_wkup_pins { + pinctrl-single,pins = < + 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */ + >; + }; }; &mmc1 { @@ -164,6 +225,15 @@ status = "disabled"; }; +&usbhshost { + port2-mode = "ehci-hsic"; + port3-mode = "ehci-hsic"; +}; + +&usbhsehci { + phys = <0 &hsusb2_phy &hsusb3_phy>; +}; + &mcspi1 { }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 1e84db866af6..accab623dfe4 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -666,5 +666,35 @@ ctrl-module = <&omap_control_usb>; }; }; + + usbhstll: usbhstll@4a062000 { + compatible = "ti,usbhs-tll"; + reg = <0x4a062000 0x1000>; + interrupts = ; + ti,hwmods = "usb_tll_hs"; + }; + + usbhshost: usbhshost@4a064000 { + compatible = "ti,usbhs-host"; + reg = <0x4a064000 0x800>; + ti,hwmods = "usb_host_hs"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbhsohci: ohci@4a064800 { + compatible = "ti,ohci-omap3", "usb-ohci"; + reg = <0x4a064800 0x400>; + interrupt-parent = <&gic>; + interrupts = ; + }; + + usbhsehci: ehci@4a064c00 { + compatible = "ti,ehci-omap", "usb-ehci"; + reg = <0x4a064c00 0x400>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; }; }; From 66155302c495108c0b8042d2b07f4281b14b558d Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Fri, 7 Jun 2013 18:52:49 +0530 Subject: [PATCH 27/52] ARM: dts: omap5-uevm: Add LED support for uEVM blue LED Add support for blue LED 1 off of GPIO 153. Make the LED a heartbeat LED Configure the MUX for GPIO output. Signed-off-by: Dan Murphy [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: Sricharan R Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index a31e42f8ec14..6e8bb861068b 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -59,6 +59,15 @@ reset-supply = <&hsusb3_reset>; }; + leds { + compatible = "gpio-leds"; + led@1 { + label = "omap5:blue:usr1"; + gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */ + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; }; &omap5_pmx_core { @@ -70,6 +79,7 @@ &mcbsp1_pins &mcbsp2_pins &usbhost_pins + &led_gpio_pins >; twl6040_pins: pinmux_twl6040_pins { @@ -168,6 +178,12 @@ 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */ >; }; + + led_gpio_pins: pinmux_led_gpio_pins { + pinctrl-single,pins = < + 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */ + >; + }; }; &omap5_pmx_wkup { From ed22fee3dec69ef026e00983f88bf449ceda3683 Mon Sep 17 00:00:00 2001 From: Sourav Poddar Date: Fri, 7 Jun 2013 18:52:50 +0530 Subject: [PATCH 28/52] ARM: dts: omap5-uevm: Add uart pinctrl data Booting omap5 uevm results in the following error "did not get pins for uart error: -19" This happens because omap5 uevm dts file is not adapted to use uart through pinctrl framework. Populate uart pinctrl data to get rid of the error. Signed-off-by: Sourav Poddar [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: Sricharan R Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 41 ++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 6e8bb861068b..927db1e53fcc 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -184,6 +184,32 @@ 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */ >; }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */ + 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */ + 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */ + 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */ + 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */ + >; + }; + + uart5_pins: pinmux_uart5_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */ + 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */ + 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */ + 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */ + >; + }; + }; &omap5_pmx_wkup { @@ -268,3 +294,18 @@ pinctrl-names = "default"; pinctrl-0 = <&mcspi4_pins>; }; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins>; +}; From b859c1ef92fca08a3079d9ff81e0e0bf7980c855 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 30 May 2013 17:38:00 -0700 Subject: [PATCH 29/52] ARM: dts: OMAP3: beagle/overo: mux console UART, enable wakeup Ensure the console uart (UART3) on these boards is mux'd correctly, and IO ring wakeup is enabled. This is needed for serial console wakeups when using DT boot. Thanks to Florian Vaussard for suggestion to use preprocessor features. Cc: Florian Vaussard Signed-off-by: Kevin Hilman Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-beagle-xm.dts | 14 ++++++++++++++ arch/arm/boot/dts/omap3-beagle.dts | 12 ++++++++++++ arch/arm/boot/dts/omap3-overo.dtsi | 14 ++++++++++++++ 3 files changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index 1e580d9c88ed..7fb806dafbc7 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -126,3 +126,17 @@ mode = <3>; power = <50>; }; + +&omap3_pmx_core { + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + >; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 6d47c4b72bc5..0b6dbfa62c95 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -95,6 +95,13 @@ 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat7 */ >; }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ + >; + }; }; &i2c1 { @@ -142,3 +149,8 @@ */ ti,pulldowns = <0x03a1c4>; }; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index e112a424c7a5..144a5a2fcad8 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -77,3 +77,17 @@ mode = <3>; power = <50>; }; + +&omap3_pmx_core { + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ + >; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; From d641c3d5870db37709f9536054122255f007058c Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 31 May 2013 09:27:05 -0700 Subject: [PATCH 30/52] ARM: dts: OMAP3: beagle: enable user button via gpio_keys, enable wakeup Using the gpio-keys bindings, configure the user button on Beagle boards. Since the user button is enabled as a wakeup source, also ensure the GPIO pin is mux'd correctly and has IO ring wakeups enabled, so it can also wakeup from off mode. Special thanks to Florian Vaussard for suggesting the preprocessor feature. Cc: Florian Vaussard Signed-off-by: Kevin Hilman Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-beagle-xm.dts | 25 +++++++++++++++++++++++++ arch/arm/boot/dts/omap3-beagle.dts | 25 +++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index 7fb806dafbc7..ad17b6bdc87a 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -57,6 +57,26 @@ ti,mcbsp = <&mcbsp2>; ti,codec = <&twl_audio>; }; + + gpio_keys { + compatible = "gpio-keys"; + + user { + label = "user"; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + linux,code = <0x114>; + gpio-key,wakeup; + }; + + }; +}; + +&omap3_pmx_wkup { + gpio1_pins: pinmux_gpio1_pins { + pinctrl-single,pins = < + 0x0e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */ + >; + }; }; &i2c1 { @@ -140,3 +160,8 @@ pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; }; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 0b6dbfa62c95..eb7e02a01a0b 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -71,6 +71,26 @@ reset-supply = <&hsusb2_reset>; vcc-supply = <&hsusb2_power>; }; + + gpio_keys { + compatible = "gpio-keys"; + + user { + label = "user"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + linux,code = <0x114>; + gpio-key,wakeup; + }; + + }; +}; + +&omap3_pmx_wkup { + gpio1_pins: pinmux_gpio1_pins { + pinctrl-single,pins = < + 0x14 (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */ + >; + }; }; &omap3_pmx_core { @@ -154,3 +174,8 @@ pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; }; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; +}; From f96884574d2d39041a00603341d8300d29a29aad Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 31 May 2013 14:09:34 -0700 Subject: [PATCH 31/52] ARM: dts: TWL4030: fix mux and wakeup for SYS_NIRQ line On most OMAP3 platforms, the twl4030 IRQ line is connected to the SYS_NIRQ line on OMAP. Add another DTS include file (twl4030_omap3.dtsi) for boards that hook up the twl4030 this way to include. This allows RTC wake from off-mode to work again on OMAP3-based platforms with twl4030. Tested on 3530/Beagle, 3730/Beagle-xM, 3530/Overo, 3730/Overo-STORM. Special thanks to Florian Vaussard for suggesting use of preprocessor feature. Cc: Florian Vaussard Cc: Benoit Cousson Cc: Nishanth Menon Signed-off-by: Kevin Hilman Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-beagle-xm.dts | 1 + arch/arm/boot/dts/omap3-beagle.dts | 1 + arch/arm/boot/dts/omap3-devkit8000.dts | 1 + arch/arm/boot/dts/omap3-evm.dts | 1 + arch/arm/boot/dts/omap3-igep.dtsi | 1 + arch/arm/boot/dts/omap3-overo.dtsi | 1 + arch/arm/boot/dts/omap3430-sdp.dts | 1 + arch/arm/boot/dts/twl4030_omap3.dtsi | 25 +++++++++++++++++++++++++ 8 files changed, 32 insertions(+) create mode 100644 arch/arm/boot/dts/twl4030_omap3.dtsi diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index ad17b6bdc87a..afdb16417d4e 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -96,6 +96,7 @@ }; #include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index eb7e02a01a0b..dfd83103657a 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -135,6 +135,7 @@ }; #include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index 5be71b1b2bdc..af32eff9f4b7 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -81,6 +81,7 @@ }; #include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts index baa24bbbcf57..7d4329d179c4 100644 --- a/arch/arm/boot/dts/omap3-evm.dts +++ b/arch/arm/boot/dts/omap3-evm.dts @@ -45,6 +45,7 @@ }; #include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index 5224c291461f..bc48b114eae6 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -87,6 +87,7 @@ }; #include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index 144a5a2fcad8..4bc788965035 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -50,6 +50,7 @@ }; #include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" /* i2c2 pins are used for gpio */ &i2c2 { diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts index 2a725a041668..c4a1c0a97728 100644 --- a/arch/arm/boot/dts/omap3430-sdp.dts +++ b/arch/arm/boot/dts/omap3430-sdp.dts @@ -29,6 +29,7 @@ }; #include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/twl4030_omap3.dtsi b/arch/arm/boot/dts/twl4030_omap3.dtsi new file mode 100644 index 000000000000..c353ef0a6ac7 --- /dev/null +++ b/arch/arm/boot/dts/twl4030_omap3.dtsi @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2013 Linaro, Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&twl { + pinctrl-names = "default"; + pinctrl-0 = <&twl4030_pins>; +}; + +&omap3_pmx_core { + /* + * On most OMAP3 platforms, the twl4030 IRQ line is connected + * to the SYS_NIRQ line on OMAP. Therefore, configure the + * defaults for the SYS_NIRQ pin here. + */ + twl4030_pins: pinmux_twl4030_pins { + pinctrl-single,pins = < + 0x1b0 (PIN_INPUT_PULLUP | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */ + >; + }; +}; From 8ed94f24da6ecccd5c1a8eecfb3316c93aa5f816 Mon Sep 17 00:00:00 2001 From: Eduardo Valentin Date: Fri, 7 Jun 2013 16:46:05 -0400 Subject: [PATCH 32/52] ARM: dts: OMAP443x: Add bandgap entry for OMAP443x devices Add the bandgap entry for OMAP4430 devices. Signed-off-by: Eduardo Valentin Cc: Tony Lindgren Cc: Russell King [benoit.cousson@linaro.org: Add blank line and fix reg presentation] Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap443x.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi index a81f8dfb836b..bcf455efe18d 100644 --- a/arch/arm/boot/dts/omap443x.dtsi +++ b/arch/arm/boot/dts/omap443x.dtsi @@ -24,4 +24,10 @@ clock-latency = <300000>; /* From legacy driver */ }; }; + + bandgap { + reg = <0x4a002260 0x4 + 0x4a00232C 0x4>; + compatible = "ti,omap4430-bandgap"; + }; }; From c9600e25840a834309dfcd3ec30c2efcd74d0802 Mon Sep 17 00:00:00 2001 From: Eduardo Valentin Date: Fri, 7 Jun 2013 16:46:06 -0400 Subject: [PATCH 33/52] ARM: dts: OMAP4460: Add bandgap entry for OMAP4460 devices Add bandgap devices for OMAP4460 devices. Signed-off-by: Eduardo Valentin Cc: Tony Lindgren Cc: Russell King Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4460.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi index 19628b171b01..c2f0f39b5a24 100644 --- a/arch/arm/boot/dts/omap4460.dtsi +++ b/arch/arm/boot/dts/omap4460.dtsi @@ -29,4 +29,13 @@ ; ti,hwmods = "debugss"; }; + + bandgap { + reg = <0x4a002260 0x4 + 0x4a00232C 0x4 + 0x4a002378 0x18>; + compatible = "ti,omap4460-bandgap"; + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */ + gpios = <&gpio3 22 0>; /* tshut */ + }; }; From 0a7486c93ed3355efee8e7e10ca370c2d83d8df9 Mon Sep 17 00:00:00 2001 From: Philip Avinash Date: Thu, 6 Jun 2013 15:52:37 +0200 Subject: [PATCH 34/52] ARM: dts: AM33XX: Add PWMSS device tree nodes Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by adding necessary properties like pwm-cells, base reg & set disabled as status. Signed-off-by: Philip Avinash Reviewed-by: Thierry Reding Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am33xx.dtsi | 84 +++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 7334642fd74d..0b9e4163fec2 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -346,6 +346,90 @@ ti,hwmods = "usb_otg_hs"; }; + epwmss0: epwmss@48300000 { + compatible = "ti,am33xx-pwmss"; + reg = <0x48300000 0x10>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48300100 0x48300100 0x80 /* ECAP */ + 0x48300180 0x48300180 0x80 /* EQEP */ + 0x48300200 0x48300200 0x80>; /* EHRPWM */ + + ecap0: ecap@48300100 { + compatible = "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48300100 0x80>; + ti,hwmods = "ecap0"; + status = "disabled"; + }; + + ehrpwm0: ehrpwm@48300200 { + compatible = "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48300200 0x80>; + ti,hwmods = "ehrpwm0"; + status = "disabled"; + }; + }; + + epwmss1: epwmss@48302000 { + compatible = "ti,am33xx-pwmss"; + reg = <0x48302000 0x10>; + ti,hwmods = "epwmss1"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48302100 0x48302100 0x80 /* ECAP */ + 0x48302180 0x48302180 0x80 /* EQEP */ + 0x48302200 0x48302200 0x80>; /* EHRPWM */ + + ecap1: ecap@48302100 { + compatible = "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48302100 0x80>; + ti,hwmods = "ecap1"; + status = "disabled"; + }; + + ehrpwm1: ehrpwm@48302200 { + compatible = "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48302200 0x80>; + ti,hwmods = "ehrpwm1"; + status = "disabled"; + }; + }; + + epwmss2: epwmss@48304000 { + compatible = "ti,am33xx-pwmss"; + reg = <0x48304000 0x10>; + ti,hwmods = "epwmss2"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48304100 0x48304100 0x80 /* ECAP */ + 0x48304180 0x48304180 0x80 /* EQEP */ + 0x48304200 0x48304200 0x80>; /* EHRPWM */ + + ecap2: ecap@48304100 { + compatible = "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48304100 0x80>; + ti,hwmods = "ecap2"; + status = "disabled"; + }; + + ehrpwm2: ehrpwm@48304200 { + compatible = "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48304200 0x80>; + ti,hwmods = "ehrpwm2"; + status = "disabled"; + }; + }; + mac: ethernet@4a100000 { compatible = "ti,cpsw"; ti,hwmods = "cpgmac0"; From 6993fd01ebf2985e0c67088b47559bc513f2840b Mon Sep 17 00:00:00 2001 From: Philip Avinash Date: Thu, 6 Jun 2013 15:52:38 +0200 Subject: [PATCH 35/52] ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evm PWM output from ecap0 uses as backlight source. Also adds low threshold value to have a uniform divisions in brightness-levels scales. Signed-off-by: Philip Avinash Reviewed-by: Thierry Reding Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-evm.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 2c5324703c7b..a150d0441b5e 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -91,6 +91,12 @@ 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; + + ecap0_pins: backlight_pins { + pinctrl-single,pins = < + 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ + >; + }; }; ocp { @@ -163,6 +169,16 @@ status = "okay"; }; + epwmss0: epwmss@48300000 { + status = "okay"; + + ecap0: ecap@48300100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap0_pins>; + }; + }; + gpmc: gpmc@50000000 { status = "okay"; pinctrl-names = "default"; @@ -299,6 +315,13 @@ gpio-key,wakeup; }; }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&ecap0 0 50000 0>; + brightness-levels = <0 51 53 56 62 75 101 152 255>; + default-brightness-level = <8>; + }; }; #include "tps65910.dtsi" From 1632fbdee713de3213b24eda9de062c0ef865634 Mon Sep 17 00:00:00 2001 From: Philip Avinash Date: Thu, 6 Jun 2013 15:52:39 +0200 Subject: [PATCH 36/52] ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evmsk PWM output from ecap2 uses as backlight source. Also adds low threshold value to have a uniform divisions in brightness-levels scales with inverse polarity. Signed-off-by: Philip Avinash Reviewed-by: Thierry Reding Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-evmsk.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 338b68188349..2033a37c86ec 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -71,6 +71,12 @@ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; + + ecap2_pins: backlight_pins { + pinctrl-single,pins = < + 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ + >; + }; }; ocp { @@ -120,6 +126,16 @@ st,max-limit-z = <750>; }; }; + + epwmss2: epwmss@48304000 { + status = "okay"; + + ecap2: ecap@48304100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap2_pins>; + }; + }; }; vbat: fixedregulator@0 { @@ -199,6 +215,13 @@ gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; }; }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&ecap2 0 50000 1>; + brightness-levels = <0 58 61 66 75 90 125 170 255>; + default-brightness-level = <8>; + }; }; #include "tps65910.dtsi" From e00c27ef3b4c23e39d0a77b7c8e5be44c28001c7 Mon Sep 17 00:00:00 2001 From: J Keerthy Date: Thu, 13 Jun 2013 10:00:11 +0530 Subject: [PATCH 37/52] ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes Add Palmas MFD node and the regulator nodes for OMAP5. The node definitions are based on: https://lkml.org/lkml/2013/6/6/25 Boot tested on omap5-uevm board. Signed-off-by: Graeme Gregory Signed-off-by: J Keerthy Reviewed-by: Stephen Warren Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 167 +++++++++++++++++++++++++++++++ 1 file changed, 167 insertions(+) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 927db1e53fcc..30adeaf47883 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -8,6 +8,8 @@ /dts-v1/; #include "omap5.dtsi" +#include +#include / { model = "TI OMAP5 uEVM board"; @@ -254,6 +256,171 @@ pinctrl-0 = <&i2c1_pins>; clock-frequency = <400000>; + + palmas: palmas@48 { + compatible = "ti,palmas"; + interrupts = ; /* IRQ_SYS_1N */ + interrupt-parent = <&gic>; + reg = <0x48>; + interrupt-controller; + #interrupt-cells = <2>; + + palmas_pmic { + compatible = "ti,palmas-pmic"; + interrupt-parent = <&palmas>; + interrupts = <14 IRQ_TYPE_NONE>; + interrupt-name = "short-irq"; + + ti,ldo6-vibrator; + + regulators { + smps123_reg: smps123 { + regulator-name = "smps123"; + regulator-min-microvolt = < 600000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + smps45_reg: smps45 { + regulator-name = "smps45"; + regulator-min-microvolt = < 600000>; + regulator-max-microvolt = <1310000>; + regulator-always-on; + regulator-boot-on; + }; + + smps6_reg: smps6 { + regulator-name = "smps6"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + smps7_reg: smps7 { + regulator-name = "smps7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + smps8_reg: smps8 { + regulator-name = "smps8"; + regulator-min-microvolt = < 600000>; + regulator-max-microvolt = <1310000>; + regulator-always-on; + regulator-boot-on; + }; + + smps9_reg: smps9 { + regulator-name = "smps9"; + regulator-min-microvolt = <2100000>; + regulator-max-microvolt = <2100000>; + regulator-always-on; + regulator-boot-on; + ti,smps-range = <0x80>; + }; + + smps10_reg: smps10 { + regulator-name = "smps10"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2_reg: ldo2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo3_reg: ldo3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4_reg: ldo4 { + regulator-name = "ldo4"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5_reg: ldo5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo6_reg: ldo6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo7_reg: ldo7 { + regulator-name = "ldo7"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo8_reg: ldo8 { + regulator-name = "ldo8"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo9_reg: ldo9 { + regulator-name = "ldo9"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldoln_reg: ldoln { + regulator-name = "ldoln"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldousb_reg: ldousb { + regulator-name = "ldousb"; + regulator-min-microvolt = <3250000>; + regulator-max-microvolt = <3250000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; }; &i2c5 { From 4fd8a19e28f73495837cca7ad1329069d373e98a Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Tue, 18 Jun 2013 10:37:59 +0530 Subject: [PATCH 38/52] ARM: AM33XX: clock: Add debugSS clock nodes Represent debugSS clock interface as provided in CM_WKUP_DEBUGSS_CLKCTRL register, includes - Clock gate for optional DEBUG_CLKA and DBGSYSCLK - Clock Mux for TRC_PMD and STM_PMD - Clock divider for STM and TPIU Signed-off-by: Vaibhav Hiremath Acked-by: Paul Walmsley Cc: Tony Lindgren Signed-off-by: Benoit Cousson --- arch/arm/mach-omap2/cclock33xx_data.c | 47 ++++++++++++++++++++++++--- 1 file changed, 42 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index af3544ce4f02..6fd0ed14bca4 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -431,15 +431,11 @@ DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null); * - Driver code is not yet migrated to use hwmod/runtime pm * - Modules outside kernel access (to disable them by default) * - * - debugss * - mmu (gfx domain) * - cefuse * - usbotg_fck (its additional clock and not really a modulemode) * - ieee5000 */ -DEFINE_CLK_GATE(debugss_ick, "dpll_core_m4_ck", &dpll_core_m4_ck, 0x0, - AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT, - 0x0, NULL); DEFINE_CLK_GATE(mmu_fck, "dpll_core_m4_ck", &dpll_core_m4_ck, 0x0, AM33XX_CM_GFX_MMUDATA_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT, @@ -862,6 +858,42 @@ static struct clk_hw_omap wdt1_fck_hw = { DEFINE_STRUCT_CLK(wdt1_fck, wdt_ck_parents, gpio_fck_ops); +/* + * debugss optional clocks + */ +DEFINE_CLK_GATE(dbg_sysclk_ck, "sys_clkin_ck", &sys_clkin_ck, + 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_OPTFCLKEN_DBGSYSCLK_SHIFT, 0x0, NULL); + +DEFINE_CLK_GATE(dbg_clka_ck, "dpll_core_m4_ck", &dpll_core_m4_ck, + 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_OPTCLK_DEBUG_CLKA_SHIFT, 0x0, NULL); + +static const char *stm_pmd_clock_mux_ck_parents[] = { + "dbg_sysclk_ck", "dbg_clka_ck", +}; + +DEFINE_CLK_MUX(stm_pmd_clock_mux_ck, stm_pmd_clock_mux_ck_parents, NULL, 0x0, + AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, AM33XX_STM_PMD_CLKSEL_SHIFT, + AM33XX_STM_PMD_CLKSEL_WIDTH, 0x0, NULL); + +DEFINE_CLK_MUX(trace_pmd_clk_mux_ck, stm_pmd_clock_mux_ck_parents, NULL, 0x0, + AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_TRC_PMD_CLKSEL_SHIFT, + AM33XX_TRC_PMD_CLKSEL_WIDTH, 0x0, NULL); + +DEFINE_CLK_DIVIDER(stm_clk_div_ck, "stm_pmd_clock_mux_ck", + &stm_pmd_clock_mux_ck, 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_STM_PMD_CLKDIVSEL_SHIFT, + AM33XX_STM_PMD_CLKDIVSEL_WIDTH, CLK_DIVIDER_POWER_OF_TWO, + NULL); + +DEFINE_CLK_DIVIDER(trace_clk_div_ck, "trace_pmd_clk_mux_ck", + &trace_pmd_clk_mux_ck, 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_TRC_PMD_CLKDIVSEL_SHIFT, + AM33XX_TRC_PMD_CLKDIVSEL_WIDTH, CLK_DIVIDER_POWER_OF_TWO, + NULL); + /* * clkdev */ @@ -899,7 +931,6 @@ static struct omap_clk am33xx_clks[] = { CLK("481cc000.d_can", NULL, &dcan0_fck), CLK(NULL, "dcan1_fck", &dcan1_fck), CLK("481d0000.d_can", NULL, &dcan1_fck), - CLK(NULL, "debugss_ick", &debugss_ick), CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk), CLK(NULL, "mcasp0_fck", &mcasp0_fck), CLK(NULL, "mcasp1_fck", &mcasp1_fck), @@ -942,6 +973,12 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "clkout2_div_ck", &clkout2_div_ck), CLK(NULL, "timer_32k_ck", &clkdiv32k_ick), CLK(NULL, "timer_sys_ck", &sys_clkin_ck), + CLK(NULL, "dbg_sysclk_ck", &dbg_sysclk_ck), + CLK(NULL, "dbg_clka_ck", &dbg_clka_ck), + CLK(NULL, "stm_pmd_clock_mux_ck", &stm_pmd_clock_mux_ck), + CLK(NULL, "trace_pmd_clk_mux_ck", &trace_pmd_clk_mux_ck), + CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck), + CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck), }; From 75fbbca2b11ce7c8ee728a8c5d0e58b477eccf4f Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 20 May 2013 18:58:09 +0530 Subject: [PATCH 39/52] ARM: AM33XX: clock data: Enable clkout2 as part of init clkout2 comes out on the pad and is being used by various external on-board peripherals like, Audio codecs and stuff. So enable the clkout2 by default during init sequence itself. Also, add the missing entry of "clkout2_ck" to the clock table. Signed-off-by: Vaibhav Hiremath Acked-by: Paul Walmsley Signed-off-by: Benoit Cousson --- arch/arm/mach-omap2/cclock33xx_data.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index 6fd0ed14bca4..a8140b6885e3 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -979,6 +979,7 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "trace_pmd_clk_mux_ck", &trace_pmd_clk_mux_ck), CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck), CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck), + CLK(NULL, "clkout2_ck", &clkout2_ck), }; @@ -989,6 +990,7 @@ static const char *enable_init_clks[] = { "l4hs_gclk", "l4fw_gclk", "l4ls_gclk", + "clkout2_ck", /* Required for external peripherals like, Audio codecs */ }; int __init am33xx_clk_init(void) From ac25da7f30a118b7021c5b49c2cc50ba832db962 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Tue, 11 Jun 2013 16:50:50 +0200 Subject: [PATCH 40/52] ARM: dts: Protect pinctrl headers against multiple inclusions Pinctrl headers were not protected with #ifndef. Signed-off-by: Florian Vaussard Acked-by: Grant Likely Signed-off-by: Benoit Cousson --- include/dt-bindings/pinctrl/am33xx.h | 5 +++++ include/dt-bindings/pinctrl/omap.h | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h index a3fddd4f6ecf..469e0325e6f4 100644 --- a/include/dt-bindings/pinctrl/am33xx.h +++ b/include/dt-bindings/pinctrl/am33xx.h @@ -2,6 +2,9 @@ * This header provides constants specific to AM33XX pinctrl bindings. */ +#ifndef _DT_BINDINGS_PINCTRL_AM33XX_H +#define _DT_BINDINGS_PINCTRL_AM33XX_H + #include /* am33xx specific mux bit defines */ @@ -35,3 +38,5 @@ #undef PIN_OFF_INPUT_PULLDOWN #undef PIN_OFF_WAKEUPENABLE +#endif + diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h index 370df3f376cb..edbd250809cb 100644 --- a/include/dt-bindings/pinctrl/omap.h +++ b/include/dt-bindings/pinctrl/omap.h @@ -5,6 +5,9 @@ * Copyright (C) 2009-2010 Texas Instruments */ +#ifndef _DT_BINDINGS_PINCTRL_OMAP_H +#define _DT_BINDINGS_PINCTRL_OMAP_H + /* 34xx mux mode options for each pin. See TRM for options */ #define MUX_MODE0 0 #define MUX_MODE1 1 @@ -48,3 +51,5 @@ #define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN) #define PIN_OFF_WAKEUPENABLE WAKEUP_EN +#endif + From 71fdc6e4889481541942bffb68a3cb8f141b6f30 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Tue, 11 Jun 2013 16:49:46 +0200 Subject: [PATCH 41/52] ARM: dts: OMAP3: Include IRQ header Some nodes in OMAP3 DTS now use edge or level sensitive interrupts. Signed-off-by: Florian Vaussard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 6d05ee09b3f2..8e1a87f8bd9f 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -9,6 +9,7 @@ */ #include +#include #include #include "skeleton.dtsi" From c6ef01322b45ac241227a65f576ed3c60b88c8a1 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Tue, 11 Jun 2013 16:49:47 +0200 Subject: [PATCH 42/52] ARM: dts: omap3-tobi: Add SMSC911X node The Tobi expansion boards embeds a SMSC LAN8700 PHY. Add the corresponding node into the DT. The regulators are not designed to be turned off. Signed-off-by: Florian Vaussard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-tobi.dts | 48 ++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-tobi.dts index c7eebbf932f5..b36b5539dde3 100644 --- a/arch/arm/boot/dts/omap3-tobi.dts +++ b/arch/arm/boot/dts/omap3-tobi.dts @@ -24,6 +24,54 @@ linux,default-trigger = "heartbeat"; }; }; + + vddvario: regulator-vddvario { + compatible = "regulator-fixed"; + regulator-name = "vddvario"; + regulator-always-on; + }; + + vdd33a: regulator-vdd33a { + compatible = "regulator-fixed"; + regulator-name = "vdd33a"; + regulator-always-on; + }; +}; + +&gpmc { + ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */ + + ethernet@5,0 { + compatible = "smsc,lan9221", "smsc,lan9115"; + reg = <5 0 0xff>; + bank-width = <2>; + + gpmc,mux-add-data; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <42>; + gpmc,cs-wr-off-ns = <36>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <12>; + gpmc,adv-wr-off-ns = <12>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <42>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <36>; + gpmc,rd-cycle-ns = <60>; + gpmc,wr-cycle-ns = <54>; + gpmc,access-ns = <36>; + gpmc,page-burst-access-ns = <0>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,wr-data-mux-bus-ns = <18>; + gpmc,wr-access-ns = <42>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + + interrupt-parent = <&gpio6>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; /* GPIO 176 */ + reg-io-width = <4>; + }; }; &i2c3 { From 212ae089966d4e9f6ac6e5e6204bd27ad6cb0f09 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Tue, 11 Jun 2013 16:49:48 +0200 Subject: [PATCH 43/52] ARM: dts: omap3-tobi: Correct polarity for GPIO LED The LED is active low, not active high. Signed-off-by: Florian Vaussard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-tobi.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-tobi.dts index b36b5539dde3..7e4ad2aec37a 100644 --- a/arch/arm/boot/dts/omap3-tobi.dts +++ b/arch/arm/boot/dts/omap3-tobi.dts @@ -20,7 +20,7 @@ compatible = "gpio-leds"; heartbeat { label = "overo:red:gpio21"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; }; From c08f6e74243ffb3908daa4661e2b58e4a2ab41c1 Mon Sep 17 00:00:00 2001 From: Florian Vaussard Date: Tue, 11 Jun 2013 16:49:49 +0200 Subject: [PATCH 44/52] ARM: dts: omap3-overo: Add default trigger for TWL4030 LED Commit c971ff1 'leds: leds-pwm: Defer led_pwm_set() if PWM can sleep' fixed a crash when using a trigger with a pwm-led provided by an external chip. Now it is safe to add the default trigger according to board-overo.c. Signed-off-by: Florian Vaussard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap3-overo.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index 4bc788965035..8f1abec78275 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -21,6 +21,7 @@ label = "overo:blue:COM"; pwms = <&twl_pwmled 1 7812500>; max-brightness = <127>; + linux,default-trigger = "mmc0"; }; }; From be814fda0fedd524ff0758bd3bc9fc148c045805 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Fri, 7 Jun 2013 17:02:52 +0530 Subject: [PATCH 45/52] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone Add pinmux configurations for MII based CPSW ethernet to am335x-bone. Default mode is nothing but the values required for the module during active state. With this configurations module is functional as expected. Sleep mode is nothing but the values required for the module during inactive state. The pins are configured to its reset state to optimize energy usage for the pins for the suspend/resume cycle Signed-off-by: Mugunthan V N Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-bone.dts | 67 +++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index fd48173dae09..04feaf8f1420 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -56,6 +56,60 @@ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ + 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ + 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ + 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ + 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ + 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ + 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; }; ocp { @@ -165,3 +219,16 @@ &cpsw_emac1 { phy_id = <&davinci_mdio>, <1>; }; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; + +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; +}; From 94a924ca61f05e444a3f7b860b2720d81b391da6 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Fri, 7 Jun 2013 17:02:53 +0530 Subject: [PATCH 46/52] ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk Add pinmux configurations for RGMII based CPSW ethernet to AM335x EVMsk. Default mode is nothing but the values required for the module during active state. With this configurations module is functional as expected. Sleep mode is nothing but the values required for the module during inactive state. The pins are configured to its reset state to optimize energy usage for the pins for the suspend/resume cycle Signed-off-by: Mugunthan V N Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-evmsk.dts | 92 ++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 2033a37c86ec..9e00eef9b74b 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -77,6 +77,86 @@ 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ >; }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + + /* Slave 2 */ + 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ + 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ + 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ + 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + + /* Slave 2 reset value*/ + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; }; ocp { @@ -300,3 +380,15 @@ }; }; }; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; +}; From 50c7d2bdd149d4d684b91ca85dd57fc55339e111 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Fri, 7 Jun 2013 17:02:54 +0530 Subject: [PATCH 47/52] ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM Add pinmux configurations for RGMII based CPSW ethernet to am335x-evm. Default mode is nothing but the values required for the module during active state. With this configurations module is functional as expected. Sleep mode is nothing but the values required for the module during inactive state. The pins are configured to its reset state to optimize energy usage for the pins for the suspend/resume cycle Signed-off-by: Mugunthan V N Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/am335x-evm.dts | 64 ++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index a150d0441b5e..a16bb9691cc6 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -97,6 +97,58 @@ 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ >; }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; }; ocp { @@ -401,6 +453,18 @@ }; }; +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; +}; + &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; }; From cbad26dbad4a6d5e4b226829257e479f24f835e2 Mon Sep 17 00:00:00 2001 From: Eduardo Valentin Date: Tue, 18 Jun 2013 22:36:38 -0400 Subject: [PATCH 48/52] ARM: dts: OMAP5: Add bandgap DT entry Add bandgap device DT entry for OMAP5 dtsi. Cc: Tony Lindgren Cc: Russell King Signed-off-by: Eduardo Valentin Signed-off-by: J Keerthy [benoit.cousson@linaro.org: Fix alignement and use the macros for IRQ attributes] Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index accab623dfe4..33db6ece9019 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -696,5 +696,14 @@ interrupts = ; }; }; + + bandgap@4a0021e0 { + reg = <0x4a0021e0 0xc + 0x4a00232c 0xc + 0x4a002380 0x2c + 0x4a0023C0 0x3c>; + interrupts = ; + compatible = "ti,omap5430-bandgap"; + }; }; }; From 4730bcfb067a92bd446b4ffd149e0768572c7f19 Mon Sep 17 00:00:00 2001 From: Afzal Mohammed Date: Fri, 14 Jun 2013 19:33:34 +0530 Subject: [PATCH 49/52] ARM: dts: AM43x EPOS EVM support Add AM43x ePOS EVM minimal DT source - this is a minimal one to get it booting. Also include it in omap2plus dtbs and document bindings. The hardware is under development. Signed-off-by: Afzal Mohammed Signed-off-by: Benoit Cousson --- .../devicetree/bindings/arm/omap/omap.txt | 3 +++ arch/arm/boot/dts/Makefile | 3 ++- arch/arm/boot/dts/am43x-epos-evm.dts | 18 ++++++++++++++++++ 3 files changed, 23 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/am43x-epos-evm.dts diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index f8288ea1b530..6d498c758b45 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -56,3 +56,6 @@ Boards: - OMAP5 EVM : Evaluation Module compatible = "ti,omap5-evm", "ti,omap5" + +- AM43x EPOS EVM + compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43" diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 8e507615146b..05da469466f4 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -155,7 +155,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ am335x-evmsk.dtb \ am335x-bone.dtb \ am3517-evm.dtb \ - am3517_mt_ventoux.dtb + am3517_mt_ventoux.dtb \ + am43x-epos-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts new file mode 100644 index 000000000000..74174d48f476 --- /dev/null +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* AM43x EPOS EVM */ + +/dts-v1/; + +#include "am4372.dtsi" + +/ { + model = "TI AM43x EPOS EVM"; + compatible = "ti,am43x-epos-evm","ti,am4372","ti,am43"; +}; From 5bd2100ed2a76147ddec95499214eb606b799a22 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 18 Jun 2013 19:04:44 +0300 Subject: [PATCH 50/52] ARM: dts: omap4-panda: Add USB Host support Provide the RESET and Power regulators for the USB PHY, the USB Host port mode and the PHY device. Also provide pin multiplexer information for the USB host pins. HACK: The reset control need to be replaced with the proper gpio-controlled reset driver as soon it will be merged [1]. [1] http://thread.gmane.org/gmane.linux.drivers.devicetree/36830 Signed-off-by: Roger Quadros [benoit.cousson@linaro.org: Add disclaimer about the reset control inside changelog and code] Cc: Florian Vaussard Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4-panda-common.dtsi | 67 +++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 00cbaa51b74b..60fc62489b7a 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -59,6 +59,47 @@ "AFML", "Line In", "AFMR", "Line In"; }; + + /* + * Temp hack: Need to be replaced with the proper gpio-controlled + * reset driver as soon it will be merged. + * http://thread.gmane.org/gmane.linux.drivers.devicetree/36830 + */ + /* HS USB Port 1 RESET */ + hsusb1_reset: hsusb1_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 30 0>; /* gpio_62 */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Port 1 Power */ + hsusb1_power: hsusb1_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 1 0>; /* gpio_1 */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Host PHY on PORT 1 */ + hsusb1_phy: hsusb1_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb1_reset>; + vcc-supply = <&hsusb1_power>; + /** + * FIXME: + * put the right clock phandle here when available + * clocks = <&auxclk3>; + * clock-names = "main_clk"; + */ + clock-frequency = <19200000>; + }; }; &omap4_pmx_wkup { @@ -83,6 +124,7 @@ &mcbsp1_pins &dss_hdmi_pins &tpd12s015_pins + &hsusbb1_pins >; twl6030_pins: pinmux_twl6030_pins { @@ -133,6 +175,23 @@ >; }; + hsusbb1_pins: pinmux_hsusbb1_pins { + pinctrl-single,pins = < + 0x82 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */ + 0x84 (PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */ + 0x86 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */ + 0x88 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */ + 0x8a (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */ + 0x8c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */ + 0x8e (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */ + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */ + 0x92 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */ + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */ + 0x96 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */ + 0x98 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */ + >; + }; + i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ @@ -283,3 +342,11 @@ mode = <3>; power = <50>; }; + +&usbhshost { + port1-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <&hsusb1_phy>; +}; From 6f56929375be006e114fe5be09095b1ff3edfb99 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 18 Jun 2013 19:04:45 +0300 Subject: [PATCH 51/52] ARM: dts: omap4-panda: Fix DVI EDID reads On Panda the +5V supply for DVI EDID is supplied by the same regulator that poweres the USB Hub. Currently, the DSS/DVI subsystem doesn't know how to manage this regulator and so DVI EDID reads will fail if USB Hub is not enabled. As a temporary fix we keep this regulator permanently enabled on boot. This fixes the DVI EDID read problem. CC: Tomi Valkeinen Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap4-panda-common.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 60fc62489b7a..faa95b5b242e 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -85,6 +85,13 @@ gpio = <&gpio1 1 0>; /* gpio_1 */ startup-delay-us = <70000>; enable-active-high; + /* + * boot-on is required along with always-on as the + * regulator framework doesn't enable the regulator + * if boot-on is not there. + */ + regulator-always-on; + regulator-boot-on; }; /* HS USB Host PHY on PORT 1 */ From 153030c22defea2f96546d0f1a74fe954551c4cd Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 18 Jun 2013 19:04:46 +0300 Subject: [PATCH 52/52] ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency USB Host PHY clock on port 2 must be configured to 19.2MHz. Provide this information. Cc: Sricharan R Signed-off-by: Roger Quadros Signed-off-by: Benoit Cousson --- arch/arm/boot/dts/omap5-uevm.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 30adeaf47883..08b72678abff 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -42,6 +42,13 @@ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; reset-supply = <&hsusb2_reset>; + /** + * FIXME + * Put the right clock phandle here when available + * clocks = <&auxclk1>; + * clock-names = "main_clk"; + */ + clock-frequency = <19200000>; }; /* HS USB Port 3 RESET */